[DependenceInfo] change name Write to MustWrite to remove ambiguity [NFC]

[bollu]

Summary

"Write" is an overloaded term. In collectInfo() till buildFlow(), it is
used to mean "must writes". However, within the memory based analysis,
it is used to mean "both may and must writes". Renaming the Write
variable helps clarify this difference.

[grosser]

LGTM!

[grosser]

Hi Siddharth,

two comments on the patch submission procedure:

1. Please add [Polly] in the subject line of the review (not of the commit after). This helps people on the MLs to distinguish the topics

2. Please include polly and llvm commit mailing lists.

polly/trunk/lib/Analysis/DependenceInfo.cpp

static __isl_give isl_map *tag(__isl_take isl_map *Relation, MemoryAccess *MA,
   if (TagLevel == Dependences::AL_Access)
     return tag(Relation, MA->getId());
 
   // No need to tag at the statement level.
   return Relation;
 }
 
 /// Collect information about the SCoP @p S.
-static void collectInfo(Scop &S, isl_union_map *&Read, isl_union_map *&Write,
-                        isl_union_map *&MayWrite,
+static void collectInfo(Scop &S, isl_union_map *&Read,
+                        isl_union_map *&MustWrite, isl_union_map *&MayWrite,
                         isl_union_map *&ReductionTagMap,
                         isl_union_set *&TaggedStmtDomain,
                         Dependences::AnalysisLevel Level) {
   isl_space *Space = S.getParamSpace();
   Read = isl_union_map_empty(isl_space_copy(Space));
-  Write = isl_union_map_empty(isl_space_copy(Space));
+  MustWrite = isl_union_map_empty(isl_space_copy(Space));
   MayWrite = isl_union_map_empty(isl_space_copy(Space));
   ReductionTagMap = isl_union_map_empty(isl_space_copy(Space));
   isl_union_map *StmtSchedule = isl_union_map_empty(Space);
 
   SmallPtrSet<const ScopArrayInfo *, 8> ReductionArrays;
   if (UseReductions)
     for (ScopStmt &Stmt : S)
       for (MemoryAccess *MA : Stmt)
for (MemoryAccess *MA : Stmt) {
         }
       }
 
       if (MA->isRead())
         Read = isl_union_map_add_map(Read, accdom);
       else if (MA->isMayWrite())
         MayWrite = isl_union_map_add_map(MayWrite, accdom);
       else
-        Write = isl_union_map_add_map(Write, accdom);
+        MustWrite = isl_union_map_add_map(MustWrite, accdom);
     }
 
     if (!ReductionArrays.empty() && Level == Dependences::AL_Statement)
       StmtSchedule = isl_union_map_add_map(StmtSchedule, Stmt.getSchedule());
   }
 
   StmtSchedule =
       isl_union_map_intersect_params(StmtSchedule, S.getAssumedContext());
   TaggedStmtDomain = isl_union_map_domain(StmtSchedule);
 
   ReductionTagMap = isl_union_map_coalesce(ReductionTagMap);
   Read = isl_union_map_coalesce(Read);
-  Write = isl_union_map_coalesce(Write);
+  MustWrite = isl_union_map_coalesce(MustWrite);
   MayWrite = isl_union_map_coalesce(MayWrite);
 }
 
 /// Fix all dimension of @p Zero to 0 and add it to @p user
 static isl_stat fixSetToZero(__isl_take isl_set *Zero, void *user) {
   isl_union_set **User = (isl_union_set **)user;
   for (unsigned i = 0; i < isl_set_dim(Zero, isl_dim_set); i++)
     Zero = isl_set_fix_si(Zero, isl_dim_set, i, 0);
static __isl_give isl_union_flow *buildFlow(__isl_keep isl_union_map *Snk,
   auto Flow = isl_union_access_info_compute_flow(AI);
   DEBUG(if (!Flow) dbgs() << "last error: "
                           << isl_ctx_last_error(isl_schedule_get_ctx(Schedule))
                           << '\n';);
   return Flow;
 }
 
 void Dependences::calculateDependences(Scop &S) {
-  isl_union_map *Read, *Write, *MayWrite, *ReductionTagMap;
+  isl_union_map *Read, *MustWrite, *MayWrite, *ReductionTagMap;
   isl_schedule *Schedule;
   isl_union_set *TaggedStmtDomain;
 
   DEBUG(dbgs() << "Scop: \n" << S << "\n");
 
-  collectInfo(S, Read, Write, MayWrite, ReductionTagMap, TaggedStmtDomain,
+  collectInfo(S, Read, MustWrite, MayWrite, ReductionTagMap, TaggedStmtDomain,
               Level);
 
   bool HasReductions = !isl_union_map_is_empty(ReductionTagMap);
 
   DEBUG(dbgs() << "Read: " << Read << '\n';
-        dbgs() << "Write: " << Write << '\n';
+        dbgs() << "MustWrite: " << MustWrite << '\n';
         dbgs() << "MayWrite: " << MayWrite << '\n';
         dbgs() << "ReductionTagMap: " << ReductionTagMap << '\n';
         dbgs() << "TaggedStmtDomain: " << TaggedStmtDomain << '\n';);
 
   Schedule = S.getScheduleTree();
 
   if (!HasReductions) {
     isl_union_map_free(ReductionTagMap);
if (!HasReductions) {
 
     // By pulling back Tags from Schedule, we have a schedule tree that can
     // be used to compute normal dependences, as well as 'tagged' reduction
     // dependences.
     Schedule = isl_schedule_pullback_union_pw_multi_aff(Schedule, Tags);
   }
 
   DEBUG(dbgs() << "Read: " << Read << "\n";
-        dbgs() << "Write: " << Write << "\n";
+        dbgs() << "MustWrite: " << MustWrite << "\n";
         dbgs() << "MayWrite: " << MayWrite << "\n";
         dbgs() << "Schedule: " << Schedule << "\n");
 
   {
     IslMaxOperationsGuard MaxOpGuard(IslCtx.get(), OptComputeOut);
 
     RAW = WAW = WAR = RED = nullptr;
 
     if (OptAnalysisType == VALUE_BASED_ANALYSIS) {
       isl_union_flow *Flow;
 
-      Flow = buildFlow(Read, Write, MayWrite, Schedule);
+      Flow = buildFlow(Read, MustWrite, MayWrite, Schedule);
 
       RAW = isl_union_flow_get_may_dependence(Flow);
       isl_union_flow_free(Flow);
 
-      Flow = buildFlow(Write, Write, Read, Schedule);
+      Flow = buildFlow(MustWrite, MustWrite, Read, Schedule);
 
       WAW = isl_union_flow_get_must_dependence(Flow);
       WAR = isl_union_flow_get_may_dependence(Flow);
 
       // This subtraction is needed to obtain the same results as were given by
       // isl_union_map_compute_flow. For large sets this may add some
       // compile-time cost. As there does not seem to be a need to distinguish
       // between WAW and WAR, refactoring Polly to only track general non-flow
       // dependences may improve performance.
       WAR = isl_union_map_subtract(WAR, isl_union_map_copy(WAW));
 
       isl_union_flow_free(Flow);
       isl_schedule_free(Schedule);
     } else {
       isl_union_flow *Flow;
 
-      Write = isl_union_map_union(Write, isl_union_map_copy(MayWrite));
+      isl_union_map *Write = isl_union_map_union(isl_union_map_copy(MustWrite),
+                                                 isl_union_map_copy(MayWrite));
 
       Flow = buildFlow(Read, nullptr, Write, Schedule);
 
       RAW = isl_union_flow_get_may_dependence(Flow);
       isl_union_flow_free(Flow);
 
       Flow = buildFlow(Write, nullptr, Read, Schedule);
 
       WAR = isl_union_flow_get_may_dependence(Flow);
       isl_union_flow_free(Flow);
 
       Flow = buildFlow(Write, nullptr, Write, Schedule);
 
       WAW = isl_union_flow_get_may_dependence(Flow);
       isl_union_flow_free(Flow);
       isl_schedule_free(Schedule);
+      isl_union_map_free(Write);
     }
 
+    isl_union_map_free(MustWrite);
     isl_union_map_free(MayWrite);
-    isl_union_map_free(Write);
     isl_union_map_free(Read);
 
     RAW = isl_union_map_coalesce(RAW);
     WAW = isl_union_map_coalesce(WAW);
     WAR = isl_union_map_coalesce(WAR);
 
     // End of max_operations scope.
   }