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[ARM] Use alias analysis in ARMPreAllocLoadStoreOpt.
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Authored by efriedma on Mar 10 2017, 11:10 AM.

Details

Summary

This allows the optimization to rearrange loads and stores more aggressively. This doesn't really affect performance, but it helps codesize.

Diff Detail

Repository
rL LLVM

Event Timeline

efriedma created this revision.Mar 10 2017, 11:10 AM
mcrosier accepted this revision.Mar 13 2017, 7:06 AM

LGTM. Also, I believe this addresses, at least in part, PR24418.

This revision is now accepted and ready to land.Mar 13 2017, 7:06 AM
mcrosier added inline comments.Mar 13 2017, 7:50 AM
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
35

Is this include needed?

mcrosier added inline comments.Mar 13 2017, 7:52 AM
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
2028–2029

I believe this FIXME can be removed as well.

mcrosier added inline comments.Mar 13 2017, 11:02 AM
test/CodeGen/ARM/ldrd.ll
199

Sorry to come back around on this one, Eli. Would you mind writing this as a MIR test as is done in D30903? Otherwise, instruction scheduling or register allocation may affect this test.

mcrosier added inline comments.Mar 13 2017, 11:16 AM
test/CodeGen/ARM/ldrd.ll
199

Ignore the part about RA since this is pre-RA.

efriedma updated this revision to Diff 91936.Mar 15 2017, 2:14 PM

Add MIR test. Minor cleanups.

LGTM. Thanks for addressing my comments and adding the MIR test case.

This revision was automatically updated to reflect the committed changes.