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[ARM] Fix parsing of special register masks
ClosedPublic

Authored by olista01 on Feb 28 2017, 8:19 AM.

Details

Summary

This parsing code was incorrectly checking for invalid characters, so an invalid instruction like:

msr spsr_w, r0

would be emitted as:

msr spsr_cxsf, r0

Diff Detail

Repository
rL LLVM

Event Timeline

olista01 created this revision.Feb 28 2017, 8:19 AM
olista01 edited the summary of this revision. (Show Details)Feb 28 2017, 8:25 AM
rengolin accepted this revision.Feb 28 2017, 1:07 PM

Ouch! LGTM. Thanks!

This revision is now accepted and ready to land.Feb 28 2017, 1:07 PM
This revision was automatically updated to reflect the committed changes.