AMDGPU/R600: Fix ALU clause markers use detection

[jvesely]

Summary

also exit early on kill instead of redefinition.

[arsenm]

lib/Target/AMDGPU/R600EmitClauseMarkers.cpp

233

Using findRegisterUseOperandIdx twice like this looks strange. The first one looks like it should be readsRegister? The second looks like it should be killsRegister?

[jvesely]

use convenience wrappers

[jvesely]

ping

[jvesely]

ping

lib/Target/AMDGPU/R600EmitClauseMarkers.cpp

private:
   }
 
   bool canClauseLocalKillFitInClause(
                         unsigned AluInstCount,
                         std::vector<std::pair<unsigned, unsigned>> KCacheBanks,
                         MachineBasicBlock::iterator Def,
                         MachineBasicBlock::iterator BBEnd) {
     const R600RegisterInfo &TRI = TII->getRegisterInfo();
+    //TODO: change this to defs?
     for (MachineInstr::const_mop_iterator
            MOI = Def->operands_begin(),
            MOE = Def->operands_end(); MOI != MOE; ++MOI) {
       if (!MOI->isReg() || !MOI->isDef() ||
           TRI.isPhysRegLiveAcrossClauses(MOI->getReg()))
         continue;
 
       // Def defines a clause local register, so check that its use will fit
       // in the clause.
       unsigned LastUseCount = 0;
       for (MachineBasicBlock::iterator UseI = Def; UseI != BBEnd; ++UseI) {
         AluInstCount += OccupiedDwords(*UseI);
         // Make sure we won't need to end the clause due to KCache limitations.
         if (!SubstituteKCacheBank(*UseI, KCacheBanks, false))
           return false;
 
         // We have reached the maximum instruction limit before finding the
         // use that kills this register, so we cannot use this def in the
         // current clause.
         if (AluInstCount >= TII->getMaxAlusPerClause())
           return false;
 
+        // TODO: Is this true? kill flag appears to work OK below
         // Register kill flags have been cleared by the time we get to this
         // pass, but it is safe to assume that all uses of this register
         // occur in the same basic block as its definition, because
         // it is illegal for the scheduler to schedule them in
         // different blocks.
-        if (UseI->findRegisterUseOperandIdx(MOI->getReg()))
+        if (UseI->findRegisterUseOperandIdx(MOI->getReg()) != -1) {
           LastUseCount = AluInstCount;
+        }
 
-        if (UseI != Def && UseI->findRegisterDefOperandIdx(MOI->getReg()) != -1)
+        // Exit early if the current use kills the register
+        if (UseI != Def && UseI->findRegisterUseOperandIdx(MOI->getReg(), true) != -1)
           break;
       }
       if (LastUseCount)
         return LastUseCount <= TII->getMaxAlusPerClause();
       llvm_unreachable("Clause local register live at end of clause.");
     }
     return true;
   }

test/CodeGen/AMDGPU/r600.alu-limits.ll

 ; RUN: opt -loop-unroll -unroll-threshold=2000 -S < %s | llc -march=r600 -mcpu=cypress | FileCheck %s
-; XFAIL: *
 ; REQUIRES: asserts
 
-; CHECK: {{^}}@alu_limits:
+; CHECK: {{^}}alu_limits:
+; CHECK: CF_END
 
 %struct.foo = type {i32, i32, i32}
 
 define void @alu_limits(i32 addrspace(1)* %out, %struct.foo* %in, i32 %offset) {
 entry:
   %ptr = getelementptr inbounds %struct.foo, %struct.foo* %in, i32 1, i32 2
   %x = load i32, i32 *%ptr, align 4
   br label %loop