PMULDQ returns the 64-bit result of the signed multiplication of the lower 32-bits of vXi64 vector inputs, we can lower with this if the sign bits stretch that far.
Details
Details
Diff Detail
Diff Detail
- Repository
- rL LLVM
Event Timeline
test/CodeGen/X86/vector-compare-results.ll | ||
---|---|---|
1884 | This change seems unrelated to the multiply changes. Was it caused by the computeSignBits changes handling for extract subvector? |
test/CodeGen/X86/vector-compare-results.ll | ||
---|---|---|
1884 | Yes it's down to adding EXTRACT_SUBVECTOR support to computeSignBits |
test/CodeGen/X86/vector-compare-results.ll | ||
---|---|---|
1884 | Should I commit the EXTRACT_SUBVECTOR support first to split the diffs? |
This change seems unrelated to the multiply changes. Was it caused by the computeSignBits changes handling for extract subvector?