We are using flat scratch on CI as well, so we need to reserve registers for that.
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- rL LLVM
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lib/Target/AMDGPU/SIRegisterInfo.cpp | ||
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1125 ↗ | (On Diff #79633) | We should be checking for SEA_ISLANDS here, since there is no flat_scratch on SI. |
lib/Target/AMDGPU/SIRegisterInfo.cpp | ||
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1126 ↗ | (On Diff #79637) | This can probably be skipped if there are no stack objects |
lib/Target/AMDGPU/SIRegisterInfo.cpp | ||
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1126 ↗ | (On Diff #79637) | Doesn't same apply to VI? |
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It does, yes. I see however a test where 104 SGPRs are allocated on CI which exceeds the limit. MFI.hasFlatScratchInit() returns false, and whole spilling went to VGPRs, but we still mark scratch as used. I suppose that is already a separate problem of not releasing scratch.