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Differential D26711

[AMDGPU] Refactor v_mac_{f16, f32} patterns into a class NFC
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Authored by kzhuravl on Nov 15 2016, 3:43 PM.

Details

Reviewers
• tstellarAMD
arsenm
Commits
rGbf998c700325: [AMDGPU] Refactor v_mac_{f16, f32} patterns into a class NFC
rL287077: [AMDGPU] Refactor v_mac_{f16, f32} patterns into a class NFC

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rL LLVM

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kzhuravl updated this revision to Diff 78090.Nov 15 2016, 3:43 PM
kzhuravl retitled this revision from to [AMDGPU] Refactor v_mac_{f16, f32} into a class NFC.
kzhuravl updated this object.
kzhuravl added reviewers: • tstellarAMD, arsenm.
kzhuravl added a subscriber: llvm-commits.
Herald edited edge metadata. · View Herald TranscriptNov 15 2016, 3:43 PM
Herald added subscribers: tony-tye, yaxunl, nhaehnle, wdng. · View Herald Transcript
kzhuravl retitled this revision from [AMDGPU] Refactor v_mac_{f16, f32} into a class NFC to [AMDGPU] Refactor v_mac_{f16, f32} patterns into a class NFC.Nov 15 2016, 3:43 PM
kzhuravl edited edge metadata.
arsenm accepted this revision.Nov 15 2016, 4:07 PM
arsenm edited edge metadata.

LGTM

This revision is now accepted and ready to land.Nov 15 2016, 4:07 PM
Closed by commit rL287077: [AMDGPU] Refactor v_mac_{f16, f32} patterns into a class NFC (authored by kzhuravl). · Explain WhyNov 15 2016, 7:49 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
AMDGPU/
41 lines

Diff 78132

llvm/trunk/lib/Target/AMDGPU/SIInstructions.td

Show First 20 Lines • Show All 462 Lines • ▼ Show 20 Linesdef : Pat <
(f16 (uint_to_fp i32:$src)), (f16 (uint_to_fp i32:$src)),
(V_CVT_F16_F32_e32 (V_CVT_F32_U32_e32 $src)) (V_CVT_F16_F32_e32 (V_CVT_F32_U32_e32 $src))
>; >;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// VOP2 Patterns // VOP2 Patterns
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
multiclass FMADPat <ValueType vt, Instruction inst> {
def : Pat <
(vt (fmad (VOP3NoMods0 vt:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod),
(VOP3NoMods vt:$src1, i32:$src1_modifiers),
(VOP3NoMods vt:$src2, i32:$src2_modifiers))),
(inst $src0_modifiers, $src0, $src1_modifiers, $src1,
$src2_modifiers, $src2, $clamp, $omod)
>;
}
defm : FMADPat <f16, V_MAC_F16_e64>;
defm : FMADPat <f32, V_MAC_F32_e64>;
multiclass SelectPat<ValueType vt, Instruction inst> { multiclass SelectPat <ValueType vt, Instruction inst> {
def : Pat < def : Pat <
(vt (select i1:$src0, vt:$src1, vt:$src2)), (vt (select i1:$src0, vt:$src1, vt:$src2)),
(inst $src2, $src1, $src0) (inst $src2, $src1, $src0)
>; >;
} }
defm : SelectPat<i16, V_CNDMASK_B32_e64>; defm : SelectPat <i16, V_CNDMASK_B32_e64>;
defm : SelectPat<i32, V_CNDMASK_B32_e64>; defm : SelectPat <i32, V_CNDMASK_B32_e64>;
defm : SelectPat<f16, V_CNDMASK_B32_e64>; defm : SelectPat <f16, V_CNDMASK_B32_e64>;
defm : SelectPat<f32, V_CNDMASK_B32_e64>; defm : SelectPat <f32, V_CNDMASK_B32_e64>;
def : Pat < def : Pat <
(i32 (add (i32 (ctpop i32:$popcnt)), i32:$val)), (i32 (add (i32 (ctpop i32:$popcnt)), i32:$val)),
(V_BCNT_U32_B32_e64 $popcnt, $val) (V_BCNT_U32_B32_e64 $popcnt, $val)
>; >;
// Pattern for V_MAC_F16
def : Pat <
(f16 (fmad (VOP3NoMods0 f16:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod),
(VOP3NoMods f16:$src1, i32:$src1_modifiers),
(VOP3NoMods f16:$src2, i32:$src2_modifiers))),
(V_MAC_F16_e64 $src0_modifiers, $src0, $src1_modifiers, $src1,
$src2_modifiers, $src2, $clamp, $omod)
>;
// Pattern for V_MAC_F32
def : Pat <
(f32 (fmad (VOP3NoMods0 f32:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod),
(VOP3NoMods f32:$src1, i32:$src1_modifiers),
(VOP3NoMods f32:$src2, i32:$src2_modifiers))),
(V_MAC_F32_e64 $src0_modifiers, $src0, $src1_modifiers, $src1,
$src2_modifiers, $src2, $clamp, $omod)
>;
/********** ============================================ **********/ /********** ============================================ **********/
/********** Extraction, Insertion, Building and Casting **********/ /********** Extraction, Insertion, Building and Casting **********/
/********** ============================================ **********/ /********** ============================================ **********/
foreach Index = 0-2 in { foreach Index = 0-2 in {
def Extract_Element_v2i32_#Index : Extract_Element < def Extract_Element_v2i32_#Index : Extract_Element <
i32, v2i32, Index, !cast<SubRegIndex>(sub#Index) i32, v2i32, Index, !cast<SubRegIndex>(sub#Index)
>; >;
▲ Show 20 Lines • Show All 564 Lines • Show Last 20 Lines