GlobalISel: make sure debugging variables are appropriately elided in release builds.

[dlj]

Summary

There are two variables here that break. This change constrains both of them to
debug builds (via DEBUG() or #ifndef NDEBUG).

[t.p.northover]

The first change looks fine, but I'd like to keep the second block:

lib/CodeGen/GlobalISel/InstructionSelect.cpp

139

I don't think this should be guarded. It's intentionally part of the fallback to SDAG (it often gets hit when there's no selection rule for some instruction yet).

[dlj]

Fix variable scopes that I missed.

[bkramer]

lg

[dlj]

Thanks, everything now passes ninja check under release and debug. Thanks for bearing with me.

lib/CodeGen/GlobalISel/InstructionSelect.cpp

139

Yup, and there was a test for it. So this definitely shouldn't be guarded.

[t.p.northover]

Ah, I forgot this was InstructionSelect and was wondering why MRI wasn't automatically available. Looks fine to me too.

[dlj]

Update reviewers.

lib/CodeGen/GlobalISel/InstructionSelect.cpp

bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
 
   const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
   const InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();
   assert(ISel && "Cannot work without InstructionSelector");
 
   // FIXME: freezeReservedRegs is now done in IRTranslator, but there are many
   // other MF/MFI fields we need to initialize.
 
+  const MachineRegisterInfo &MRI = MF.getRegInfo();
+
 #ifndef NDEBUG
   // Check that our input is fully legal: we require the function to have the
   // Legalized property, so it should be.
   // FIXME: This should be in the MachineVerifier, but it can't use the
   // LegalizerInfo as it's currently in the separate GlobalISel library.
   // The RegBankSelected property is already checked in the verifier. Note
   // that it has the same layering problem, but we only use inline methods so
   // end up not needing to link against the GlobalISel library.
-  const MachineRegisterInfo &MRI = MF.getRegInfo();
   if (const LegalizerInfo *MLI = MF.getSubtarget().getLegalizerInfo())
     for (const MachineBasicBlock &MBB : MF)
       for (const MachineInstr &MI : MBB)
         if (isPreISelGenericOpcode(MI.getOpcode()) && !MLI->isLegal(MI, MRI))
           reportSelectionError(&MI, "Instruction is not legal");
 
 #endif
   // FIXME: We could introduce new blocks and will need to fix the outer loop.
   // Until then, keep track of the number of blocks to assert that we don't.
   const size_t NumBlocks = MF.size();
 
   bool Failed = false;
   for (MachineBasicBlock *MBB : post_order(&MF)) {
     if (MBB->empty())
       continue;
 
     // Select instructions in reverse block order. We permit erasing so have
     // to resort to manually iterating and recognizing the begin (rend) case.
     bool ReachedBegin = false;
     for (auto MII = std::prev(MBB->end()), Begin = MBB->begin();
          !ReachedBegin;) {
+#ifndef NDEBUG
       // Keep track of the insertion range for debug printing.
       const auto AfterIt = std::next(MII);
-
+#endif
       // Select this instruction.
       MachineInstr &MI = *MII;
 
       // And have our iterator point to the next instruction, if there is one.
       if (MII == Begin)
         ReachedBegin = true;
       else
         --MII;
#endif
         dbgs() << "Into:\n";
         for (auto &InsertedMI : make_range(InsertedBegin, AfterIt))
           dbgs() << "  " << InsertedMI;
         dbgs() << '\n';
       });
     }
   }
 
   // Now that selection is complete, there are no more generic vregs.  Verify
   // that the size of the now-constrained vreg is unchanged and that it has a
   // register class.
   for (auto &VRegToType : MRI.getVRegToType()) {
     unsigned VReg = VRegToType.first;
     auto *RC = MRI.getRegClassOrNull(VReg);
     auto *MI = MRI.def_instr_begin(VReg) == MRI.def_instr_end()
                    ? nullptr
                    : &*MRI.def_instr_begin(VReg);