[AMDGPU] Ask subtarget if waitcnt instruction is needed before barrier instruction

[nhaehnle]

LGTM

lib/Target/AMDGPU/AMDGPUSubtarget.h

public:
 
   unsigned getKernArgSegmentSize(unsigned ExplictArgBytes) const;
 
   /// Return the maximum number of waves per SIMD for kernels using \p SGPRs SGPRs
   unsigned getOccupancyWithNumSGPRs(unsigned SGPRs) const;
 
   /// Return the maximum number of waves per SIMD for kernels using \p VGPRs VGPRs
   unsigned getOccupancyWithNumVGPRs(unsigned VGPRs) const;
+
+  /// \returns True if waitcnt instruction is needed before barrier instruction,
+  /// false otherwise.
+  bool needWaitcntBeforeBarrier() const {
+    return true;
+  }
 };
 
 } // End namespace llvm
 
 #endif

lib/Target/AMDGPU/SIInsertWaits.cpp

for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
 
       Counters Required;
 
       // Wait for everything before a barrier.
       //
       // S_SENDMSG implicitly waits for all outstanding LGKM transfers to finish,
       // but we also want to wait for any other outstanding transfers before
       // signalling other hardware blocks
-      if (I->getOpcode() == AMDGPU::S_BARRIER ||
+      if ((I->getOpcode() == AMDGPU::S_BARRIER &&
+               ST->needWaitcntBeforeBarrier()) ||
            I->getOpcode() == AMDGPU::S_SENDMSG)
         Required = LastIssued;
       else
         Required = handleOperands(*I);
 
       Counters Increment = getHwCounts(*I);
 
       if (countersNonZero(Required) || countersNonZero(Increment))
         increaseCounters(Required, DelayedWaitOn);