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AMDGPU: Fix bug in AMDGPUConvertAtomicLibCalls causing invalid bitcast
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Authored by yaxunl on Sep 14 2016, 2:17 PM.

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nhaustov
• tstellarAMD
kzhuravl

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yaxunl updated this revision to Diff 71433.Sep 14 2016, 2:17 PM

yaxunl retitled this revision from to AMDGPU: Fix bug in AMDGPUConvertAtomicLibCalls causing invalid bitcast.

yaxunl updated this object.

yaxunl added reviewers: kzhuravl, nhaustov, • tstellarAMD.

yaxunl added a subscriber: Restricted Project.

Herald added subscribers: nhaehnle, wdng, arsenm. · View Herald TranscriptSep 14 2016, 2:17 PM

LGTM

We should also stop using "AMDGPU" project temporarily due to issues discussed earlier

This revision is now accepted and ready to land.Sep 14 2016, 2:23 PM

In D24583#543088, @kzhuravl wrote:

LGTM

We should also stop using "AMDGPU" project temporarily due to issues discussed earlier

Sorry, I might have missed the discussion. Is there any alternative? Thanks.

In D24583#543092, @yaxunl wrote:

Sorry, I might have missed the discussion. Is there any alternative? Thanks.

You can create a personal Herald rule

pull request merged in amd-common branch

Revision Contents

Path

Size

lib/

Target/

AMDGPU/

AMDGPUConvertAtomicLibCalls.cpp

2 lines

test/

CodeGen/

AMDGPU/

opencl-1.2-atomics.ll

5 lines

Diff 71433

lib/Target/AMDGPU/AMDGPUConvertAtomicLibCalls.cpp

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	dyn_cast<AtomicRMWInst>(NI)->setSynchScope(	dyn_cast<AtomicRMWInst>(NI)->setSynchScope(
	(SynchronizationScope)OCL1XAtomicScope.getValue());	(SynchronizationScope)OCL1XAtomicScope.getValue());
	if (NeedCast) {	if (NeedCast) {
	NI = Builder.CreateBitCast(NI, F->getType());	NI = Builder.CreateBitCast(NI, F->getReturnType());
	}	}
	} else if (Type == CMPXCHG) {	} else if (Type == CMPXCHG) {
	NI = Builder.CreateAtomicCmpXchg(	NI = Builder.CreateAtomicCmpXchg(
Context not available.

test/CodeGen/AMDGPU/opencl-1.2-atomics.ll

Context not available.
	; CHECK: atomicrmw add i32 addrspace(1)* null, i32 0 synchscope(2) monotonic	; CHECK: atomicrmw add i32 addrspace(1)* null, i32 0 synchscope(2) monotonic
	; CHECK: cmpxchg i32 addrspace(1)* null, i32 0, i32 0 synchscope(2) monotonic monotonic	; CHECK: cmpxchg i32 addrspace(1)* null, i32 0, i32 0 synchscope(2) monotonic monotonic
	; CHECK: atomicrmw xchg i32 addrspace(1)* null, i32 0 synchscope(2) monotonic	; CHECK: atomicrmw xchg i32 addrspace(1)* null, i32 0 synchscope(2) monotonic
		; CHECK: [[A:%[0-9]]] = atomicrmw xchg i32 addrspace(3) null, i32 0 synchscope(2) monotonic
		; CHECK: bitcast i32 [[A]] to float

	define amdgpu_kernel void @test() {	define amdgpu_kernel void @test() {
	entry:	entry:
	%call0 = call i32 @_Z8atom_incPU3AS1Vi(i32 addrspace(1)* null)	%call0 = call i32 @_Z8atom_incPU3AS1Vi(i32 addrspace(1)* null)
	%call1 = call i32 @_Z10atomic_addPU3AS1Vii(i32 addrspace(1)* null, i32 0)	%call1 = call i32 @_Z10atomic_addPU3AS1Vii(i32 addrspace(1)* null, i32 0)
	%call2 = call i32 @_Z14atomic_cmpxchgPU3AS1Viii(i32 addrspace(1)* null, i32 0, i32 0)	%call2 = call i32 @_Z14atomic_cmpxchgPU3AS1Viii(i32 addrspace(1)* null, i32 0, i32 0)
	%call3 = call i32 @_Z11atomic_xchgPU3AS1Vii(i32 addrspace(1)* null, i32 0)	%call3 = call i32 @_Z11atomic_xchgPU3AS1Vii(i32 addrspace(1)* null, i32 0)
		%call4 = call float @_Z11atomic_xchgPU3AS3Vff(float addrspace(3)* null, float 0.0)
	ret void	ret void
	}	}
	declare i32 @_Z8atom_incPU3AS1Vi(i32 addrspace(1)*)	declare i32 @_Z8atom_incPU3AS1Vi(i32 addrspace(1)*)
	declare i32 @_Z10atomic_addPU3AS1Vii(i32 addrspace(1)*, i32)	declare i32 @_Z10atomic_addPU3AS1Vii(i32 addrspace(1)*, i32)
	declare i32 @_Z14atomic_cmpxchgPU3AS1Viii(i32 addrspace(1)*, i32, i32)	declare i32 @_Z14atomic_cmpxchgPU3AS1Viii(i32 addrspace(1)*, i32, i32)
	declare i32 @_Z11atomic_xchgPU3AS1Vii(i32 addrspace(1)*, i32)	declare i32 @_Z11atomic_xchgPU3AS1Vii(i32 addrspace(1)*, i32)
		declare float @_Z11atomic_xchgPU3AS3Vff(float addrspace(3)*, float)
Context not available.