[AMDGPU] Assembler: Move disabled SDWA and DPP instruction into Disable asm variant

[SamWot]

Summary

This removes disabled instructions from match tables so we will not match them at all.

[vpykhtin]

LGTM.

llvm/trunk/lib/Target/AMDGPU/AMDGPU.td

def AMDGPUAsmVariants {
   string Default = "Default";
   int Default_ID = 0;
   string VOP3 = "VOP3";
   int VOP3_ID = 1;
   string SDWA = "SDWA";
   int SDWA_ID = 2;
   string DPP = "DPP";
   int DPP_ID = 3;
+  string Disable = "Disable";
+  int Disable_ID = 4;
 }
 
 def DefaultAMDGPUAsmParserVariant : AsmParserVariant {
   let Variant = AMDGPUAsmVariants.Default_ID;
   let Name = AMDGPUAsmVariants.Default;
 }
 
 def VOP3AsmParserVariant : AsmParserVariant {

llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td

multiclass VOP1_m <vop1 op, string opName, VOPProfile p, list<dag> pattern,
   def _vi : VOP1_Real_vi <opName, op, p.Outs, p.Ins32, asm>;
 
 }
 
 class VOP1_DPP <vop1 op, string opName, VOPProfile p> :
   VOP1_DPPe <op.VI>,
   VOP_DPP <p.OutsDPP, p.InsDPP, opName#p.AsmDPP, [], p.HasModifiers> {
   let AssemblerPredicates = !if(p.HasExt, [isVI], [DisableInst]);
+  let AsmVariantName = !if(p.HasExt, AMDGPUAsmVariants.DPP,
+                                     AMDGPUAsmVariants.Disable);
   let DecoderNamespace = "DPP";
   let DisableDecoder = DisableVIDecoder;
   let src0_modifiers = !if(p.HasModifiers, ?, 0);
   let src1_modifiers = 0;
 }
 
 class SDWADisableFields <VOPProfile p> {
   bits<8> src0 = !if(!eq(p.NumSrcArgs, 0), 0, ?);

 }
 
 class VOP1_SDWA <vop1 op, string opName, VOPProfile p> :
   VOP1_SDWAe <op.VI>,
   VOP_SDWA <p.OutsSDWA, p.InsSDWA, opName#p.AsmSDWA, [], p.HasModifiers>,
   SDWADisableFields <p> {
   let AsmMatchConverter = "cvtSdwaVOP1";
   let AssemblerPredicates = !if(p.HasExt, [isVI], [DisableInst]);
+  let AsmVariantName = !if(p.HasExt, AMDGPUAsmVariants.SDWA,
+                                     AMDGPUAsmVariants.Disable);
   let DecoderNamespace = "SDWA";
   let DisableDecoder = DisableVIDecoder;
 }
 
 multiclass VOP1SI_m <vop1 op, string opName, VOPProfile p, list<dag> pattern,
                      string asm = opName#p.Asm32> {
 
   def "" : VOP1_Pseudo <p.Outs, p.Ins32, pattern, opName>;
multiclass VOP2_m <vop2 op, string opName, VOPProfile p, list <dag> pattern,
   def _vi : VOP2_Real_vi <opName, op, p.Outs32, p.Ins32, p.Asm32>;
 
 }
 
 class VOP2_DPP <vop2 op, string opName, VOPProfile p> :
   VOP2_DPPe <op.VI>,
   VOP_DPP <p.OutsDPP, p.InsDPP, opName#p.AsmDPP, [], p.HasModifiers> {
   let AssemblerPredicates = !if(p.HasExt, [isVI], [DisableInst]);
+  let AsmVariantName = !if(p.HasExt, AMDGPUAsmVariants.DPP,
+                                     AMDGPUAsmVariants.Disable);
   let DecoderNamespace = "DPP";
   let DisableDecoder = DisableVIDecoder;
   let src0_modifiers = !if(p.HasModifiers, ?, 0);
   let src1_modifiers = !if(p.HasModifiers, ?, 0);
 }
 
 class VOP2_SDWA <vop2 op, string opName, VOPProfile p> :
   VOP2_SDWAe <op.VI>,
   VOP_SDWA <p.OutsSDWA, p.InsSDWA, opName#p.AsmSDWA, [], p.HasModifiers>,
   SDWADisableFields <p> {
   let AsmMatchConverter = "cvtSdwaVOP2";
   let AssemblerPredicates = !if(p.HasExt, [isVI], [DisableInst]);
+  let AsmVariantName = !if(p.HasExt, AMDGPUAsmVariants.SDWA,
+                                     AMDGPUAsmVariants.Disable);
   let DecoderNamespace = "SDWA";
   let DisableDecoder = DisableVIDecoder;
 }
 
 class VOP3DisableFields <bit HasSrc1, bit HasSrc2, bit HasModifiers> {
 
   bits<2> src0_modifiers = !if(HasModifiers, ?, 0);
   bits<2> src1_modifiers = !if(HasModifiers, !if(HasSrc1, ?, 0), 0);

 class VOPC_SDWA <vopc op, string opName, bit DefExec, VOPProfile p> :
     VOPC_SDWAe <op.VI>,
     VOP_SDWA <p.OutsSDWA, p.InsSDWA, opName#p.AsmSDWA, [], p.HasModifiers>,
     SDWADisableFields <p> {
   let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
   let hasSideEffects = DefExec;
   let AsmMatchConverter = "cvtSdwaVOPC";
   let AssemblerPredicates = !if(p.HasExt, [isVI], [DisableInst]);
+  let AsmVariantName = !if(p.HasExt, AMDGPUAsmVariants.SDWA,
+                                     AMDGPUAsmVariants.Disable);
   let DecoderNamespace = "SDWA";
   let DisableDecoder = DisableVIDecoder;
 }
 
 multiclass VOPC_m <vopc op, dag ins, string op_asm, list<dag> pattern,
                    string opName, bit DefExec, VOPProfile p,
                    list<SchedReadWrite> sched,
                    string revOpName = "", string asm = opName#"_e32 "#op_asm,