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[RegScavenger] Check for sub- and super-registers of ones used by instructions
AbandonedPublic

Authored by olista01 on Sep 5 2016, 10:01 AM.

Details

Summary

Previously, the register scavenger did not check sub- and
super-registers of those used by the current instruction, so we could
emit code which clobbered a live value when we scavenged a register to
materialise a stack slot address.

I've tried to create a smaller reproducer for this with no success.
Because this requires both large stack frames and high register
pressure, the test case that uncovered it is massive, and will not be a
good regression test as any change in register or stack slot allocation
would cause it to pass on a broken compiler. Does anyone know of a
better way to reproduce this? If not, would it be better to commit this
without a test than with a large, fragile test?

Diff Detail

Event Timeline

olista01 updated this revision to Diff 70340.Sep 5 2016, 10:01 AM
olista01 retitled this revision from to [RegScavenger] Check for sub- and super-registers of ones used by instructions.
olista01 updated this object.
olista01 added reviewers: MatzeB, kparzysz, hfinkel.
olista01 set the repository for this revision to rL LLVM.
olista01 added a subscriber: llvm-commits.
olista01 abandoned this revision.Sep 5 2016, 10:57 AM

I've just realised that this is a duplicate of D24130 (what are the chances?), so I'll abandon this one.