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Differential D22251

[MIR] Print the regular output of mir in the output file
ClosedPublic

Authored by qcolombet on Jul 11 2016, 6:27 PM.

Details

Reviewers
• tstellarAMD
MatzeB
Commits
rG545e558b8209: [MIR] Print on the given output instead of stderr.
rL275314: [MIR] Print on the given output instead of stderr.
Summary

Hi,

Currently the MIR framework prints all its outputs (errors and actual representation) on stderr.

This patch fixes that by printing the regular output in the output specified with -o.

The patch itself is pretty straightforward but a lot of tests have to be updated, that’s why I put up a review.
Basically, every test that uses mir needs to be updated to:

  1. Replace -o /dev/null into -o -
  2. Get rid of the useless 2>&1

The change is pretty mechanical.

Diff Detail

Repository
rL LLVM

Event Timeline

qcolombet updated this revision to Diff 63617.Jul 11 2016, 6:27 PM
qcolombet retitled this revision from to [MIR] Print the regular output of mir in the output file.
qcolombet updated this object.
qcolombet added a reviewer: MatzeB.
qcolombet set the repository for this revision to rL LLVM.
qcolombet added a subscriber: llvm-commits.
Herald added a reviewer: • tstellarAMD. · View Herald TranscriptJul 11 2016, 6:27 PM
Herald added subscribers: nemanjai, dsanders, qcolombet, jholewinski. · View Herald Transcript
MatzeB accepted this revision.Jul 11 2016, 6:33 PM
MatzeB edited edge metadata.

The change LGTM.

We should change llc to construct a .mir filename instead of .s/.o when -stop-after is used. However I am fine with doing that in a followup patch.

This revision is now accepted and ready to land.Jul 11 2016, 6:33 PM
qcolombet added a comment.Jul 13 2016, 11:53 AM

Hi Matthias,

Good idea!

I'll do that in a following patch.

Thanks,
-Quentin

Closed by commit rL275314: [MIR] Print on the given output instead of stderr. (authored by qcolombet). · Explain WhyJul 13 2016, 1:43 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
CodeGen/
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test/
CodeGen/
AArch64/
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AMDGPU/
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ARM/
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MIR/
AArch64/
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AMDGPU/
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ARM/
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Generic/
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Hexagon/
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Lanai/
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Mips/
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NVPTX/
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Diff 63617

lib/CodeGen/LLVMTargetMachine.cpp

Show First 20 Lines • Show All 188 Lines • ▼ Show 20 Linesbool LLVMTargetMachine::addPassesToEmitFile(
// Add common CodeGen passes. // Add common CodeGen passes.
MCContext *Context = MCContext *Context =
addPassesToGenerateCode(this, PM, DisableVerify, StartBefore, StartAfter, addPassesToGenerateCode(this, PM, DisableVerify, StartBefore, StartAfter,
StopAfter, MFInitializer); StopAfter, MFInitializer);
if (!Context) if (!Context)
return true; return true;
if (StopAfter) { if (StopAfter) {
PM.add(createPrintMIRPass(errs())); PM.add(createPrintMIRPass(Out));
return false; return false;
} }
if (Options.MCOptions.MCSaveTempLabels) if (Options.MCOptions.MCSaveTempLabels)
Context->setAllowTemporaryLabels(false); Context->setAllowTemporaryLabels(false);
const MCSubtargetInfo &STI = *getMCSubtargetInfo(); const MCSubtargetInfo &STI = *getMCSubtargetInfo();
const MCAsmInfo &MAI = *getMCAsmInfo(); const MCAsmInfo &MAI = *getMCAsmInfo();
▲ Show 20 Lines • Show All 106 Lines • Show Last 20 Lines

test/CodeGen/AArch64/branch-folder-merge-mmos.ll

; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null < %s 2>&1 | FileCheck %s ; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o - < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
; Function Attrs: norecurse nounwind ; Function Attrs: norecurse nounwind
define void @foo(i32 %a, i32 %b, float* nocapture %foo_arr) #0 { define void @foo(i32 %a, i32 %b, float* nocapture %foo_arr) #0 {
; CHECK: (load 4 from %ir.arrayidx1.{{i[1-2]}}), (load 4 from %ir.arrayidx1.{{i[1-2]}}) ; CHECK: (load 4 from %ir.arrayidx1.{{i[1-2]}}), (load 4 from %ir.arrayidx1.{{i[1-2]}})
entry: entry:
%cmp = icmp sgt i32 %a, 0 %cmp = icmp sgt i32 %a, 0
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
Show All 24 Lines

test/CodeGen/AArch64/stackmap-frame-setup.ll

; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL ; RUN: llc -o - -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL ; RUN: llc -o - -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() { define void @caller_meta_leaf() {
entry: entry:
%metadata = alloca i64, i32 3, align 8 %metadata = alloca i64, i32 3, align 8
store i64 11, i64* %metadata store i64 11, i64* %metadata
store i64 12, i64* %metadata store i64 12, i64* %metadata
store i64 13, i64* %metadata store i64 13, i64* %metadata
; ISEL: ADJCALLSTACKDOWN 0, implicit-def ; ISEL: ADJCALLSTACKDOWN 0, implicit-def
Show All 10 Lines

test/CodeGen/AMDGPU/detect-dead-lanes.mir

# RUN: llc -march=amdgcn -run-pass detect-dead-lanes -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=amdgcn -run-pass detect-dead-lanes -o - %s | FileCheck %s
--- | --- |
define void @test0() { ret void } define void @test0() { ret void }
define void @test1() { ret void } define void @test1() { ret void }
define void @test2() { ret void } define void @test2() { ret void }
define void @test3() { ret void } define void @test3() { ret void }
define void @test4() { ret void } define void @test4() { ret void }
define void @test5() { ret void } define void @test5() { ret void }
define void @loop0() { ret void } define void @loop0() { ret void }
▲ Show 20 Lines • Show All 419 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/indirect-addressing-undef.mir

# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-lower-control-flow -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-lower-control-flow -o - %s | FileCheck %s
# Getting an undef that is specifically a VGPR is tricky from IR # Getting an undef that is specifically a VGPR is tricky from IR
# CHECK-LABEL: name: extract_undef_offset_vgpr{{$}} # CHECK-LABEL: name: extract_undef_offset_vgpr{{$}}
# CHECK: bb.1: # CHECK: bb.1:
# CHECK: successors: %bb.1(0x40000000 / 0x80000000 = 50.00%), %bb.2(0x40000000 / 0x80000000 = 50.00%) # CHECK: successors: %bb.1(0x40000000 / 0x80000000 = 50.00%), %bb.2(0x40000000 / 0x80000000 = 50.00%)
# CHECK: liveins: %vgpr0_vgpr1_vgpr2_vgpr3{{$}} # CHECK: liveins: %vgpr0_vgpr1_vgpr2_vgpr3{{$}}
# CHECK: V_READFIRSTLANE_B32 undef %vgpr10, implicit %exec # CHECK: V_READFIRSTLANE_B32 undef %vgpr10, implicit %exec
▲ Show 20 Lines • Show All 318 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/rename-independent-subregs.mir

# RUN: llc -march=amdgcn -run-pass rename-independent-subregs -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=amdgcn -run-pass rename-independent-subregs -o - %s | FileCheck %s
--- | --- |
define void @test0() { ret void } define void @test0() { ret void }
... ...
--- ---
# In the test below we have two independent def+use pairs of subregister1 which # In the test below we have two independent def+use pairs of subregister1 which
# can be moved to a new virtual register. The third def of sub1 however is used # can be moved to a new virtual register. The third def of sub1 however is used
# in combination with sub0 and needs to stay with the original vreg. # in combination with sub0 and needs to stay with the original vreg.
# CHECK-LABEL: name: test0 # CHECK-LABEL: name: test0
Show All 21 Lines

test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll

; RUN: llc -o /dev/null %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after expand-isel-pseudos 2>&1 | FileCheck %s ; RUN: llc -o - %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after expand-isel-pseudos | FileCheck %s
; This test verifies that the instruction selection will add the implicit ; This test verifies that the instruction selection will add the implicit
; register operands in the correct order when modifying the opcode of an ; register operands in the correct order when modifying the opcode of an
; instruction to V_ADD_I32_e32. ; instruction to V_ADD_I32_e32.
; CHECK: %{{[0-9]+}} = V_ADD_I32_e32 killed %{{[0-9]+}}, killed %{{[0-9]+}}, implicit-def %vcc, implicit %exec ; CHECK: %{{[0-9]+}} = V_ADD_I32_e32 killed %{{[0-9]+}}, killed %{{[0-9]+}}, implicit-def %vcc, implicit %exec
define void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { define void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
entry: entry:
%b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1 %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
%a = load volatile i32, i32 addrspace(1)* %in %a = load volatile i32, i32 addrspace(1)* %in
%b = load volatile i32, i32 addrspace(1)* %b_ptr %b = load volatile i32, i32 addrspace(1)* %b_ptr
%result = add i32 %a, %b %result = add i32 %a, %b
store i32 %result, i32 addrspace(1)* %out store i32 %result, i32 addrspace(1)* %out
ret void ret void
} }

test/CodeGen/ARM/thumb1-ldst-opt.ll

; RUN: llc -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s ; RUN: llc -stop-after block-placement -o - %s | FileCheck %s
target triple = "thumbv6m-none-none" target triple = "thumbv6m-none-none"
define i32* @foo(i32* readonly %p0) { define i32* @foo(i32* readonly %p0) {
entry: entry:
%add.ptr = getelementptr inbounds i32, i32* %p0, i32 10 %add.ptr = getelementptr inbounds i32, i32* %p0, i32 10
%arrayidx = getelementptr inbounds i32, i32* %p0, i32 13 %arrayidx = getelementptr inbounds i32, i32* %p0, i32 13
%0 = load i32, i32* %arrayidx, align 4 %0 = load i32, i32* %arrayidx, align 4
Show All 18 Lines

test/CodeGen/MIR/AArch64/cfi-def-cfa.mir

# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa operands # This test ensures that the MIR parser parses the .cfi_def_cfa operands
# correctly. # correctly.
--- | --- |
declare void @foo() declare void @foo()
define void @trivial_fp_func() { define void @trivial_fp_func() {
Show All 22 Lines

test/CodeGen/MIR/AArch64/machine-dead-copy.mir

# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s
--- | --- |
define i32 @copyprop1(i32 %a, i32 %b) { ret i32 %a } define i32 @copyprop1(i32 %a, i32 %b) { ret i32 %a }
define i32 @copyprop2(i32 %a, i32 %b) { ret i32 %a } define i32 @copyprop2(i32 %a, i32 %b) { ret i32 %a }
define i32 @copyprop3(i32 %a, i32 %b) { ret i32 %a } define i32 @copyprop3(i32 %a, i32 %b) { ret i32 %a }
define i32 @copyprop4(i32 %a, i32 %b) { ret i32 %a } define i32 @copyprop4(i32 %a, i32 %b) { ret i32 %a }
declare i32 @foo(i32) declare i32 @foo(i32)
... ...
▲ Show 20 Lines • Show All 61 Lines • Show Last 20 Lines

test/CodeGen/MIR/AArch64/machine-scheduler.mir

# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-scheduler -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-scheduler -verify-machineinstrs -o - %s | FileCheck %s
--- | --- |
define i64 @load_imp-def(i64* nocapture %P, i32 %v) { define i64 @load_imp-def(i64* nocapture %P, i32 %v) {
entry: entry:
%0 = bitcast i64* %P to i32* %0 = bitcast i64* %P to i32*
%1 = load i32, i32* %0 %1 = load i32, i32* %0
%conv = zext i32 %1 to i64 %conv = zext i32 %1 to i64
%arrayidx19 = getelementptr inbounds i64, i64* %P, i64 1 %arrayidx19 = getelementptr inbounds i64, i64* %P, i64 1
Show All 26 Lines

test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir

# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser can parse multiple register machine # This test ensures that the MIR parser can parse multiple register machine
# operands before '='. # operands before '='.
--- | --- |
declare void @foo() declare void @foo()
define void @trivial_fp_func() { define void @trivial_fp_func() {
Show All 19 Lines

test/CodeGen/MIR/AArch64/stack-object-local-offset.mir

# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
--- | --- |
@var = global i64 0 @var = global i64 0
@local_addr = global i64* null @local_addr = global i64* null
define void @stack_local() { define void @stack_local() {
entry: entry:
%local_var = alloca i64 %local_var = alloca i64
Show All 32 Lines

test/CodeGen/MIR/AArch64/target-flags.mir

# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
--- | --- |
@var_i32 = global i32 42 @var_i32 = global i32 42
@var_i64 = global i64 0 @var_i64 = global i64 0
define void @sub_small() { define void @sub_small() {
entry: entry:
Show All 30 Lines

test/CodeGen/MIR/AMDGPU/target-index-operands.mir

# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o - %s | FileCheck %s
# This test verifies that the MIR parser can parse target index operands. # This test verifies that the MIR parser can parse target index operands.
--- | --- |
%struct.foo = type { float, [5 x i32] } %struct.foo = type { float, [5 x i32] }
@float_gv = internal unnamed_addr addrspace(2) constant [5 x float] [float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00], align 4 @float_gv = internal unnamed_addr addrspace(2) constant [5 x float] [float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00], align 4
▲ Show 20 Lines • Show All 95 Lines • Show Last 20 Lines

test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir

# RUN: llc -mtriple thumbv7 -verify-machineinstrs -start-after machine-cp -stop-after if-converter %s -o /dev/null 2>&1 | FileCheck %s # RUN: llc -mtriple thumbv7 -verify-machineinstrs -start-after machine-cp -stop-after if-converter %s -o - | FileCheck %s
--- | --- |
; ModuleID = '/Volumes/Data/llvm/test/CodeGen/ARM/sched-it-debug-nodes.ll' ; ModuleID = '/Volumes/Data/llvm/test/CodeGen/ARM/sched-it-debug-nodes.ll'
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv7" target triple = "thumbv7"
%struct.s = type opaque %struct.s = type opaque
; Function Attrs: nounwind ; Function Attrs: nounwind
▲ Show 20 Lines • Show All 155 Lines • Show Last 20 Lines

test/CodeGen/MIR/ARM/bundled-instructions.mir

# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the bundled machine instructions # This test ensures that the MIR parser parses the bundled machine instructions
# and 'internal' register flags correctly. # and 'internal' register flags correctly.
--- | --- |
define i32 @test1(i32 %a) { define i32 @test1(i32 %a) {
entry: entry:
%cmp = icmp sgt i32 %a, -78 %cmp = icmp sgt i32 %a, -78
▲ Show 20 Lines • Show All 66 Lines • Show Last 20 Lines

test/CodeGen/MIR/ARM/cfi-same-value.mir

# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
--- | --- |
declare void @dummy_use(i32*, i32) declare void @dummy_use(i32*, i32)
define void @test_basic() #0 { define void @test_basic() #0 {
entry: entry:
%mem = alloca i32, i32 10 %mem = alloca i32, i32 10
call void @dummy_use(i32* %mem, i32 10) call void @dummy_use(i32* %mem, i32 10)
▲ Show 20 Lines • Show All 71 Lines • Show Last 20 Lines

test/CodeGen/MIR/ARM/imm-peephole-arm.mir

# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s # RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s
# CHECK: [[IN:%.*]] = COPY %r0 # CHECK: [[IN:%.*]] = COPY %r0
# CHECK: [[SUM1TMP:%.*]] = ADDri [[IN]], 133 # CHECK: [[SUM1TMP:%.*]] = ADDri [[IN]], 133
# CHECK: [[SUM1:%.*]] = ADDri killed [[SUM1TMP]], 25600 # CHECK: [[SUM1:%.*]] = ADDri killed [[SUM1TMP]], 25600
# CHECK: [[SUM2TMP:%.*]] = SUBri [[IN]], 133 # CHECK: [[SUM2TMP:%.*]] = SUBri [[IN]], 133
# CHECK: [[SUM2:%.*]] = SUBri killed [[SUM2TMP]], 25600 # CHECK: [[SUM2:%.*]] = SUBri killed [[SUM2TMP]], 25600
▲ Show 20 Lines • Show All 51 Lines • Show Last 20 Lines

test/CodeGen/MIR/ARM/imm-peephole-thumb.mir

# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s # RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s
# CHECK: [[IN:%.*]] = COPY %r0 # CHECK: [[IN:%.*]] = COPY %r0
# CHECK: [[SUM1TMP:%.*]] = t2ADDri [[IN]], 25600 # CHECK: [[SUM1TMP:%.*]] = t2ADDri [[IN]], 25600
# CHECK: [[SUM1:%.*]] = t2ADDri killed [[SUM1TMP]], 133 # CHECK: [[SUM1:%.*]] = t2ADDri killed [[SUM1TMP]], 133
# CHECK: [[SUM2TMP:%.*]] = t2SUBri [[IN]], 25600 # CHECK: [[SUM2TMP:%.*]] = t2SUBri [[IN]], 25600
# CHECK: [[SUM2:%.*]] = t2SUBri killed [[SUM2TMP]], 133 # CHECK: [[SUM2:%.*]] = t2SUBri killed [[SUM2TMP]], 133
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test/CodeGen/MIR/Generic/basic-blocks.mir

# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses machine functions correctly. # This test ensures that the MIR parser parses machine functions correctly.
--- | --- |
define i32 @foo() { define i32 @foo() {
entry: entry:
ret i32 0 ret i32 0
} }
Show All 40 Lines

test/CodeGen/MIR/Generic/frame-info.mir

# RUN: llc -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses machine frame info properties # This test ensures that the MIR parser parses machine frame info properties
# correctly. # correctly.
--- | --- |
define i32 @test(i32 %a) { define i32 @test(i32 %a) {
entry: entry:
%b = alloca i32 %b = alloca i32
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test/CodeGen/MIR/Generic/llvmIR.mir

# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the LLVM IR that's embedded with MIR is parsed # This test ensures that the LLVM IR that's embedded with MIR is parsed
# correctly. # correctly.
--- | --- |
; CHECK: define i32 @foo(i32 %x, i32 %y) ; CHECK: define i32 @foo(i32 %x, i32 %y)
; CHECK: %z = alloca i32, align 4 ; CHECK: %z = alloca i32, align 4
; CHECK: store i32 %x, i32* %z, align 4 ; CHECK: store i32 %x, i32* %z, align 4
; CHECK: br label %Test ; CHECK: br label %Test
Show All 28 Lines

test/CodeGen/MIR/Generic/llvmIRMissing.mir

# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s # RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser accepts files without the LLVM IR. # This test ensures that the MIR parser accepts files without the LLVM IR.
--- ---
# CHECK: name: foo # CHECK: name: foo
name: foo name: foo
body: | body: |
bb.0: bb.0:
... ...

test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir

# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s # RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser preserves unnamed LLVM IR block # This test ensures that the MIR parser preserves unnamed LLVM IR block
# references. # references.
--- | --- |
define i32 @foo() { define i32 @foo() {
ret i32 0 ret i32 0
} }
... ...
--- ---
name: foo name: foo
body: | body: |
; CHECK: bb.0 (%ir-block.0): ; CHECK: bb.0 (%ir-block.0):
bb.0 (%ir-block.0): bb.0 (%ir-block.0):
... ...

test/CodeGen/MIR/Generic/machine-function.mir

# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses machine functions correctly. # This test ensures that the MIR parser parses machine functions correctly.
--- | --- |
define i32 @foo() { define i32 @foo() {
ret i32 0 ret i32 0
} }
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test/CodeGen/MIR/Generic/multiRunPass.mir

# RUN: llc -run-pass expand-isel-pseudos -run-pass peephole-opt -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE # RUN: llc -run-pass expand-isel-pseudos -run-pass peephole-opt -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE
# RUN: llc -run-pass expand-isel-pseudos,peephole-opt -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE # RUN: llc -run-pass expand-isel-pseudos,peephole-opt -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE
# RUN: llc -run-pass peephole-opt -run-pass expand-isel-pseudos -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO # RUN: llc -run-pass peephole-opt -run-pass expand-isel-pseudos -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO
# RUN: llc -run-pass peephole-opt,expand-isel-pseudos -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO # RUN: llc -run-pass peephole-opt,expand-isel-pseudos -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO
# REQUIRES: asserts # REQUIRES: asserts
# This test ensures that the command line accepts # This test ensures that the command line accepts
# several run passes on the same command line and # several run passes on the same command line and
# actually create the proper pipeline for it. # actually create the proper pipeline for it.
# PSEUDO_PEEPHOLE: -expand-isel-pseudos -peephole-opt # PSEUDO_PEEPHOLE: -expand-isel-pseudos -peephole-opt
# PEEPHOLE_PSEUDO: -peephole-opt -expand-isel-pseudos # PEEPHOLE_PSEUDO: -peephole-opt -expand-isel-pseudos
# Make sure there are no other passes happening after what we asked. # Make sure there are no other passes happening after what we asked.
# CHECK-NEXT: --- | # CHECK-NEXT: --- |
--- ---
# CHECK: name: foo # CHECK: name: foo
name: foo name: foo
body: | body: |
bb.0: bb.0:
... ...

test/CodeGen/MIR/Generic/register-info.mir

# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses machine register info properties # This test ensures that the MIR parser parses machine register info properties
# correctly. # correctly.
--- | --- |
define i32 @foo() { define i32 @foo() {
entry: entry:
ret i32 0 ret i32 0
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test/CodeGen/MIR/Hexagon/anti-dep-partial.mir

# RUN: llc -march=hexagon -post-RA-scheduler -run-pass post-RA-sched %s 2>&1 -o /dev/null | FileCheck %s # RUN: llc -march=hexagon -post-RA-scheduler -run-pass post-RA-sched %s -o - | FileCheck %s
--- | --- |
declare void @check(i64, i32, i32, i64) declare void @check(i64, i32, i32, i64)
define void @foo() { define void @foo() {
ret void ret void
} }
... ...
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test/CodeGen/MIR/Lanai/peephole-compare.mir

# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s # RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s
# Test the compare fold peephole. # Test the compare fold peephole.
# CHECK-LABEL: name: test0a # CHECK-LABEL: name: test0a
# TODO: Enhance combiner to handle this case. This expands into: # TODO: Enhance combiner to handle this case. This expands into:
# sub %r7, %r6, %r3 # sub %r7, %r6, %r3
# sub.f %r7, %r6, %r0 # sub.f %r7, %r6, %r0
# sel.eq %r18, %r3, %rv # sel.eq %r18, %r3, %rv
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test/CodeGen/MIR/Mips/memory-operands.mir

# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the call entry pseudo source # This test ensures that the MIR parser parses the call entry pseudo source
# values in memory operands correctly. # values in memory operands correctly.
--- | --- |
define i32 @test(i32 %a) { define i32 @test(i32 %a) {
entry: entry:
%call = call i32 @foo(i32 %a) %call = call i32 @foo(i32 %a)
ret i32 0 ret i32 0
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test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir

# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses floating point constant operands # This test ensures that the MIR parser parses floating point constant operands
# correctly. # correctly.
--- | --- |
define float @test(float %k, i32 %i) { define float @test(float %k, i32 %i) {
entry: entry:
%0 = fpext float %k to double %0 = fpext float %k to double
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test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir

# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o - %s | FileCheck %s
# PR24724 # PR24724
--- | --- |
define signext i32 @main(i32* %p) #0 { define signext i32 @main(i32* %p) #0 {
entry: entry:
%0 = load i32, i32* %p, align 4 %0 = load i32, i32* %p, align 4
%or = or i32 0, %0 %or = or i32 0, %0
store i32 %or, i32* %p, align 4 store i32 %or, i32* %p, align 4
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test/CodeGen/MIR/X86/basic-block-liveins.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses basic block liveins correctly. # This test ensures that the MIR parser parses basic block liveins correctly.
--- | --- |
define i32 @test(i32 %a, i32 %b) { define i32 @test(i32 %a, i32 %b) {
body: body:
%c = add i32 %a, %b %c = add i32 %a, %b
ret i32 %c ret i32 %c
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test/CodeGen/MIR/X86/block-address-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the block address operands # This test ensures that the MIR parser parses the block address operands
# correctly. # correctly.
--- | --- |
@addr = global i8* null @addr = global i8* null
define void @test() { define void @test() {
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test/CodeGen/MIR/X86/callee-saved-info.mir

# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o - %s | FileCheck %s
# This test ensures that the MIR parser parses callee saved information in the # This test ensures that the MIR parser parses callee saved information in the
# stack objects correctly. # stack objects correctly.
--- | --- |
define i32 @compute(i32 %a) { define i32 @compute(i32 %a) {
body: body:
ret i32 %a ret i32 %a
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test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands # This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands
# correctly. # correctly.
--- | --- |
define void @test() { define void @test() {
entry: entry:
%tmp = alloca [4168 x i8], align 4 %tmp = alloca [4168 x i8], align 4
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test/CodeGen/MIR/X86/cfi-def-cfa-register.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa_register # This test ensures that the MIR parser parses the .cfi_def_cfa_register
# operands correctly. # operands correctly.
--- | --- |
define void @func() #0 { define void @func() #0 {
entry: entry:
unreachable unreachable
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test/CodeGen/MIR/X86/cfi-offset.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_offset operands # This test ensures that the MIR parser parses the .cfi_offset operands
# correctly. # correctly.
--- | --- |
declare void @foo(i32) declare void @foo(i32)
define i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) { define i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) {
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test/CodeGen/MIR/X86/constant-pool.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses constant pool constants and # This test ensures that the MIR parser parses constant pool constants and
# constant pool operands correctly. # constant pool operands correctly.
--- | --- |
define double @test(double %a, float %b) { define double @test(double %a, float %b) {
entry: entry:
%c = fadd double %a, 3.250000e+00 %c = fadd double %a, 3.250000e+00
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test/CodeGen/MIR/X86/dead-register-flag.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the 'dead' register flags # This test ensures that the MIR parser parses the 'dead' register flags
# correctly. # correctly.
--- | --- |
define i32 @foo(i32 %a) #0 { define i32 @foo(i32 %a) #0 {
body: body:
%c = mul i32 %a, 11 %c = mul i32 %a, 11
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test/CodeGen/MIR/X86/early-clobber-register-flag.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the 'early-clobber' register # This test ensures that the MIR parser parses the 'early-clobber' register
# flags correctly. # flags correctly.
--- | --- |
declare void @foo(i32) declare void @foo(i32)
define void @test(i32 %a, i32 %b) #0 { define void @test(i32 %a, i32 %b) #0 {
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test/CodeGen/MIR/X86/external-symbol-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the external symbol machine # This test ensures that the MIR parser parses the external symbol machine
# operands correctly. # operands correctly.
--- | --- |
@__stack_chk_guard = external global i8* @__stack_chk_guard = external global i8*
define i32 @test(i32 %n) #0 { define i32 @test(i32 %n) #0 {
entry: entry:
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test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir

# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses fixed stack memory operands # This test ensures that the MIR parser parses fixed stack memory operands
# correctly. # correctly.
--- | --- |
define i32 @test(i32 %a) #0 { define i32 @test(i32 %a) #0 {
entry: entry:
%b = alloca i32 %b = alloca i32
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test/CodeGen/MIR/X86/fixed-stack-objects.mir

# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses fixed stack objects correctly. # This test ensures that the MIR parser parses fixed stack objects correctly.
--- | --- |
define i32 @test(i32 %a) #0 { define i32 @test(i32 %a) #0 {
entry: entry:
%b = alloca i32 %b = alloca i32
store i32 %a, i32* %b store i32 %a, i32* %b
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test/CodeGen/MIR/X86/frame-info-save-restore-points.mir

# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the save and restore points in # This test ensures that the MIR parser parses the save and restore points in
# the machine frame info correctly. # the machine frame info correctly.
--- | --- |
define i32 @foo(i32 %a, i32 %b) { define i32 @foo(i32 %a, i32 %b) {
entry: entry:
%tmp = alloca i32, align 4 %tmp = alloca i32, align 4
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test/CodeGen/MIR/X86/frame-info-stack-references.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the stack protector stack # This test ensures that the MIR parser parses the stack protector stack
# object reference in the machine frame info correctly. # object reference in the machine frame info correctly.
--- | --- |
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1 @.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@__stack_chk_guard = external global i8* @__stack_chk_guard = external global i8*
define i32 @test() #0 { define i32 @test() #0 {
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test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the frame setup instruction flag. # This test ensures that the MIR parser parses the frame setup instruction flag.
--- | --- |
define i32 @compute(i32 %a) { define i32 @compute(i32 %a) {
body: body:
%c = mul i32 %a, 11 %c = mul i32 %a, 11
ret i32 %c ret i32 %c
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test/CodeGen/MIR/X86/function-liveins.mir

# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses machine function's liveins # This test ensures that the MIR parser parses machine function's liveins
# correctly. # correctly.
--- | --- |
define i32 @test(i32 %a, i32 %b) { define i32 @test(i32 %a, i32 %b) {
body: body:
%c = add i32 %a, %b %c = add i32 %a, %b
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test/CodeGen/MIR/X86/generic-virtual-registers.mir

# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# REQUIRES: global-isel # REQUIRES: global-isel
# This test ensures that the MIR parser parses generic virtual # This test ensures that the MIR parser parses generic virtual
# register definitions correctly. # register definitions correctly.
--- | --- |
; ModuleID = 'generic-virtual-registers-type-error.mir' ; ModuleID = 'generic-virtual-registers-type-error.mir'
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
%type_alias = type <2 x i32> %type_alias = type <2 x i32>
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test/CodeGen/MIR/X86/global-value-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses global value operands correctly. # This test ensures that the MIR parser parses global value operands correctly.
--- | --- |
@G = external global i32 @G = external global i32
@0 = external global i32 @0 = external global i32
define i32 @inc() { define i32 @inc() {
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test/CodeGen/MIR/X86/immediate-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses immediate machine operands. # This test ensures that the MIR parser parses immediate machine operands.
--- | --- |
define i32 @foo() { define i32 @foo() {
entry: entry:
ret i32 42 ret i32 42
} }
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test/CodeGen/MIR/X86/implicit-register-flag.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the 'implicit' and 'implicit-def' # This test ensures that the MIR parser parses the 'implicit' and 'implicit-def'
# register flags correctly. # register flags correctly.
--- | --- |
define i32 @foo(i32 %a) { define i32 @foo(i32 %a) {
entry: entry:
%0 = icmp sle i32 %a, 10 %0 = icmp sle i32 %a, 10
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test/CodeGen/MIR/X86/inline-asm-registers.mir

# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o - %s | FileCheck %s
--- | --- |
define i64 @test(i64 %x, i64 %y) #0 { define i64 @test(i64 %x, i64 %y) #0 {
entry: entry:
%x0 = call { i64, i64 } asm "foo", "=r,=r,1,0,~{dirflag},~{fpsr},~{flags}"(i64 %x, i64 %y) #0 %x0 = call { i64, i64 } asm "foo", "=r,=r,1,0,~{dirflag},~{fpsr},~{flags}"(i64 %x, i64 %y) #0
%x1 = extractvalue { i64, i64 } %x0, 0 %x1 = extractvalue { i64, i64 } %x0, 0
ret i64 %x1 ret i64 %x1
} }
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test/CodeGen/MIR/X86/instructions-debug-location.mir

# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the machine instruction's # This test ensures that the MIR parser parses the machine instruction's
# debug location metadata correctly. # debug location metadata correctly.
--- | --- |
define i32 @test(i32 %x) #0 !dbg !4 { define i32 @test(i32 %x) #0 !dbg !4 {
entry: entry:
%x.addr = alloca i32, align 4 %x.addr = alloca i32, align 4
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test/CodeGen/MIR/X86/jump-table-info.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the jump table info and jump # This test ensures that the MIR parser parses the jump table info and jump
# table operands correctly. # table operands correctly.
--- | --- |
define i32 @test_jumptable(i32 %in) { define i32 @test_jumptable(i32 %in) {
entry: entry:
switch i32 %in, label %def [ switch i32 %in, label %def [
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test/CodeGen/MIR/X86/killed-register-flag.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the 'killed' register flags # This test ensures that the MIR parser parses the 'killed' register flags
# correctly. # correctly.
--- | --- |
define i32 @foo(i32 %a) { define i32 @foo(i32 %a) {
entry: entry:
%0 = icmp sle i32 %a, 10 %0 = icmp sle i32 %a, 10
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test/CodeGen/MIR/X86/liveout-register-mask.mir

# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the liveout register mask # This test ensures that the MIR parser parses the liveout register mask
# machine operands correctly. # machine operands correctly.
--- | --- |
define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
entry: entry:
%result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 5, i8* null, i32 2, i64 %p1, i64 %p2) %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 5, i8* null, i32 2, i64 %p1, i64 %p2)
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test/CodeGen/MIR/X86/machine-basic-block-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses machine basic block operands. # This test ensures that the MIR parser parses machine basic block operands.
--- | --- |
define i32 @foo(i32* %p) { define i32 @foo(i32* %p) {
entry: entry:
%a = load i32, i32* %p %a = load i32, i32* %p
%0 = icmp sle i32 %a, 10 %0 = icmp sle i32 %a, 10
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test/CodeGen/MIR/X86/machine-instructions.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses X86 machine instructions # This test ensures that the MIR parser parses X86 machine instructions
# correctly. # correctly.
--- | --- |
define i32 @inc(i32 %a) { define i32 @inc(i32 %a) {
entry: entry:
%b = mul i32 %a, 11 %b = mul i32 %a, 11
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test/CodeGen/MIR/X86/memory-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the machine memory operands # This test ensures that the MIR parser parses the machine memory operands
# correctly. # correctly.
--- | --- |
define i32 @test(i32* %a) { define i32 @test(i32* %a) {
entry: entry:
%b = load i32, i32* %a %b = load i32, i32* %a
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test/CodeGen/MIR/X86/metadata-operands.mir

# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the metadata machine operands # This test ensures that the MIR parser parses the metadata machine operands
# correctly. # correctly.
--- | --- |
define i32 @test(i32 %x) #0 !dbg !4 { define i32 @test(i32 %x) #0 !dbg !4 {
entry: entry:
%x.addr = alloca i32, align 4 %x.addr = alloca i32, align 4
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test/CodeGen/MIR/X86/named-registers.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses X86 registers correctly. # This test ensures that the MIR parser parses X86 registers correctly.
--- | --- |
define i32 @foo() { define i32 @foo() {
entry: entry:
ret i32 0 ret i32 0
} }
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test/CodeGen/MIR/X86/newline-handling.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
--- | --- |
define i32 @foo(i32 %a) { define i32 @foo(i32 %a) {
entry: entry:
%0 = icmp sle i32 %a, 10 %0 = icmp sle i32 %a, 10
br i1 %0, label %less, label %exit br i1 %0, label %less, label %exit
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test/CodeGen/MIR/X86/null-register-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses null register operands correctly. # This test ensures that the MIR parser parses null register operands correctly.
--- | --- |
define i32 @deref(i32* %p) { define i32 @deref(i32* %p) {
entry: entry:
%a = load i32, i32* %p %a = load i32, i32* %p
ret i32 %a ret i32 %a
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test/CodeGen/MIR/X86/register-mask-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses register mask operands correctly. # This test ensures that the MIR parser parses register mask operands correctly.
--- | --- |
define i32 @compute(i32 %a) #0 { define i32 @compute(i32 %a) #0 {
body: body:
%c = mul i32 %a, 11 %c = mul i32 %a, 11
ret i32 %c ret i32 %c
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test/CodeGen/MIR/X86/simple-register-allocation-hints.mir

# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o - %s | FileCheck %s
# This test ensures that the MIR parser parses simple register allocation hints # This test ensures that the MIR parser parses simple register allocation hints
# correctly. # correctly.
--- | --- |
define i32 @test(i32 %a, i32 %b) { define i32 @test(i32 %a, i32 %b) {
body: body:
%c = mul i32 %a, %b %c = mul i32 %a, %b
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test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses fixed stack objects correctly. # This test ensures that the MIR parser parses fixed stack objects correctly.
--- | --- |
define i32 @test(i32 %a) #0 { define i32 @test(i32 %a) #0 {
entry: entry:
%b = alloca i32 %b = alloca i32
store i32 %a, i32* %b store i32 %a, i32* %b
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test/CodeGen/MIR/X86/stack-object-debug-info.mir

# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the stack object's debug info # This test ensures that the MIR parser parses the stack object's debug info
# correctly. # correctly.
--- | --- |
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
define void @foo() #1 { define void @foo() #1 {
entry: entry:
%x.i = alloca i8, align 1 %x.i = alloca i8, align 1
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test/CodeGen/MIR/X86/stack-object-operands.mir

# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses stack object machine operands # This test ensures that the MIR parser parses stack object machine operands
# correctly. # correctly.
--- | --- |
define i32 @test(i32 %a) { define i32 @test(i32 %a) {
entry: entry:
%b = alloca i32 %b = alloca i32
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test/CodeGen/MIR/X86/stack-objects.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses stack objects correctly. # This test ensures that the MIR parser parses stack objects correctly.
--- | --- |
define i32 @test(i32 %a) #0 { define i32 @test(i32 %a) #0 {
entry: entry:
%b = alloca i32 %b = alloca i32
%x = alloca i64 %x = alloca i64
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test/CodeGen/MIR/X86/subregister-index-operands.mir

# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses and prints subregisters index # This test ensures that the MIR parser parses and prints subregisters index
# operands correctly. # operands correctly.
--- | --- |
define zeroext i1 @t(i1 %c) { define zeroext i1 @t(i1 %c) {
entry: entry:
ret i1 %c ret i1 %c
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test/CodeGen/MIR/X86/subregister-operands.mir

# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses subregisters in register operands # This test ensures that the MIR parser parses subregisters in register operands
# correctly. # correctly.
--- | --- |
define zeroext i1 @t(i1 %c) { define zeroext i1 @t(i1 %c) {
entry: entry:
ret i1 %c ret i1 %c
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test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses basic block successors and # This test ensures that the MIR parser parses basic block successors and
# probabilities correctly. # probabilities correctly.
--- | --- |
define i32 @foo(i32 %a) { define i32 @foo(i32 %a) {
entry: entry:
%0 = icmp sle i32 %a, 10 %0 = icmp sle i32 %a, 10
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test/CodeGen/MIR/X86/successor-basic-blocks.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses basic block successors correctly. # This test ensures that the MIR parser parses basic block successors correctly.
--- | --- |
define i32 @foo(i32 %a) { define i32 @foo(i32 %a) {
entry: entry:
%0 = icmp sle i32 %a, 10 %0 = icmp sle i32 %a, 10
br i1 %0, label %less, label %exit br i1 %0, label %less, label %exit
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test/CodeGen/MIR/X86/undef-register-flag.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the 'undef' register flags # This test ensures that the MIR parser parses the 'undef' register flags
# correctly. # correctly.
--- | --- |
define i32 @compute(i32 %a) #0 { define i32 @compute(i32 %a) #0 {
body: body:
%c = mul i32 %a, 11 %c = mul i32 %a, 11
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test/CodeGen/MIR/X86/used-physical-register-info.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses the callee saved register mask # This test ensures that the MIR parser parses the callee saved register mask
# correctly and that the MIR parser can infer it as well. # correctly and that the MIR parser can infer it as well.
--- | --- |
define i32 @compute(i32 %a) #0 { define i32 @compute(i32 %a) #0 {
body: body:
%c = mul i32 %a, 11 %c = mul i32 %a, 11
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test/CodeGen/MIR/X86/variable-sized-stack-objects.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s
# This test ensures that the MIR parser parses variable sized stack objects # This test ensures that the MIR parser parses variable sized stack objects
# correctly. # correctly.
--- | --- |
define i32 @test(i32 %a) { define i32 @test(i32 %a) {
entry: entry:
%b = alloca i32 %b = alloca i32
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test/CodeGen/MIR/X86/virtual-registers.mir

# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
# This test ensures that the MIR parser parses virtual register definitions and # This test ensures that the MIR parser parses virtual register definitions and
# references correctly. # references correctly.
--- | --- |
define i32 @bar(i32 %a) { define i32 @bar(i32 %a) {
entry: entry:
%0 = icmp sle i32 %a, 10 %0 = icmp sle i32 %a, 10
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test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir

# RUN: llc -start-after=dead-mi-elimination -stop-after=twoaddressinstruction -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -start-after=dead-mi-elimination -stop-after=twoaddressinstruction -o - %s | FileCheck %s
--- | --- |
target datalayout = "E-m:e-i64:64-n32:64" target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
@d = global i32 15, align 4 @d = global i32 15, align 4
@b = global i32* @d, align 8 @b = global i32* @d, align 8
@a = common global i32 0, align 4 @a = common global i32 0, align 4
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test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir

# RUN: llc -start-after=machine-sink -stop-after=peephole-opt -mtriple=powerpc64-unknown-linux-gnu -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -start-after=machine-sink -stop-after=peephole-opt -mtriple=powerpc64-unknown-linux-gnu -o - %s | FileCheck %s
--- | --- |
; ModuleID = '<stdin>' ; ModuleID = '<stdin>'
source_filename = "<stdin>" source_filename = "<stdin>"
target datalayout = "E-m:e-i64:64-n32:64" target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
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test/CodeGen/PowerPC/stackmap-frame-setup.ll

; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL ; RUN: llc -o - -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL ; RUN: llc -o - -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() { define void @caller_meta_leaf() {
entry: entry:
%metadata = alloca i64, i32 3, align 8 %metadata = alloca i64, i32 3, align 8
store i64 11, i64* %metadata store i64 11, i64* %metadata
store i64 12, i64* %metadata store i64 12, i64* %metadata
store i64 13, i64* %metadata store i64 13, i64* %metadata
; ISEL: ADJCALLSTACKDOWN 0, implicit-def ; ISEL: ADJCALLSTACKDOWN 0, implicit-def
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test/CodeGen/X86/eflags-copy-expansion.mir

# RUN: llc -run-pass postrapseudos -mtriple=i386-apple-macosx -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -run-pass postrapseudos -mtriple=i386-apple-macosx -o - %s | FileCheck %s
# Verify that we correctly save and restore eax when copying eflags, # Verify that we correctly save and restore eax when copying eflags,
# even when only a smaller alias of eax is used. We used to check only # even when only a smaller alias of eax is used. We used to check only
# eax and not its aliases. # eax and not its aliases.
# PR27624. # PR27624.
--- | --- |
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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test/CodeGen/X86/expand-vr64-gr64-copy.mir

# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o - %s | FileCheck %s
# This test verifies that the ExpandPostRA pass expands the GR64 <-> VR64 # This test verifies that the ExpandPostRA pass expands the GR64 <-> VR64
# copies into appropriate MMX_MOV instructions. # copies into appropriate MMX_MOV instructions.
--- | --- |
define <2 x i32> @test_pswapdsi(<2 x i32> %a) nounwind readnone { define <2 x i32> @test_pswapdsi(<2 x i32> %a) nounwind readnone {
entry: entry:
%0 = bitcast <2 x i32> %a to x86_mmx %0 = bitcast <2 x i32> %a to x86_mmx
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test/CodeGen/X86/fixup-bw-copy.mir

# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o - %s | FileCheck %s
# Verify that we correctly deal with the flag edge cases when replacing # Verify that we correctly deal with the flag edge cases when replacing
# copies by bigger copies, which is a pretty unusual transform. # copies by bigger copies, which is a pretty unusual transform.
--- | --- |
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
define i8 @test_movb_killed(i8 %a0) { define i8 @test_movb_killed(i8 %a0) {
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test/CodeGen/X86/fixup-bw-inst-fwlive.mir

# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o - %s | FileCheck %s
# Verify that the forwards live-ness checking code in fixup-bw-inst works. # Verify that the forwards live-ness checking code in fixup-bw-inst works.
--- | --- |
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
define i8 @foo(i8 %p1) { define i8 @foo(i8 %p1) {
entry: entry:
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test/CodeGen/X86/implicit-null-checks.mir

# RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s
--- | --- |
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx" target triple = "x86_64-apple-macosx"
;; Positive test ;; Positive test
define i32 @imp_null_check_with_bitwise_op_0(i32* %x, i32 %val) { define i32 @imp_null_check_with_bitwise_op_0(i32* %x, i32 %val) {
entry: entry:
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test/CodeGen/X86/machine-combiner-int.ll

; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -o /dev/null 2>&1 | FileCheck %s --check-prefix=DEAD ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -o - | FileCheck %s --check-prefix=DEAD
; Verify that integer multiplies are reassociated. The first multiply in ; Verify that integer multiplies are reassociated. The first multiply in
; each test should be independent of the result of the preceding add (lea). ; each test should be independent of the result of the preceding add (lea).
; TODO: This test does not actually test i16 machine instruction reassociation ; TODO: This test does not actually test i16 machine instruction reassociation
; because the operands are being promoted to i32 types. ; because the operands are being promoted to i32 types.
define i16 @reassociate_muls_i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3) { define i16 @reassociate_muls_i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3) {
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test/CodeGen/X86/machine-copy-prop.mir

# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s
--- | --- |
declare void @foo() declare void @foo()
define void @copyprop_remove_kill0() { ret void } define void @copyprop_remove_kill0() { ret void }
define void @copyprop_remove_kill1() { ret void } define void @copyprop_remove_kill1() { ret void }
define void @copyprop_remove_kill2() { ret void } define void @copyprop_remove_kill2() { ret void }
define void @copyprop0() { ret void } define void @copyprop0() { ret void }
define void @copyprop1() { ret void } define void @copyprop1() { ret void }
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test/CodeGen/X86/patchpoint-verifiable.mir

# RUN: llc -mtriple=x86_64-apple-darwin -stop-after branch-folder -start-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=x86_64-apple-darwin -stop-after branch-folder -start-after branch-folder -o - %s | FileCheck %s
# This test verifies that the machine verifier won't report an error when # This test verifies that the machine verifier won't report an error when
# verifying the PATCHPOINT instruction. # verifying the PATCHPOINT instruction.
--- | --- |
define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
entry: entry:
%result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 5, i8* null, i32 2, i64 %p1, i64 %p2) %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 5, i8* null, i32 2, i64 %p1, i64 %p2)
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test/CodeGen/X86/pr27681.mir

# RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=slm -run-pass post-RA-sched -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=slm -run-pass post-RA-sched -o - %s | FileCheck %s
# #
# Verify that the critical antidependence breaker does not consider # Verify that the critical antidependence breaker does not consider
# a high byte register as available as a replacement register # a high byte register as available as a replacement register
# in a certain context. # in a certain context.
--- | --- |
define void @main() { ret void } define void @main() { ret void }
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test/CodeGen/X86/stackmap-frame-setup.ll

; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL ; RUN: llc -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL ; RUN: llc -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() { define void @caller_meta_leaf() {
entry: entry:
%metadata = alloca i64, i32 3, align 8 %metadata = alloca i64, i32 3, align 8
store i64 11, i64* %metadata store i64 11, i64* %metadata
store i64 12, i64* %metadata store i64 12, i64* %metadata
store i64 13, i64* %metadata store i64 13, i64* %metadata
; ISEL: ADJCALLSTACKDOWN64 0, 0, implicit-def ; ISEL: ADJCALLSTACKDOWN64 0, 0, implicit-def
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test/CodeGen/X86/update-terminator.mir

# RUN: llc -march=x86-64 -verify-machineinstrs -run-pass block-placement -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -march=x86-64 -verify-machineinstrs -run-pass block-placement -o - %s | FileCheck %s
# Check the conditional jump in bb.1 is changed to unconditional after block placement swaps bb.2 and bb.3. # Check the conditional jump in bb.1 is changed to unconditional after block placement swaps bb.2 and bb.3.
--- | --- |
@a = external global i16 @a = external global i16
@b = external global i32 @b = external global i32
; Function Attrs: nounwind ; Function Attrs: nounwind
define void @f2() { define void @f2() {
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test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll

; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after machine-scheduler %s 2>&1 | FileCheck %s --check-prefix=PRE-RA ; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA
; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after prologepilog %s 2>&1 | FileCheck %s --check-prefix=POST-RA ; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA
; This test verifies that the virtual register references in machine function's ; This test verifies that the virtual register references in machine function's
; liveins are cleared after register allocation. ; liveins are cleared after register allocation.
define i32 @test(i32 %a, i32 %b) { define i32 @test(i32 %a, i32 %b) {
body: body:
%c = mul i32 %a, %b %c = mul i32 %a, %b
ret i32 %c ret i32 %c
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test/DebugInfo/MIR/X86/live-debug-values-3preds.mir

# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s | FileCheck %s
# Test the extension of debug ranges from 3 predecessors. # Test the extension of debug ranges from 3 predecessors.
# Generated from the source file LiveDebugValues-3preds.c: # Generated from the source file LiveDebugValues-3preds.c:
# #include <stdio.h> # #include <stdio.h>
# int add(int x, int y, int z, int a) { # int add(int x, int y, int z, int a) {
# int i; # int i;
# for (i = 0; i < x * y; i++) { # for (i = 0; i < x * y; i++) {
# if (i < x) { # if (i < x) {
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test/DebugInfo/MIR/X86/live-debug-values.mir

# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s # RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s | FileCheck %s
# Test the extension of debug ranges from predecessors. # Test the extension of debug ranges from predecessors.
# Generated from the source file LiveDebugValues.c: # Generated from the source file LiveDebugValues.c:
# #include <stdio.h> # #include <stdio.h>
# int m; # int m;
# extern int inc(int n); # extern int inc(int n);
# extern int change(int n); # extern int change(int n);
# extern int modify(int n); # extern int modify(int n);
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test/DebugInfo/X86/bbjoin.ll

; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 %s -stop-after=livedebugvars \ ; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 %s -stop-after=livedebugvars \
; RUN: -o %t.s 2>&1 | FileCheck %s ; RUN: -o - | FileCheck %s
; Generated from: ; Generated from:
; void g(int *); ; void g(int *);
; int f() { ; int f() {
; int x = 23; ; int x = 23;
; g(&x); ; g(&x);
; if (x == 42) ; if (x == 42)
; ++x; ; ++x;
; return x; // check that x is not a constant here. ; return x; // check that x is not a constant here.
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test/DebugInfo/X86/float_const_loclist.ll

; RUN: llc %s -stop-after=livedebugvalues -o %t 2>&1 | FileCheck --check-prefix=SANITY %s ; RUN: llc %s -stop-after=livedebugvalues -o - | FileCheck --check-prefix=SANITY %s
; RUN: llc < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s ; RUN: llc < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s
; Test debug_loc support for floating point constants. ; Test debug_loc support for floating point constants.
; ;
; Created from clang -O1: ; Created from clang -O1:
; void barrier(); ; void barrier();
; void foo() { ; void foo() {
; float f; ; float f;
; long double ld; ; long double ld;
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test/DebugInfo/X86/safestack-byval.ll

; Test dwarf codegen for DILocalVariable of a byval function argument that ; Test dwarf codegen for DILocalVariable of a byval function argument that
; points to neither an argument nor an alloca. This kind of IR is generated by ; points to neither an argument nor an alloca. This kind of IR is generated by
; SafeStack for unsafe byval arguments. ; SafeStack for unsafe byval arguments.
; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s ; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o - | FileCheck %s
; This was built by compiling the following source with SafeStack and ; This was built by compiling the following source with SafeStack and
; simplifying the result a little. ; simplifying the result a little.
; struct S { ; struct S {
; int a[100]; ; int a[100];
; }; ; };
; ;
; int f(S zzz, unsigned long len) { ; int f(S zzz, unsigned long len) {
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test/DebugInfo/X86/single-dbg_value.ll

; RUN: %llc_dwarf -stop-after=livedebugvalues -o /dev/null %s 2>&1 \ ; RUN: %llc_dwarf -stop-after=livedebugvalues -o - %s \
; RUN: | FileCheck %s --check-prefix=SANITY ; RUN: | FileCheck %s --check-prefix=SANITY
; RUN: %llc_dwarf -march=x86-64 -o - %s -filetype=obj \ ; RUN: %llc_dwarf -march=x86-64 -o - %s -filetype=obj \
; RUN: | llvm-dwarfdump -debug-dump=all - | FileCheck %s ; RUN: | llvm-dwarfdump -debug-dump=all - | FileCheck %s
; ;
; CHECK: .debug_info contents: ; CHECK: .debug_info contents:
; CHECK: DW_TAG_variable ; CHECK: DW_TAG_variable
; CHECK-NEXT: DW_AT_location [DW_FORM_data4] ; CHECK-NEXT: DW_AT_location [DW_FORM_data4]
; CHECK-NEXT: DW_AT_name{{.*}}"a" ; CHECK-NEXT: DW_AT_name{{.*}}"a"
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tools/llc/llc.cpp

Show First 20 Lines • Show All 433 Lines • ▼ Show 20 Lines if (!RunPassNames->empty()) {
<< PI->getPassName() << "\n"; << PI->getPassName() << "\n";
return 1; return 1;
} }
std::string Banner std::string Banner
= std::string("After ") + std::string(P->getPassName()); = std::string("After ") + std::string(P->getPassName());
PM.add(P); PM.add(P);
TPC->printAndVerify(Banner); TPC->printAndVerify(Banner);
} }
PM.add(createPrintMIRPass(errs())); PM.add(createPrintMIRPass(*OS));
} else { } else {
if (!StartAfter.empty()) { if (!StartAfter.empty()) {
const PassInfo *PI = PR->getPassInfo(StartAfter); const PassInfo *PI = PR->getPassInfo(StartAfter);
if (!PI) { if (!PI) {
errs() << argv[0] << ": start-after pass is not registered.\n"; errs() << argv[0] << ": start-after pass is not registered.\n";
return 1; return 1;
} }
StartAfterID = PI->getTypeInfo(); StartAfterID = PI->getTypeInfo();
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