[esan|wset] Fix incorrect memory size assert

[bruening]

Summary

Fixes an incorrect assert that fails on 128-bit-sized loads or stores.
Augments the wset tests to include this case.

lib/Transforms/Instrumentation/EfficiencySanitizer.cpp

IRB.CreateCall(OnAccessFunc,
                    {IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()),
                     ConstantInt::get(IntptrTy, TypeSizeBytes)});
   } else {
     if (ClInstrumentFastpath &&
         instrumentFastpath(I, DL, IsStore, Addr, Alignment)) {
       NumFastpaths++;
       return true;
     }
-    if (Alignment == 0 || Alignment >= 8 || (Alignment % TypeSizeBytes) == 0)
+    if (Alignment == 0 || (Alignment % TypeSizeBytes) == 0)
       OnAccessFunc = IsStore ? EsanAlignedStore[Idx] : EsanAlignedLoad[Idx];
     else
       OnAccessFunc = IsStore ? EsanUnalignedStore[Idx] : EsanUnalignedLoad[Idx];
     IRB.CreateCall(OnAccessFunc,
                    IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
   }
   return true;
 }
bool EfficiencySanitizer::instrumentFastpathWorkingSet(
   IRBuilder<> IRB(I);
   Type *OrigTy = cast<PointerType>(Addr->getType())->getElementType();
   const uint32_t TypeSize = DL.getTypeStoreSizeInBits(OrigTy);
   // Bail to the slowpath if the access might touch multiple cache lines.
   // An access aligned to its size is guaranteed to be intra-cache-line.
   // getMemoryAccessFuncIndex has already ruled out a size larger than 16
   // and thus larger than a cache line for platforms this tool targets
   // (and our shadow memory setup assumes 64-byte cache lines).
-  assert(TypeSize <= 64);
+  assert(TypeSize <= 128);
   if (!(TypeSize == 8 ||
         (Alignment % (TypeSize / 8)) == 0)) {
     if (ClAssumeIntraCacheLine)
       ++NumAssumedIntraCacheLine;
     else
       return false;
   }
 

test/Instrumentation/EfficiencySanitizer/working_set_basic.ll

 ; CHECK:        %9 = or i8 %5, -127
 ; CHECK-NEXT:   %10 = inttoptr i64 %3 to i8*
 ; CHECK-NEXT:   store i8 %9, i8* %10
 ; CHECK-NEXT:   br label %11
 ; CHECK:        %tmp1 = load i64, i64* %a, align 8
 ; CHECK-NEXT:   ret i64 %tmp1
 }
 
+define i128 @aligned16(i128* %a) {
+entry:
+  %tmp1 = load i128, i128* %a, align 16
+  ret i128 %tmp1
+; CHECK:        %0 = ptrtoint i128* %a to i64
+; CHECK-NEXT:   %1 = and i64 %0, 17592186044415
+; CHECK-NEXT:   %2 = add i64 %1, 1337006139375616
+; CHECK-NEXT:   %3 = lshr i64 %2, 6
+; CHECK-NEXT:   %4 = inttoptr i64 %3 to i8*
+; CHECK-NEXT:   %5 = load i8, i8* %4
+; CHECK-NEXT:   %6 = and i8 %5, -127
+; CHECK-NEXT:   %7 = icmp ne i8 %6, -127
+; CHECK-NEXT:   br i1 %7, label %8, label %11
+; CHECK:        %9 = or i8 %5, -127
+; CHECK-NEXT:   %10 = inttoptr i64 %3 to i8*
+; CHECK-NEXT:   store i8 %9, i8* %10
+; CHECK-NEXT:   br label %11
+; CHECK:        %tmp1 = load i128, i128* %a, align 16
+; CHECK-NEXT:   ret i128 %tmp1
+}
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Not guaranteed to be intra-cache-line, but our defaults are to
 ; assume they are:
 
 define i16 @unaligned2(i16* %a) {
 entry:
   %tmp1 = load i16, i16* %a, align 1
   ret i16 %tmp1

 ; CHECK:        %9 = or i8 %5, -127
 ; CHECK-NEXT:   %10 = inttoptr i64 %3 to i8*
 ; CHECK-NEXT:   store i8 %9, i8* %10
 ; CHECK-NEXT:   br label %11
 ; CHECK:        %tmp1 = load i64, i64* %a, align 4
 ; CHECK-NEXT:   ret i64 %tmp1
 }
 
+define i128 @unaligned16(i128* %a) {
+entry:
+  %tmp1 = load i128, i128* %a, align 8
+  ret i128 %tmp1
+; CHECK:        %0 = ptrtoint i128* %a to i64
+; CHECK-NEXT:   %1 = and i64 %0, 17592186044415
+; CHECK-NEXT:   %2 = add i64 %1, 1337006139375616
+; CHECK-NEXT:   %3 = lshr i64 %2, 6
+; CHECK-NEXT:   %4 = inttoptr i64 %3 to i8*
+; CHECK-NEXT:   %5 = load i8, i8* %4
+; CHECK-NEXT:   %6 = and i8 %5, -127
+; CHECK-NEXT:   %7 = icmp ne i8 %6, -127
+; CHECK-NEXT:   br i1 %7, label %8, label %11
+; CHECK:        %9 = or i8 %5, -127
+; CHECK-NEXT:   %10 = inttoptr i64 %3 to i8*
+; CHECK-NEXT:   store i8 %9, i8* %10
+; CHECK-NEXT:   br label %11
+; CHECK:        %tmp1 = load i128, i128* %a, align 8
+; CHECK-NEXT:   ret i128 %tmp1
+}
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Ensure that esan converts intrinsics to calls:
 
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
 declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
 
 define void @memCpyTest(i8* nocapture %x, i8* nocapture %y) {

test/Instrumentation/EfficiencySanitizer/working_set_strict.ll

 ; CHECK:        %9 = or i8 %5, -127
 ; CHECK-NEXT:   %10 = inttoptr i64 %3 to i8*
 ; CHECK-NEXT:   store i8 %9, i8* %10
 ; CHECK-NEXT:   br label %11
 ; CHECK:        %tmp1 = load i64, i64* %a, align 8
 ; CHECK-NEXT:   ret i64 %tmp1
 }
 
+define i128 @aligned16(i128* %a) {
+entry:
+  %tmp1 = load i128, i128* %a, align 16
+  ret i128 %tmp1
+; CHECK:        %0 = ptrtoint i128* %a to i64
+; CHECK-NEXT:   %1 = and i64 %0, 17592186044415
+; CHECK-NEXT:   %2 = add i64 %1, 1337006139375616
+; CHECK-NEXT:   %3 = lshr i64 %2, 6
+; CHECK-NEXT:   %4 = inttoptr i64 %3 to i8*
+; CHECK-NEXT:   %5 = load i8, i8* %4
+; CHECK-NEXT:   %6 = and i8 %5, -127
+; CHECK-NEXT:   %7 = icmp ne i8 %6, -127
+; CHECK-NEXT:   br i1 %7, label %8, label %11
+; CHECK:        %9 = or i8 %5, -127
+; CHECK-NEXT:   %10 = inttoptr i64 %3 to i8*
+; CHECK-NEXT:   store i8 %9, i8* %10
+; CHECK-NEXT:   br label %11
+; CHECK:        %tmp1 = load i128, i128* %a, align 16
+; CHECK-NEXT:   ret i128 %tmp1
+}
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Not guaranteed to be intra-cache-line
 
 define i16 @unaligned2(i16* %a) {
 entry:
   %tmp1 = load i16, i16* %a, align 1
   ret i16 %tmp1
 ; CHECK:        %0 = bitcast i16* %a to i8*

 entry:
   %tmp1 = load i64, i64* %a, align 4
   ret i64 %tmp1
 ; CHECK:        %0 = bitcast i64* %a to i8*
 ; CHECK-NEXT:   call void @__esan_unaligned_load8(i8* %0)
 ; CHECK-NEXT:   %tmp1 = load i64, i64* %a, align 4
 ; CHECK-NEXT:   ret i64 %tmp1
 }
+
+define i128 @unaligned16(i128* %a) {
+entry:
+  %tmp1 = load i128, i128* %a, align 8
+  ret i128 %tmp1
+; CHECK:        %0 = bitcast i128* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_load16(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i128, i128* %a, align 8
+; CHECK-NEXT:   ret i128 %tmp1
+}