This is an archive of the discontinued LLVM Phabricator instance.

Differential D21646

AMDGPU/SI: Add support for R_AMDGPU_ABS32
ClosedPublic

Authored by kzhuravl on Jun 23 2016, 9:10 AM.

Details

Reviewers
• tstellarAMD
• rafael
Commits
rG155626238b4f: AMDGPU/SI: Add support for R_AMDGPU_ABS32
rL276294: AMDGPU/SI: Add support for R_AMDGPU_ABS32

Diff Detail

Event Timeline

kzhuravl updated this revision to Diff 61685.Jun 23 2016, 9:10 AM
kzhuravl retitled this revision from to AMDGPU/SI: Add support for R_AMDGPU_ABS32.
kzhuravl updated this object.
kzhuravl added reviewers: • tstellarAMD, • rafael.
kzhuravl added a subscriber: llvm-commits.
Herald added subscribers: kzhuravl, arsenm. · View Herald TranscriptJun 23 2016, 9:10 AM
kzhuravl updated this revision to Diff 61700.Jun 23 2016, 10:50 AM

Rebase

• tstellarAMD added inline comments.Jun 24 2016, 6:58 PM
test/MC/AMDGPU/relocs-abs32.s
131–145 ↗(On Diff #61700)

These comment sections should be dropped.

kzhuravl updated this revision to Diff 63140.Jul 7 2016, 2:35 PM

Rebase and update test

kzhuravl updated this revision to Diff 63264.Jul 8 2016, 11:16 AM

Update test

kzhuravl added a comment.Jul 14 2016, 10:09 AM

Ping

• tstellarAMD added inline comments.Jul 18 2016, 7:03 AM
test/MC/AMDGPU/elf64-dwarf-relocs.s
1–4

This test case should be minimal like the one you add for lld.

kzhuravl updated this revision to Diff 64524.Jul 19 2016, 10:47 AM

Update test

kzhuravl updated this revision to Diff 64532.Jul 19 2016, 11:53 AM

Update test

• tstellarAMD accepted this revision.Jul 21 2016, 7:42 AM
• tstellarAMD edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Jul 21 2016, 7:42 AM
Closed by commit rL276294: AMDGPU/SI: Add support for R_AMDGPU_ABS32 (authored by kzhuravl). · Explain WhyJul 21 2016, 8:36 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
include/
llvm/
Object/
13 lines
lib/
Target/
AMDGPU/
MCTargetDesc/
1 line
test/
MC/
AMDGPU/
128 lines

Diff 63264

include/llvm/Object/RelocVisitor.h

Show First 20 Lines • Show All 133 Lines • ▼ Show 20 Lines if (ObjToVisit.getBytesInAddress() == 8) { // 64-bit object file
return visitELF_SPARCV9_32(R, Value); return visitELF_SPARCV9_32(R, Value);
case llvm::ELF::R_SPARC_64: case llvm::ELF::R_SPARC_64:
case llvm::ELF::R_SPARC_UA64: case llvm::ELF::R_SPARC_UA64:
return visitELF_SPARCV9_64(R, Value); return visitELF_SPARCV9_64(R, Value);
default: default:
HasError = true; HasError = true;
return RelocToApply(); return RelocToApply();
} }
case Triple::amdgcn:
switch (RelocType) {
case llvm::ELF::R_AMDGPU_ABS32:
return visitELF_AMDGPU_ABS32(R, Value);
default:
HasError = true;
return RelocToApply();
}
default: default:
HasError = true; HasError = true;
return RelocToApply(); return RelocToApply();
} }
} else if (ObjToVisit.getBytesInAddress() == 4) { // 32-bit object file } else if (ObjToVisit.getBytesInAddress() == 4) { // 32-bit object file
switch (ObjToVisit.getArch()) { switch (ObjToVisit.getArch()) {
case Triple::x86: case Triple::x86:
switch (RelocType) { switch (RelocType) {
▲ Show 20 Lines • Show All 248 Lines • ▼ Show 20 Lines RelocToApply visitELF_ARM_ABS32(RelocationRef R, uint64_t Value) {
// Overflow check allows for both signed and unsigned interpretation. // Overflow check allows for both signed and unsigned interpretation.
if (Res < INT32_MIN || Res > UINT32_MAX) if (Res < INT32_MIN || Res > UINT32_MAX)
HasError = true; HasError = true;
return RelocToApply(static_cast<uint32_t>(Res), 4); return RelocToApply(static_cast<uint32_t>(Res), 4);
} }
RelocToApply visitELF_AMDGPU_ABS32(RelocationRef R, uint64_t Value) {
int64_t Addend = getELFAddend(R);
return RelocToApply(Value + Addend, 4);
}
/// I386 COFF /// I386 COFF
RelocToApply visitCOFF_I386_SECREL(RelocationRef R, uint64_t Value) { RelocToApply visitCOFF_I386_SECREL(RelocationRef R, uint64_t Value) {
return RelocToApply(static_cast<uint32_t>(Value), /*Width=*/4); return RelocToApply(static_cast<uint32_t>(Value), /*Width=*/4);
} }
RelocToApply visitCOFF_I386_DIR32(RelocationRef R, uint64_t Value) { RelocToApply visitCOFF_I386_DIR32(RelocationRef R, uint64_t Value) {
return RelocToApply(static_cast<uint32_t>(Value), /*Width=*/4); return RelocToApply(static_cast<uint32_t>(Value), /*Width=*/4);
} }
Show All 21 Lines

lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp

Show First 20 Lines • Show All 50 Lines • ▼ Show 20 Linesunsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
case MCSymbolRefExpr::VK_GOTPCREL: case MCSymbolRefExpr::VK_GOTPCREL:
return ELF::R_AMDGPU_GOTPCREL; return ELF::R_AMDGPU_GOTPCREL;
} }
switch (Fixup.getKind()) { switch (Fixup.getKind()) {
default: break; default: break;
case FK_PCRel_4: case FK_PCRel_4:
return ELF::R_AMDGPU_REL32; return ELF::R_AMDGPU_REL32;
case FK_Data_4:
case FK_SecRel_4: case FK_SecRel_4:
return ELF::R_AMDGPU_ABS32; return ELF::R_AMDGPU_ABS32;
} }
llvm_unreachable("unhandled relocation type"); llvm_unreachable("unhandled relocation type");
} }
MCObjectWriter *llvm::createAMDGPUELFObjectWriter(bool Is64Bit, MCObjectWriter *llvm::createAMDGPUELFObjectWriter(bool Is64Bit,
bool HasRelocationAddend, bool HasRelocationAddend,
raw_pwrite_stream &OS) { raw_pwrite_stream &OS) {
MCELFObjectTargetWriter *MOTW = MCELFObjectTargetWriter *MOTW =
new AMDGPUELFObjectWriter(Is64Bit, HasRelocationAddend); new AMDGPUELFObjectWriter(Is64Bit, HasRelocationAddend);
return createELFObjectWriter(MOTW, OS, true); return createELFObjectWriter(MOTW, OS, true);
} }

test/MC/AMDGPU/elf64-dwarf-relocs.s

; RUN: llvm-mc -filetype=obj -triple=amdgcn--amdhsa -mcpu=fiji %s -o %t.o
; RUN: llvm-readobj -r %t.o | FileCheck %s --check-prefix=READOBJ
; RUN: llvm-dwarfdump -debug-dump=info %t.o | FileCheck %s --check-prefix=DWARFDUMP
tstellarAMDUnsubmitted
Not Done
ReplyInline Actions

This test case should be minimal like the one you add for lld.

tstellarAMD: This test case should be minimal like the one you add for lld.
; READOBJ: Relocations [
; READOBJ: Section (6) .rela.debug_info {
; READOBJ: R_AMDGPU_ABS32 .debug_abbrev
; READOBJ: R_AMDGPU_ABS32 .debug_str
; READOBJ: R_AMDGPU_ABS32 .debug_str
; READOBJ: R_AMDGPU_ABS32 .debug_line
; READOBJ: R_AMDGPU_ABS32 .debug_str
; READOBJ: R_AMDGPU_ABS32 .text
; READOBJ: R_AMDGPU_ABS32 .text
; READOBJ: R_AMDGPU_ABS32 .text
; READOBJ: R_AMDGPU_ABS32 .text
; READOBJ: R_AMDGPU_ABS32 .debug_str
; READOBJ: }
; READOBJ: Section (8) .rela.debug_pubnames {
; READOBJ: R_AMDGPU_ABS32 .debug_info
; READOBJ: }
; READOBJ: Section (10) .rela.debug_line {
; READOBJ: R_AMDGPU_ABS32 .text
; READOBJ: }
; READOBJ: ]
; DWARFDUMP: DW_AT_producer [DW_FORM_strp] ( .debug_str[0x00000000] = "clang version 3.9.0 (trunk 274858)")
; DWARFDUMP: DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000023] = "amdgpu-elf64-dwarf-relocs.cl")
; DWARFDUMP: DW_AT_comp_dir [DW_FORM_strp] ( .debug_str[0x00000040] = "/home/kzhuravl/Git/Lightning/test")
; DWARFDUMP: DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000062] = "amdgpu_elf64_dwarf_relocs")
; DWARFDUMP: DW_AT_decl_file [DW_FORM_data1] ("/home/kzhuravl/Git/Lightning/test/amdgpu-elf64-dwarf-relocs.cl")
amdgpu_elf64_dwarf_relocs:
.Lfunc_begin0:
.file 1 "amdgpu-elf64-dwarf-relocs.cl"
.loc 1 1 0
.loc 1 1 42 prologue_end
s_endpgm
.Lfunc_end0:
.size amdgpu_elf64_dwarf_relocs, .Lfunc_end0-amdgpu_elf64_dwarf_relocs
.section .debug_str,"MS",@progbits,1
.Linfo_string0:
.asciz "clang version 3.9.0 (trunk 274858)" ; string offset=0
.Linfo_string1:
.asciz "amdgpu-elf64-dwarf-relocs.cl" ; string offset=35
.Linfo_string2:
.asciz "/home/kzhuravl/Git/Lightning/test" ; string offset=64
.Linfo_string3:
.asciz "amdgpu_elf64_dwarf_relocs" ; string offset=98
.section .debug_abbrev
.Lsection_abbrev:
.byte 1 ; Abbreviation Code
.byte 17 ; DW_TAG_compile_unit
.byte 1 ; DW_CHILDREN_yes
.byte 37 ; DW_AT_producer
.byte 14 ; DW_FORM_strp
.byte 19 ; DW_AT_language
.byte 5 ; DW_FORM_data2
.byte 3 ; DW_AT_name
.byte 14 ; DW_FORM_strp
.byte 16 ; DW_AT_stmt_list
.byte 6 ; DW_FORM_data4
.byte 27 ; DW_AT_comp_dir
.byte 14 ; DW_FORM_strp
.byte 17 ; DW_AT_low_pc
.byte 1 ; DW_FORM_addr
.byte 18 ; DW_AT_high_pc
.byte 1 ; DW_FORM_addr
.byte 0 ; EOM(1)
.byte 0 ; EOM(2)
.byte 2 ; Abbreviation Code
.byte 46 ; DW_TAG_subprogram
.byte 0 ; DW_CHILDREN_no
.byte 17 ; DW_AT_low_pc
.byte 1 ; DW_FORM_addr
.byte 18 ; DW_AT_high_pc
.byte 1 ; DW_FORM_addr
.byte 3 ; DW_AT_name
.byte 14 ; DW_FORM_strp
.byte 58 ; DW_AT_decl_file
.byte 11 ; DW_FORM_data1
.byte 59 ; DW_AT_decl_line
.byte 11 ; DW_FORM_data1
.byte 63 ; DW_AT_external
.byte 12 ; DW_FORM_flag
.byte 0 ; EOM(1)
.byte 0 ; EOM(2)
.byte 0 ; EOM(3)
.section .debug_info
.Lsection_info:
.Lcu_begin0:
.long 51 ; Length of Unit
.short 2 ; DWARF version number
.long .Lsection_abbrev ; Offset Into Abbrev. Section
.byte 4 ; Address Size (in bytes)
.byte 1 ; Abbrev [1] 0xb:0x2c DW_TAG_compile_unit
.long .Linfo_string0 ; DW_AT_producer
.short 12 ; DW_AT_language
.long .Linfo_string1 ; DW_AT_name
.long .Lline_table_start0 ; DW_AT_stmt_list
.long .Linfo_string2 ; DW_AT_comp_dir
.long .Lfunc_begin0 ; DW_AT_low_pc
.long .Lfunc_end0 ; DW_AT_high_pc
.byte 2 ; Abbrev [2] 0x26:0x10 DW_TAG_subprogram
.long .Lfunc_begin0 ; DW_AT_low_pc
.long .Lfunc_end0 ; DW_AT_high_pc
.long .Linfo_string3 ; DW_AT_name
.byte 1 ; DW_AT_decl_file
.byte 1 ; DW_AT_decl_line
.byte 1 ; DW_AT_external
.byte 0 ; End Of Children Mark
.Lcu_macro_begin0:
.byte 0
.section .debug_pubnames
.long .LpubNames_end0-.LpubNames_begin0
.LpubNames_begin0:
.short 2
.long .Lcu_begin0
.long 55
.long 38
.asciz "amdgpu_elf64_dwarf_relocs"
.long 0
.LpubNames_end0:
.section .debug_line
.Lline_table_start0: