[esan|cfrag] Disable load/store instrumentation for cfrag

[zhaoqin]

Summary

Adds ClInstrumentFastpath option to control fastpath instrumentation.

Avoids the load/store instrumentation for the cache fragmentation tool.

Renames cache_frag_basic.ll to working_set_slow.ll for slowpath
instrumentation test.

Adds the __esan_init check in struct_field_count_basic.ll.

[aizatsky]

lib/Transforms/Instrumentation/EfficiencySanitizer.cpp

129 ↗

(On Diff #59896)

Make this part of Options. Do not change flag values please.

[zhaoqin]

Adds instrumentation control in Options

[bruening]

include/llvm/Transforms/Instrumentation.h

131 ↗

(On Diff #60064)

This doesn't make sense to me: why expose these here ina public header when they are internal to the instrumentation pass? Having them just be opt options as they were originally seems the better way to go. We want cl::opt options whose defaults vary according to the tool selected. What is needed is for cl::opt to provide a flag indicating whether the option was specified by the user or not, or else to provide more dynamic defaults, or to go with the original CL.

[zhaoqin]

include/llvm/Transforms/Instrumentation.h

131 ↗

(On Diff #60064)

Would an internal option struct works?

[zhaoqin]

revert changes on options.

[zhaoqin]

Since I am not sure how to change Cl options to meet both reviews. I implement a different way to skip load/store instrumentation without changing options.
PTAL.

llvm/trunk/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp

 // in the code.
 
 static cl::opt<bool> ClInstrumentLoadsAndStores(
     "esan-instrument-loads-and-stores", cl::init(true),
     cl::desc("Instrument loads and stores"), cl::Hidden);
 static cl::opt<bool> ClInstrumentMemIntrinsics(
     "esan-instrument-memintrinsics", cl::init(true),
     cl::desc("Instrument memintrinsics (memset/memcpy/memmove)"), cl::Hidden);
+static cl::opt<bool> ClInstrumentFastpath(
+    "esan-instrument-fastpath", cl::init(true),
+    cl::desc("Instrument fastpath"), cl::Hidden);
 
 // Experiments show that the performance difference can be 2x or more,
 // and accuracy loss is typically negligible, so we turn this on by default.
 static cl::opt<bool> ClAssumeIntraCacheLine(
     "esan-assume-intra-cache-line", cl::init(true),
     cl::desc("Assume each memory access touches just one cache line, for "
              "better performance but with a potential loss of accuracy."),
     cl::Hidden);
else
     NumInstrumentedLoads++;
   int Idx = getMemoryAccessFuncIndex(Addr, DL);
   if (Idx < 0) {
     OnAccessFunc = IsStore ? EsanUnalignedStoreN : EsanUnalignedLoadN;
     IRB.CreateCall(OnAccessFunc,
                    {IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()),
                     ConstantInt::get(IntptrTy, TypeSizeBytes)});
   } else {
-    if (instrumentFastpath(I, DL, IsStore, Addr, Alignment)) {
+    if (ClInstrumentFastpath &&
+        instrumentFastpath(I, DL, IsStore, Addr, Alignment)) {
       NumFastpaths++;
       return true;
     }
     if (Alignment == 0 || Alignment >= 8 || (Alignment % TypeSizeBytes) == 0)
       OnAccessFunc = IsStore ? EsanAlignedStore[Idx] : EsanAlignedLoad[Idx];
     else
       OnAccessFunc = IsStore ? EsanUnalignedStore[Idx] : EsanUnalignedLoad[Idx];
     IRB.CreateCall(OnAccessFunc,
bool EfficiencySanitizer::instrumentFastpath(Instruction *I,
   }
   return false;
 }
 
 bool EfficiencySanitizer::instrumentFastpathCacheFrag(Instruction *I,
                                                       const DataLayout &DL,
                                                       Value *Addr,
                                                       unsigned Alignment) {
-  // TODO(bruening): implement a fastpath for aligned accesses
-  return false;
+  // Do nothing.
+  return true; // Return true to avoid slowpath instrumentation.
 }
 
 bool EfficiencySanitizer::instrumentFastpathWorkingSet(
     Instruction *I, const DataLayout &DL, Value *Addr, unsigned Alignment) {
   assert(ShadowScale[Options.ToolType] == 6); // The code below assumes this
   IRBuilder<> IRB(I);
   Type *OrigTy = cast<PointerType>(Addr->getType())->getElementType();
   const uint32_t TypeSize = DL.getTypeStoreSizeInBits(OrigTy);

llvm/trunk/test/Instrumentation/EfficiencySanitizer/cache_frag_basic.ll

-; Test basic EfficiencySanitizer cache frag instrumentation.
-;
-; RUN: opt < %s -esan -esan-cache-frag -S | FileCheck %s
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Aligned loads:
-
-define i8 @loadAligned1(i8* %a) {
-entry:
-  %tmp1 = load i8, i8* %a, align 1
-  ret i8 %tmp1
-; CHECK: @llvm.global_ctors = {{.*}}@esan.module_ctor
-; CHECK:        call void @__esan_aligned_load1(i8* %a)
-; CHECK-NEXT:   %tmp1 = load i8, i8* %a, align 1
-; CHECK-NEXT:   ret i8 %tmp1
-}
-
-define i16 @loadAligned2(i16* %a) {
-entry:
-  %tmp1 = load i16, i16* %a, align 2
-  ret i16 %tmp1
-; CHECK:        %0 = bitcast i16* %a to i8*
-; CHECK-NEXT:   call void @__esan_aligned_load2(i8* %0)
-; CHECK-NEXT:   %tmp1 = load i16, i16* %a, align 2
-; CHECK-NEXT:   ret i16 %tmp1
-}
-
-define i32 @loadAligned4(i32* %a) {
-entry:
-  %tmp1 = load i32, i32* %a, align 4
-  ret i32 %tmp1
-; CHECK:        %0 = bitcast i32* %a to i8*
-; CHECK-NEXT:   call void @__esan_aligned_load4(i8* %0)
-; CHECK-NEXT:   %tmp1 = load i32, i32* %a, align 4
-; CHECK-NEXT:   ret i32 %tmp1
-}
-
-define i64 @loadAligned8(i64* %a) {
-entry:
-  %tmp1 = load i64, i64* %a, align 8
-  ret i64 %tmp1
-; CHECK:        %0 = bitcast i64* %a to i8*
-; CHECK-NEXT:   call void @__esan_aligned_load8(i8* %0)
-; CHECK-NEXT:   %tmp1 = load i64, i64* %a, align 8
-; CHECK-NEXT:   ret i64 %tmp1
-}
-
-define i128 @loadAligned16(i128* %a) {
-entry:
-  %tmp1 = load i128, i128* %a, align 16
-  ret i128 %tmp1
-; CHECK:        %0 = bitcast i128* %a to i8*
-; CHECK-NEXT:   call void @__esan_aligned_load16(i8* %0)
-; CHECK-NEXT:   %tmp1 = load i128, i128* %a, align 16
-; CHECK-NEXT:   ret i128 %tmp1
-}
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Aligned stores:
-
-define void @storeAligned1(i8* %a) {
-entry:
-  store i8 1, i8* %a, align 1
-  ret void
-; CHECK:        call void @__esan_aligned_store1(i8* %a)
-; CHECK-NEXT:   store i8 1, i8* %a, align 1
-; CHECK-NEXT:   ret void
-}
-
-define void @storeAligned2(i16* %a) {
-entry:
-  store i16 1, i16* %a, align 2
-  ret void
-; CHECK:        %0 = bitcast i16* %a to i8*
-; CHECK-NEXT:   call void @__esan_aligned_store2(i8* %0)
-; CHECK-NEXT:   store i16 1, i16* %a, align 2
-; CHECK-NEXT:   ret void
-}
-
-define void @storeAligned4(i32* %a) {
-entry:
-  store i32 1, i32* %a, align 4
-  ret void
-; CHECK:        %0 = bitcast i32* %a to i8*
-; CHECK-NEXT:   call void @__esan_aligned_store4(i8* %0)
-; CHECK-NEXT:   store i32 1, i32* %a, align 4
-; CHECK-NEXT:   ret void
-}
-
-define void @storeAligned8(i64* %a) {
-entry:
-  store i64 1, i64* %a, align 8
-  ret void
-; CHECK:        %0 = bitcast i64* %a to i8*
-; CHECK-NEXT:   call void @__esan_aligned_store8(i8* %0)
-; CHECK-NEXT:   store i64 1, i64* %a, align 8
-; CHECK-NEXT:   ret void
-}
-
-define void @storeAligned16(i128* %a) {
-entry:
-  store i128 1, i128* %a, align 16
-  ret void
-; CHECK:        %0 = bitcast i128* %a to i8*
-; CHECK-NEXT:   call void @__esan_aligned_store16(i8* %0)
-; CHECK-NEXT:   store i128 1, i128* %a, align 16
-; CHECK-NEXT:   ret void
-}
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Unaligned loads:
-
-define i16 @loadUnaligned2(i16* %a) {
-entry:
-  %tmp1 = load i16, i16* %a, align 1
-  ret i16 %tmp1
-; CHECK:        %0 = bitcast i16* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_load2(i8* %0)
-; CHECK-NEXT:   %tmp1 = load i16, i16* %a, align 1
-; CHECK-NEXT:   ret i16 %tmp1
-}
-
-define i32 @loadUnaligned4(i32* %a) {
-entry:
-  %tmp1 = load i32, i32* %a, align 1
-  ret i32 %tmp1
-; CHECK:        %0 = bitcast i32* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_load4(i8* %0)
-; CHECK-NEXT:   %tmp1 = load i32, i32* %a, align 1
-; CHECK-NEXT:   ret i32 %tmp1
-}
-
-define i64 @loadUnaligned8(i64* %a) {
-entry:
-  %tmp1 = load i64, i64* %a, align 1
-  ret i64 %tmp1
-; CHECK:        %0 = bitcast i64* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_load8(i8* %0)
-; CHECK-NEXT:   %tmp1 = load i64, i64* %a, align 1
-; CHECK-NEXT:   ret i64 %tmp1
-}
-
-define i128 @loadUnaligned16(i128* %a) {
-entry:
-  %tmp1 = load i128, i128* %a, align 1
-  ret i128 %tmp1
-; CHECK:        %0 = bitcast i128* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_load16(i8* %0)
-; CHECK-NEXT:   %tmp1 = load i128, i128* %a, align 1
-; CHECK-NEXT:   ret i128 %tmp1
-}
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Unaligned stores:
-
-define void @storeUnaligned2(i16* %a) {
-entry:
-  store i16 1, i16* %a, align 1
-  ret void
-; CHECK:        %0 = bitcast i16* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_store2(i8* %0)
-; CHECK-NEXT:   store i16 1, i16* %a, align 1
-; CHECK-NEXT:   ret void
-}
-
-define void @storeUnaligned4(i32* %a) {
-entry:
-  store i32 1, i32* %a, align 1
-  ret void
-; CHECK:        %0 = bitcast i32* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_store4(i8* %0)
-; CHECK-NEXT:   store i32 1, i32* %a, align 1
-; CHECK-NEXT:   ret void
-}
-
-define void @storeUnaligned8(i64* %a) {
-entry:
-  store i64 1, i64* %a, align 1
-  ret void
-; CHECK:        %0 = bitcast i64* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_store8(i8* %0)
-; CHECK-NEXT:   store i64 1, i64* %a, align 1
-; CHECK-NEXT:   ret void
-}
-
-define void @storeUnaligned16(i128* %a) {
-entry:
-  store i128 1, i128* %a, align 1
-  ret void
-; CHECK:        %0 = bitcast i128* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_store16(i8* %0)
-; CHECK-NEXT:   store i128 1, i128* %a, align 1
-; CHECK-NEXT:   ret void
-}
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Unusual loads and stores:
-
-define x86_fp80 @loadUnalignedFP(x86_fp80* %a) {
-entry:
-  %tmp1 = load x86_fp80, x86_fp80* %a, align 1
-  ret x86_fp80 %tmp1
-; CHECK:        %0 = bitcast x86_fp80* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_loadN(i8* %0, i64 10)
-; CHECK-NEXT:   %tmp1 = load x86_fp80, x86_fp80* %a, align 1
-; CHECK-NEXT:   ret x86_fp80 %tmp1
-}
-
-define void @storeUnalignedFP(x86_fp80* %a) {
-entry:
-  store x86_fp80 0xK00000000000000000000, x86_fp80* %a, align 1
-  ret void
-; CHECK:        %0 = bitcast x86_fp80* %a to i8*
-; CHECK-NEXT:   call void @__esan_unaligned_storeN(i8* %0, i64 10)
-; CHECK-NEXT:   store x86_fp80 0xK00000000000000000000, x86_fp80* %a, align 1
-; CHECK-NEXT:   ret void
-}
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Ensure that esan converts memcpy intrinsics to calls:
-
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
-declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
-declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
-
-define void @memCpyTest(i8* nocapture %x, i8* nocapture %y) {
-entry:
-    tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %x, i8* %y, i64 16, i32 4, i1 false)
-    ret void
-; CHECK: define void @memCpyTest
-; CHECK: call i8* @memcpy
-; CHECK: ret void
-}
-
-define void @memMoveTest(i8* nocapture %x, i8* nocapture %y) {
-entry:
-    tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %x, i8* %y, i64 16, i32 4, i1 false)
-    ret void
-; CHECK: define void @memMoveTest
-; CHECK: call i8* @memmove
-; CHECK: ret void
-}
-
-define void @memSetTest(i8* nocapture %x) {
-entry:
-    tail call void @llvm.memset.p0i8.i64(i8* %x, i8 77, i64 16, i32 4, i1 false)
-    ret void
-; CHECK: define void @memSetTest
-; CHECK: call i8* @memset
-; CHECK: ret void
-}
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Top-level:
-
-; CHECK: define internal void @esan.module_ctor()
-; CHECK: call void @__esan_init(i32 1, i8* bitcast ({ i8*, i32, { i8*, i32, i64*, i8** }* }* @1 to i8*))
-; CHECK: define internal void @esan.module_dtor()
-; CHECK: call void @__esan_exit(i8* bitcast ({ i8*, i32, { i8*, i32, i64*, i8** }* }* @1 to i8*))

llvm/trunk/test/Instrumentation/EfficiencySanitizer/struct_field_count_basic.ll

 ; Test basic EfficiencySanitizer struct field count instrumentation.
 ;
-; RUN: opt < %s -esan -esan-cache-frag -esan-instrument-loads-and-stores=false -esan-instrument-memintrinsics=false -S | FileCheck %s
+; RUN: opt < %s -esan -esan-cache-frag -S | FileCheck %s
 
 %struct.A = type { i32, i32 }
 %union.U = type { double }
 %struct.C = type { %struct.anon, %union.anon, [10 x i8] }
 %struct.anon = type { i32, i32 }
 %union.anon = type { double }
 
 define i32 @main() {

 ; CHECK-NEXT:   %16 = load i64, i64* getelementptr inbounds ([3 x i64], [3 x i64]* @"struct.C#3#14#13#13", i32 0, i32 2)
 ; CHECK-NEXT:   %17 = add i64 %16, 1
 ; CHECK-NEXT:   store i64 %17, i64* getelementptr inbounds ([3 x i64], [3 x i64]* @"struct.C#3#14#13#13", i32 0, i32 2)
 ; CHECK-NEXT:   %c11 = getelementptr inbounds %struct.C, %struct.C* %arrayidx10, i32 0, i32 2
 ; CHECK-NEXT:   %arrayidx12 = getelementptr inbounds [10 x i8], [10 x i8]* %c11, i64 0, i64 2
 ; CHECK-NEXT:   %k1 = load %struct.A*, %struct.A** %k, align 8
 ; CHECK-NEXT:   %arrayidx13 = getelementptr inbounds %struct.A, %struct.A* %k1, i64 0
 ; CHECK-NEXT:   ret i32 0
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Top-level:
+
+; CHECK: define internal void @esan.module_ctor()
+; CHECK: call void @__esan_init(i32 1, i8* bitcast ({ i8*, i32, { i8*, i32, i64*, i8** }* }* @21 to i8*))
+; CHECK: define internal void @esan.module_dtor()
+; CHECK: call void @__esan_exit(i8* bitcast ({ i8*, i32, { i8*, i32, i64*, i8** }* }* @21 to i8*))

llvm/trunk/test/Instrumentation/EfficiencySanitizer/working_set_slow.ll

+; Test basic EfficiencySanitizer slowpath instrumentation.
+;
+; RUN: opt < %s -esan -esan-working-set -esan-instrument-fastpath=false -S | FileCheck %s
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Aligned loads:
+
+define i8 @loadAligned1(i8* %a) {
+entry:
+  %tmp1 = load i8, i8* %a, align 1
+  ret i8 %tmp1
+; CHECK: @llvm.global_ctors = {{.*}}@esan.module_ctor
+; CHECK:        call void @__esan_aligned_load1(i8* %a)
+; CHECK-NEXT:   %tmp1 = load i8, i8* %a, align 1
+; CHECK-NEXT:   ret i8 %tmp1
+}
+
+define i16 @loadAligned2(i16* %a) {
+entry:
+  %tmp1 = load i16, i16* %a, align 2
+  ret i16 %tmp1
+; CHECK:        %0 = bitcast i16* %a to i8*
+; CHECK-NEXT:   call void @__esan_aligned_load2(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i16, i16* %a, align 2
+; CHECK-NEXT:   ret i16 %tmp1
+}
+
+define i32 @loadAligned4(i32* %a) {
+entry:
+  %tmp1 = load i32, i32* %a, align 4
+  ret i32 %tmp1
+; CHECK:        %0 = bitcast i32* %a to i8*
+; CHECK-NEXT:   call void @__esan_aligned_load4(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i32, i32* %a, align 4
+; CHECK-NEXT:   ret i32 %tmp1
+}
+
+define i64 @loadAligned8(i64* %a) {
+entry:
+  %tmp1 = load i64, i64* %a, align 8
+  ret i64 %tmp1
+; CHECK:        %0 = bitcast i64* %a to i8*
+; CHECK-NEXT:   call void @__esan_aligned_load8(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i64, i64* %a, align 8
+; CHECK-NEXT:   ret i64 %tmp1
+}
+
+define i128 @loadAligned16(i128* %a) {
+entry:
+  %tmp1 = load i128, i128* %a, align 16
+  ret i128 %tmp1
+; CHECK:        %0 = bitcast i128* %a to i8*
+; CHECK-NEXT:   call void @__esan_aligned_load16(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i128, i128* %a, align 16
+; CHECK-NEXT:   ret i128 %tmp1
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Aligned stores:
+
+define void @storeAligned1(i8* %a) {
+entry:
+  store i8 1, i8* %a, align 1
+  ret void
+; CHECK:        call void @__esan_aligned_store1(i8* %a)
+; CHECK-NEXT:   store i8 1, i8* %a, align 1
+; CHECK-NEXT:   ret void
+}
+
+define void @storeAligned2(i16* %a) {
+entry:
+  store i16 1, i16* %a, align 2
+  ret void
+; CHECK:        %0 = bitcast i16* %a to i8*
+; CHECK-NEXT:   call void @__esan_aligned_store2(i8* %0)
+; CHECK-NEXT:   store i16 1, i16* %a, align 2
+; CHECK-NEXT:   ret void
+}
+
+define void @storeAligned4(i32* %a) {
+entry:
+  store i32 1, i32* %a, align 4
+  ret void
+; CHECK:        %0 = bitcast i32* %a to i8*
+; CHECK-NEXT:   call void @__esan_aligned_store4(i8* %0)
+; CHECK-NEXT:   store i32 1, i32* %a, align 4
+; CHECK-NEXT:   ret void
+}
+
+define void @storeAligned8(i64* %a) {
+entry:
+  store i64 1, i64* %a, align 8
+  ret void
+; CHECK:        %0 = bitcast i64* %a to i8*
+; CHECK-NEXT:   call void @__esan_aligned_store8(i8* %0)
+; CHECK-NEXT:   store i64 1, i64* %a, align 8
+; CHECK-NEXT:   ret void
+}
+
+define void @storeAligned16(i128* %a) {
+entry:
+  store i128 1, i128* %a, align 16
+  ret void
+; CHECK:        %0 = bitcast i128* %a to i8*
+; CHECK-NEXT:   call void @__esan_aligned_store16(i8* %0)
+; CHECK-NEXT:   store i128 1, i128* %a, align 16
+; CHECK-NEXT:   ret void
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Unaligned loads:
+
+define i16 @loadUnaligned2(i16* %a) {
+entry:
+  %tmp1 = load i16, i16* %a, align 1
+  ret i16 %tmp1
+; CHECK:        %0 = bitcast i16* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_load2(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i16, i16* %a, align 1
+; CHECK-NEXT:   ret i16 %tmp1
+}
+
+define i32 @loadUnaligned4(i32* %a) {
+entry:
+  %tmp1 = load i32, i32* %a, align 1
+  ret i32 %tmp1
+; CHECK:        %0 = bitcast i32* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_load4(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i32, i32* %a, align 1
+; CHECK-NEXT:   ret i32 %tmp1
+}
+
+define i64 @loadUnaligned8(i64* %a) {
+entry:
+  %tmp1 = load i64, i64* %a, align 1
+  ret i64 %tmp1
+; CHECK:        %0 = bitcast i64* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_load8(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i64, i64* %a, align 1
+; CHECK-NEXT:   ret i64 %tmp1
+}
+
+define i128 @loadUnaligned16(i128* %a) {
+entry:
+  %tmp1 = load i128, i128* %a, align 1
+  ret i128 %tmp1
+; CHECK:        %0 = bitcast i128* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_load16(i8* %0)
+; CHECK-NEXT:   %tmp1 = load i128, i128* %a, align 1
+; CHECK-NEXT:   ret i128 %tmp1
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Unaligned stores:
+
+define void @storeUnaligned2(i16* %a) {
+entry:
+  store i16 1, i16* %a, align 1
+  ret void
+; CHECK:        %0 = bitcast i16* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_store2(i8* %0)
+; CHECK-NEXT:   store i16 1, i16* %a, align 1
+; CHECK-NEXT:   ret void
+}
+
+define void @storeUnaligned4(i32* %a) {
+entry:
+  store i32 1, i32* %a, align 1
+  ret void
+; CHECK:        %0 = bitcast i32* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_store4(i8* %0)
+; CHECK-NEXT:   store i32 1, i32* %a, align 1
+; CHECK-NEXT:   ret void
+}
+
+define void @storeUnaligned8(i64* %a) {
+entry:
+  store i64 1, i64* %a, align 1
+  ret void
+; CHECK:        %0 = bitcast i64* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_store8(i8* %0)
+; CHECK-NEXT:   store i64 1, i64* %a, align 1
+; CHECK-NEXT:   ret void
+}
+
+define void @storeUnaligned16(i128* %a) {
+entry:
+  store i128 1, i128* %a, align 1
+  ret void
+; CHECK:        %0 = bitcast i128* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_store16(i8* %0)
+; CHECK-NEXT:   store i128 1, i128* %a, align 1
+; CHECK-NEXT:   ret void
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Unusual loads and stores:
+
+define x86_fp80 @loadUnalignedFP(x86_fp80* %a) {
+entry:
+  %tmp1 = load x86_fp80, x86_fp80* %a, align 1
+  ret x86_fp80 %tmp1
+; CHECK:        %0 = bitcast x86_fp80* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_loadN(i8* %0, i64 10)
+; CHECK-NEXT:   %tmp1 = load x86_fp80, x86_fp80* %a, align 1
+; CHECK-NEXT:   ret x86_fp80 %tmp1
+}
+
+define void @storeUnalignedFP(x86_fp80* %a) {
+entry:
+  store x86_fp80 0xK00000000000000000000, x86_fp80* %a, align 1
+  ret void
+; CHECK:        %0 = bitcast x86_fp80* %a to i8*
+; CHECK-NEXT:   call void @__esan_unaligned_storeN(i8* %0, i64 10)
+; CHECK-NEXT:   store x86_fp80 0xK00000000000000000000, x86_fp80* %a, align 1
+; CHECK-NEXT:   ret void
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Ensure that esan converts memcpy intrinsics to calls:
+
+declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
+declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1)
+declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
+
+define void @memCpyTest(i8* nocapture %x, i8* nocapture %y) {
+entry:
+    tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %x, i8* %y, i64 16, i32 4, i1 false)
+    ret void
+; CHECK: define void @memCpyTest
+; CHECK: call i8* @memcpy
+; CHECK: ret void
+}
+
+define void @memMoveTest(i8* nocapture %x, i8* nocapture %y) {
+entry:
+    tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %x, i8* %y, i64 16, i32 4, i1 false)
+    ret void
+; CHECK: define void @memMoveTest
+; CHECK: call i8* @memmove
+; CHECK: ret void
+}
+
+define void @memSetTest(i8* nocapture %x) {
+entry:
+    tail call void @llvm.memset.p0i8.i64(i8* %x, i8 77, i64 16, i32 4, i1 false)
+    ret void
+; CHECK: define void @memSetTest
+; CHECK: call i8* @memset
+; CHECK: ret void
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Top-level:
+
+; CHECK: define internal void @esan.module_ctor()
+; CHECK: call void @__esan_init(i32 2, i8* null)
+; CHECK: define internal void @esan.module_dtor()
+; CHECK: call void @__esan_exit(i8* null)