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Differential D20626

[Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps
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Authored by m_zuckerman on May 25 2016, 8:19 AM.

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Reviewers
AsafBadouh
delena
igorb
Commits
rG223676d2ccc9: [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps
rC272658: [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps
rL272658: [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps

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Event Timeline

m_zuckerman updated this revision to Diff 58428.May 25 2016, 8:19 AM
m_zuckerman retitled this revision from to [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps .
m_zuckerman updated this object.
m_zuckerman added reviewers: AsafBadouh, igorb, delena.
m_zuckerman added a subscriber: cfe-commits.
delena added inline comments.May 26 2016, 1:02 PM
test/CodeGen/avx512f-builtins.c
1985

I don't understand how do you receive intrinsic if you issue IR.

craig.topper added a subscriber: craig.topper.May 26 2016, 3:58 PM
craig.topper added inline comments.
test/CodeGen/avx512f-builtins.c
1985

The word "check" being in lowercase causes filecheck to ignore it so it isn't being checked.

m_zuckerman added inline comments.May 27 2016, 7:05 AM
test/CodeGen/avx512f-builtins.c
1985

You are right.
Thanks I didn't saw it. I will fix it.

m_zuckerman updated this revision to Diff 59663.Jun 5 2016, 7:00 AM
delena accepted this revision.Jun 7 2016, 2:16 AM
delena edited edge metadata.
This revision is now accepted and ready to land.Jun 7 2016, 2:17 AM
Closed by commit rL272658: [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps (authored by mzuckerm). · Explain WhyJun 14 2016, 5:45 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Headers/
12 lines
test/
CodeGen/
16 lines

Diff 59663

lib/Headers/avx512fintrin.h

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 2,416 Lines • ▼ Show 20 Lines (__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \
(__mmask8)(U), (int)(R)); }) (__mmask8)(U), (int)(R)); })
#define _mm_maskz_div_round_sd(U, A, B, R) __extension__ ({ \ #define _mm_maskz_div_round_sd(U, A, B, R) __extension__ ({ \
(__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \ (__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \
(__v2df)(__m128d)(B), \ (__v2df)(__m128d)(B), \
(__v2df)_mm_setzero_pd(), \ (__v2df)_mm_setzero_pd(), \
(__mmask8)(U), (int)(R)); }) (__mmask8)(U), (int)(R)); })
static __inline __m512d __DEFAULT_FN_ATTRS
_mm512_div_pd(__m512d __a, __m512d __b)
{
return (__m512d)((__v8df)__a/(__v8df)__b);
}
static __inline__ __m512d __DEFAULT_FN_ATTRS static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_mask_div_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { _mm512_mask_div_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
return (__m512d) __builtin_ia32_divpd512_mask ((__v8df) __A, return (__m512d) __builtin_ia32_divpd512_mask ((__v8df) __A,
(__v8df) __B, (__v8df) __B,
(__v8df) __W, (__v8df) __W,
(__mmask8) __U, (__mmask8) __U,
_MM_FROUND_CUR_DIRECTION); _MM_FROUND_CUR_DIRECTION);
} }
static __inline__ __m512d __DEFAULT_FN_ATTRS static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) { _mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) {
return (__m512d) __builtin_ia32_divpd512_mask ((__v8df) __A, return (__m512d) __builtin_ia32_divpd512_mask ((__v8df) __A,
(__v8df) __B, (__v8df) __B,
(__v8df) (__v8df)
_mm512_setzero_pd (), _mm512_setzero_pd (),
(__mmask8) __U, (__mmask8) __U,
_MM_FROUND_CUR_DIRECTION); _MM_FROUND_CUR_DIRECTION);
} }
static __inline __m512 __DEFAULT_FN_ATTRS
_mm512_div_ps(__m512 __a, __m512 __b)
{
return (__m512)((__v16sf)__a/(__v16sf)__b);
}
static __inline__ __m512 __DEFAULT_FN_ATTRS static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { _mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
return (__m512) __builtin_ia32_divps512_mask ((__v16sf) __A, return (__m512) __builtin_ia32_divps512_mask ((__v16sf) __A,
(__v16sf) __B, (__v16sf) __B,
(__v16sf) __W, (__v16sf) __W,
(__mmask16) __U, (__mmask16) __U,
_MM_FROUND_CUR_DIRECTION); _MM_FROUND_CUR_DIRECTION);
} }
▲ Show 20 Lines • Show All 7,030 Lines • Show Last 20 Lines

test/CodeGen/avx512f-builtins.c

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 1,966 Lines • ▼ Show 20 Lines__m512d test_mm512_mask_div_round_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
// CHECK: @llvm.x86.avx512.mask.div.pd.512 // CHECK: @llvm.x86.avx512.mask.div.pd.512
return _mm512_mask_div_round_pd(__W,__U,__A,__B,_MM_FROUND_TO_NEAREST_INT); return _mm512_mask_div_round_pd(__W,__U,__A,__B,_MM_FROUND_TO_NEAREST_INT);
} }
__m512d test_mm512_maskz_div_round_pd(__mmask8 __U, __m512d __A, __m512d __B) { __m512d test_mm512_maskz_div_round_pd(__mmask8 __U, __m512d __A, __m512d __B) {
// CHECK-LABEL: @test_mm512_maskz_div_round_pd // CHECK-LABEL: @test_mm512_maskz_div_round_pd
// CHECK: @llvm.x86.avx512.mask.div.pd.512 // CHECK: @llvm.x86.avx512.mask.div.pd.512
return _mm512_maskz_div_round_pd(__U,__A,__B,_MM_FROUND_TO_NEAREST_INT); return _mm512_maskz_div_round_pd(__U,__A,__B,_MM_FROUND_TO_NEAREST_INT);
} }
__m512d test_mm512_mask_div_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { __m512d test_mm512_div_pd(__m512d __a, __m512d __b) {
// CHECK-LABEL: @test_mm512_mask_div_pd // CHECK-LABLE: @test_mm512_div_pd
// CHECK: fdiv <8 x double>
return _mm512_div_pd(__a,__b);
}
__m512d test_mm512_mask_div_pd(__m512d __w, __mmask8 __u, __m512d __a, __m512d __b) {
// CHECK-LABLE: @test_mm512_mask_div_pd
// CHECK: @llvm.x86.avx512.mask.div.pd.512 // CHECK: @llvm.x86.avx512.mask.div.pd.512
return _mm512_mask_div_pd(__W,__U,__A,__B); return _mm512_mask_div_pd(__w,__u,__a,__b);
} }
__m512d test_mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) { __m512d test_mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) {
delenaUnsubmitted
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I don't understand how do you receive intrinsic if you issue IR.

delena: I don't understand how do you receive intrinsic if you issue IR.
craig.topperUnsubmitted
Not Done
ReplyInline Actions

The word "check" being in lowercase causes filecheck to ignore it so it isn't being checked.

craig.topper: The word "check" being in lowercase causes filecheck to ignore it so it isn't being checked.
m_zuckermanAuthorUnsubmitted
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You are right.
Thanks I didn't saw it. I will fix it.

m_zuckerman: You are right. Thanks I didn't saw it. I will fix it.
// CHECK-LABEL: @test_mm512_maskz_div_pd // CHECK-LABEL: @test_mm512_maskz_div_pd
// CHECK: @llvm.x86.avx512.mask.div.pd.512 // CHECK: @llvm.x86.avx512.mask.div.pd.512
return _mm512_maskz_div_pd(__U,__A,__B); return _mm512_maskz_div_pd(__U,__A,__B);
} }
__m512 test_mm512_div_round_ps(__m512 __A, __m512 __B) { __m512 test_mm512_div_round_ps(__m512 __A, __m512 __B) {
// CHECK-LABEL: @test_mm512_div_round_ps // CHECK-LABEL: @test_mm512_div_round_ps
// CHECK: @llvm.x86.avx512.mask.div.ps.512 // CHECK: @llvm.x86.avx512.mask.div.ps.512
return _mm512_div_round_ps(__A,__B,_MM_FROUND_TO_NEAREST_INT); return _mm512_div_round_ps(__A,__B,_MM_FROUND_TO_NEAREST_INT);
} }
__m512 test_mm512_mask_div_round_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { __m512 test_mm512_mask_div_round_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
// CHECK-LABEL: @test_mm512_mask_div_round_ps // CHECK-LABEL: @test_mm512_mask_div_round_ps
// CHECK: @llvm.x86.avx512.mask.div.ps.512 // CHECK: @llvm.x86.avx512.mask.div.ps.512
return _mm512_mask_div_round_ps(__W,__U,__A,__B,_MM_FROUND_TO_NEAREST_INT); return _mm512_mask_div_round_ps(__W,__U,__A,__B,_MM_FROUND_TO_NEAREST_INT);
} }
__m512 test_mm512_maskz_div_round_ps(__mmask16 __U, __m512 __A, __m512 __B) { __m512 test_mm512_maskz_div_round_ps(__mmask16 __U, __m512 __A, __m512 __B) {
// CHECK-LABEL: @test_mm512_maskz_div_round_ps // CHECK-LABEL: @test_mm512_maskz_div_round_ps
// CHECK: @llvm.x86.avx512.mask.div.ps.512 // CHECK: @llvm.x86.avx512.mask.div.ps.512
return _mm512_maskz_div_round_ps(__U,__A,__B,_MM_FROUND_TO_NEAREST_INT); return _mm512_maskz_div_round_ps(__U,__A,__B,_MM_FROUND_TO_NEAREST_INT);
} }
__m512 test_mm512_div_ps(__m512 __A, __m512 __B) {
// CHECK-LABEL: @test_mm512_div_ps
// CHECK: fdiv <16 x float>
return _mm512_div_ps(__A,__B);
}
__m512 test_mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { __m512 test_mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
// CHECK-LABEL: @test_mm512_mask_div_ps // CHECK-LABEL: @test_mm512_mask_div_ps
// CHECK: @llvm.x86.avx512.mask.div.ps.512 // CHECK: @llvm.x86.avx512.mask.div.ps.512
return _mm512_mask_div_ps(__W,__U,__A,__B); return _mm512_mask_div_ps(__W,__U,__A,__B);
} }
__m512 test_mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) { __m512 test_mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) {
// CHECK-LABEL: @test_mm512_maskz_div_ps // CHECK-LABEL: @test_mm512_maskz_div_ps
// CHECK: @llvm.x86.avx512.mask.div.ps.512 // CHECK: @llvm.x86.avx512.mask.div.ps.512
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