[Mips] Add support for llvm.thread.pointer intrinsic.

[• koriakin]

Summary

This will be used to implement __builtin_thread_pointer in clang.

[sdardis]

LGTM with nit addressed.

Thanks.

test/CodeGen/Mips/thread-pointer.ll

9 ↗

(On Diff #55120)

Nit: can you expand this to 'rdhwr $3, $29'? TLS for MIPS by convention loads the thread pointer into $3.

[• koriakin]

test/CodeGen/Mips/thread-pointer.ll

9 ↗

(On Diff #55120)

OK, I'll fix this line

llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp

case Intrinsic::mips_vshf_d:
     return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0),
                        Op->getOperand(1), Op->getOperand(2), Op->getOperand(3));
   case Intrinsic::mips_xor_v:
     return DAG.getNode(ISD::XOR, DL, Op->getValueType(0), Op->getOperand(1),
                        Op->getOperand(2));
   case Intrinsic::mips_xori_b:
     return DAG.getNode(ISD::XOR, DL, Op->getValueType(0),
                        Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG));
+  case Intrinsic::thread_pointer: {
+    EVT PtrVT = getPointerTy(DAG.getDataLayout());
+    return DAG.getNode(MipsISD::ThreadPointer, DL, PtrVT);
+  }
   }
 }
 
 static SDValue lowerMSALoadIntr(SDValue Op, SelectionDAG &DAG, unsigned Intr) {
   SDLoc DL(Op);
   SDValue ChainIn = Op->getOperand(0);
   SDValue Address = Op->getOperand(2);
   SDValue Offset  = Op->getOperand(3);

llvm/trunk/test/CodeGen/Mips/thread-pointer.ll

+; RUN: llc -march=mips < %s | FileCheck %s
+; RUN: llc -march=mips64 < %s | FileCheck %s
+; RUN: llc -march=mipsel < %s | FileCheck %s
+; RUN: llc -march=mips64el < %s | FileCheck %s
+
+declare i8* @llvm.thread.pointer() nounwind readnone
+
+define i8* @thread_pointer() {
+; CHECK: rdhwr $3, $29
+  %1 = tail call i8* @llvm.thread.pointer()
+  ret i8* %1
+}