[X86] Introduction of -march=lakemont

[aturetsk]

Summary

Add a new CPU - Lakemont.

[aturetsk]

I used existing test "test/CodeGen/attr-target-x86.c" to check Lakemont's target features. However the test is actually run with 64-bit triple "x86_64-linux-gnu", so "+mmx,+sse,+sse2" are included in target features. The same thing happens with Pentium and other 32-bit-only CPUs. I wonder if we should have some check so that 32-bit-only CPUs couldn't be used with 64-bit triple. What do you think?

[echristo]

I'm not real fond of the testcase being in attr-target-x86, but there's not a better place at the moment either.

-eric

lib/Basic/Targets.cpp

enum CPUKind {
     /// \name Cannonlake Client
     /// Cannonlake client microarchitecture based processors.
     CK_Cannonlake,
 
     /// \name Knights Landing
     /// Knights Landing processor.
     CK_KNL,
 
+    /// \name Lakemont
+    /// Lakemont microarchitecture based processors.
+    CK_Lakemont,
+
     /// \name K6
     /// K6 architecture processors.
     //@{
     CK_K6,
     CK_K6_2,
     CK_K6_3,
     //@}
 
return llvm::StringSwitch<CPUKind>(CPU)
         .Case("haswell", CK_Haswell)
         .Case("core-avx2", CK_Haswell) // Legacy name.
         .Case("broadwell", CK_Broadwell)
         .Case("skylake", CK_SkylakeClient)
         .Case("skylake-avx512", CK_SkylakeServer)
         .Case("skx", CK_SkylakeServer) // Legacy name.
         .Case("cannonlake", CK_Cannonlake)
         .Case("knl", CK_KNL)
+        .Case("lakemont", CK_Lakemont)
         .Case("k6", CK_K6)
         .Case("k6-2", CK_K6_2)
         .Case("k6-3", CK_K6_3)
         .Case("athlon", CK_Athlon)
         .Case("athlon-tbird", CK_AthlonThunderbird)
         .Case("athlon-4", CK_Athlon4)
         .Case("athlon-xp", CK_AthlonXP)
         .Case("athlon-mp", CK_AthlonMP)
bool setCPU(const std::string &Name) override {
     case CK_Pentium2:
     case CK_Pentium3:
     case CK_Pentium3M:
     case CK_PentiumM:
     case CK_Yonah:
     case CK_C3_2:
     case CK_Pentium4:
     case CK_Pentium4M:
+    case CK_Lakemont:
     case CK_Prescott:
     case CK_K6:
     case CK_K6_2:
     case CK_K6_3:
     case CK_Athlon:
     case CK_AthlonThunderbird:
     case CK_Athlon4:
     case CK_AthlonXP:

 bool X86TargetInfo::initFeatureMap(
     llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
     const std::vector<std::string> &FeaturesVec) const {
   // FIXME: This *really* should not be here.
   // X86_64 always has SSE2.
   if (getTriple().getArch() == llvm::Triple::x86_64)
     setFeatureEnabledImpl(Features, "sse2", true);
 
-  // Enable X87 for all X86 processors.
+  const CPUKind Kind = getCPUKind(CPU);
+
+  // Enable X87 for all X86 processors but Lakemont.
+  if (Kind != CK_Lakemont)
     setFeatureEnabledImpl(Features, "x87", true);
 
-  switch (getCPUKind(CPU)) {
+  switch (Kind) {
   case CK_Generic:
   case CK_i386:
   case CK_i486:
   case CK_i586:
   case CK_Pentium:
   case CK_i686:
   case CK_PentiumPro:
+  case CK_Lakemont:
     break;
   case CK_PentiumMMX:
   case CK_Pentium2:
   case CK_K6:
   case CK_WinChipC6:
     setFeatureEnabledImpl(Features, "mmx", true);
     break;
   case CK_Pentium3:
void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
   case CK_SkylakeServer:
     defineCPUMacros(Builder, "skx");
     break;
   case CK_Cannonlake:
     break;
   case CK_KNL:
     defineCPUMacros(Builder, "knl");
     break;
+  case CK_Lakemont:
+    Builder.defineMacro("__tune_lakemont__");
+    break;
   case CK_K6_2:
     Builder.defineMacro("__k6_2__");
     Builder.defineMacro("__tune_k6_2__");
     // Fallthrough
   case CK_K6_3:
     if (CPU != CK_K6_2) {  // In case of fallthrough
       // FIXME: GCC may be enabling these in cases where some other k6
       // architecture is specified but -m3dnow is explicitly provided. The

test/CodeGen/attr-target-x86.c

 
 int bar(int a) { return baz(a) + foo(a); }
 
 int __attribute__((target("avx,      sse4.2,      arch=   ivybridge"))) qux(int a) { return 4; }
 int __attribute__((target("no-aes, arch=ivybridge"))) qax(int a) { return 4; }
 
 int __attribute__((target("no-mmx"))) qq(int a) { return 40; }
 
+int __attribute__((target("arch=lakemont"))) lake(int a) { return 4; }
+
 // Check that we emit the additional subtarget and cpu features for foo and not for baz or bar.
 // CHECK: baz{{.*}} #0
 // CHECK: foo{{.*}} #1
 // We ignore the tune attribute so walrus should be identical to baz and bar.
 // CHECK: walrus{{.*}} #0
 // We're currently ignoring the fpmath attribute so koala should be identical to baz and bar.
 // CHECK: koala{{.*}} #0
 // CHECK: echidna{{.*}} #2
 // CHECK: panda{{.*}} #3
 // CHECK: bar{{.*}} #0
 // CHECK: qux{{.*}} #1
 // CHECK: qax{{.*}} #4
 // CHECK: qq{{.*}} #5
+// CHECK: lake{{.*}} #6
 // CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87"
 // CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+aes,+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
 // CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+x87,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop,-xsave,-xsaveopt"
 // CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"
 // CHECK: #4 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes"
 // CHECK: #5 = {{.*}}"target-cpu"="x86-64" "target-features"="+fxsr,+sse,+sse2,+x87,-3dnow,-3dnowa,-mmx"
+// CHECK: #6 = {{.*}}"target-cpu"="lakemont" "target-features"="+mmx,+sse,+sse2"

test/Preprocessor/predefined-arch-macros.c

 // CHECK_SLM_M64: #define __amd64 1
 // CHECK_SLM_M64: #define __amd64__ 1
 // CHECK_SLM_M64: #define __slm 1
 // CHECK_SLM_M64: #define __slm__ 1
 // CHECK_SLM_M64: #define __tune_slm__ 1
 // CHECK_SLM_M64: #define __x86_64 1
 // CHECK_SLM_M64: #define __x86_64__ 1
 //
+// RUN: %clang -march=lakemont -m32 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck %s -check-prefix=CHECK_LMT_M32
+// CHECK_LMT_M32: #define __i386 1
+// CHECK_LMT_M32: #define __i386__ 1
+// CHECK_LMT_M32: #define __tune_lakemont__ 1
+// CHECK_LMT_M32: #define i386 1
+// RUN: not %clang -march=lakemont -m64 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck %s -check-prefix=CHECK_LMT_M64
+// CHECK_LMT_M64: error:
+//
 // RUN: %clang -march=geode -m32 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck %s -check-prefix=CHECK_GEODE_M32
 // CHECK_GEODE_M32: #define __3dNOW_A__ 1
 // CHECK_GEODE_M32: #define __3dNOW__ 1
 // CHECK_GEODE_M32: #define __MMX__ 1
 // CHECK_GEODE_M32: #define __geode 1
 // CHECK_GEODE_M32: #define __geode__ 1