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[x86, AVX] replace masked load with full vector load when possible
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Authored by spatel on Mar 11 2016, 12:00 PM.

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Summary

This patch shows the benefit of converting masked vector loads to regular vector loads for x86 AVX.
I've raised the legality issue of reading the extra memory bytes on llvm-dev.

  1. x86 already does this kind of optimization for multiple scalar loads -> vector load.
  2. If other targets have the same flexibility, we could move this transform up to CGP or DAGCombiner.

Diff Detail

Repository
rL LLVM

Event Timeline

spatel updated this revision to Diff 50458.Mar 11 2016, 12:00 PM
spatel retitled this revision from to [x86, AVX] replace masked load with full vector load when possible.
spatel updated this object.
spatel added reviewers: ashutosh.nema, RKSimon, delena.
spatel added a subscriber: llvm-commits.
RKSimon accepted this revision.Mar 13 2016, 1:57 PM
RKSimon edited edge metadata.

LGTM with one minor comment

lib/Target/X86/X86ISelLowering.cpp
27371 ↗(On Diff #50458)

if (ML->getSrc0().isUndef())

This revision is now accepted and ready to land.Mar 13 2016, 1:57 PM
ashutosh.nema edited edge metadata.Mar 13 2016, 9:41 PM

Thanks Sanjay for working on this.

Changes looks OK to me, just a minor comment.

lib/Target/X86/X86ISelLowering.cpp
27342 ↗(On Diff #50458)

Please retain and add comments here.

spatel added inline comments.Mar 14 2016, 9:22 AM
lib/Target/X86/X86ISelLowering.cpp
27342 ↗(On Diff #50458)

I moved the comment down to line 27365 because it wasn't function-level anymore. Please let me know if you have something else in mind. Thanks!

spatel marked an inline comment as done.Mar 14 2016, 9:25 AM
spatel added inline comments.
lib/Target/X86/X86ISelLowering.cpp
27371 ↗(On Diff #50458)

Good catch. I cut and pasted that. Looks like a mass edit is needed - a grep shows 194 of these scattered around the code base.

This revision was automatically updated to reflect the committed changes.
spatel marked an inline comment as done.