For the AMD GFX90A GPU, the SCC instruction modifier is allowed
for certain classes of instructions. However, the current assembler
generates an error message, "scc is not supported on this GPU",
regardless of the instruciton. This fix modifies the message as well
as the logic for generating the message. Related tests are moved from
gfx90a_err.s to gfx90a_asm_features.s.
Details
- Reviewers
arsenm - Group Reviewers
Restricted Project
Diff Detail
Event Timeline
(1) created a const to hold the flags for all the 4 classes of instructions (2) tests removed from gfx90a_err.s are added to gfx90a_asm_features.s.
Made 2 changes per review comments: (1) var name changed from scc_flags to HasSCCInsts (2) code formatted with clang-format.
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | ||
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4480–4490 | SCCInsts isn't accurate. HasScalarCacheControl? |
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | ||
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4480–4490 | I thought SCC stands for System Cache Coherence. Anyway, SCC is not spelled out in this function, or anywhere else. A more accurate name for this tmp var is probably "AllowSCC" b/c the rhs is the flags representing 4 classes of instructions that allow SCC. Your thoughts? |
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | ||
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4480–4490 | SCC is also a completely unrelated register so the whole thing is confusing |
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | ||
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4480–4490 | How about "AllowSCCModifier"? That should make it clear that we are referring to the modifier, not the register. |
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | ||
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4480–4490 | Sure |
I thought we had predefined masks for all the memory instruction types