[ELF] - Implemented optimization for R_X86_64_GOTPCREL relocation.

[grimar]

Summary

System V Application Binary Interface AMD64 Architecture Processor Supplement Draft Version 0.99.8
(https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-r249.pdf, B.2 "B.2 Optimize GOTPCRELX Relocations")
introduces possible relaxations for R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX.

That patch implements the next relaxation:
mov foo@GOTPCREL(%rip), %reg => lea foo(%rip), %reg
and also opens door for implementing all other ones.

Implementation was suggested by Rafael Ávila de Espíndola with few additions and testcases by myself.

[• rafael]

Do you also intend to also implement the other optimizations listed in the ABI?

ELF/Target.cpp

83

canBePreempted already checks this, no?

test/ELF/gotpc-relax-und-dso.s

25

Use {{.*}} instead of checking the bits.

[grimar]

• Addressed review comments
• Rebased

[grimar]

In D15779#329436, @rafael wrote:

Do you also intend to also implement the other optimizations listed in the ABI?

I have plan to implement all those which listed in "B.2 Optimize GOTPCRELX Relocations":
call *foo@GOTPCREL(%rip) -> nop call foo
call *foo@GOTPCREL(%rip) -> call foo nop
jmp *foo@GOTPCREL(%rip) -> jmp foo nop
mov foo@GOTPCREL(%rip), %reg -> lea foo(%rip), %reg (this patch implements it)

I have no any plans about any others optimizations.

ELF/Target.cpp

83

Looks like so, fixed.

test/ELF/gotpc-relax-und-dso.s

25

I leaved bits specially here. I think for patches that emit binary data it is reasonable to check it.
For example the same instruction can be encoded in a different way. This one patch changes one byte and so I would like to check binary output as well as instructions generated.

[• rafael]

One thing to keep in mind is the possibility of overflow (https://sourceware.org/bugzilla/show_bug.cgi?id=18591). No need to handle it now since llvm is also broken (pr 26208). I will try to fix the LLVM, at which point we should probably check for overflows in lld.

ELF/Target.cpp

698

Update the comment to say that we can do mov -> lea with R_X86_64_GOTPCREL, but we need R_X86_64_GOTPCRELX for the other optimizations

702

Could canBePreempted take care of the ifunc check?

955

You are passing -1 in here because the offset is not available, correct?
Is there any point in ever passing the offset if we cannot pass it here?

[grimar]

ELF/Target.cpp

698

Ok, I can do that.
I just supposed that since we are not going to implement any other ones before R_X86_64_GOTPCRELX then such comment is excessive.
Current one just describes what we do, not sure if we want to list everything we will not do :)

702

I would not do it.
For example we have the next code currently:

if (!CanBePreempted && Body && isGnuIFunc<ELFT>(*Body))
      Reloc = Target->getIRelativeReloc();

Currently we implemented ifunc for static linking case. But afaik gold/bfd supports dynamic case for which real CBP makes sence. And I am not sure we should cover such special type under clear for understanding canBePreempted() name.

955

I cannot pass it here, but I still do the check for that place inside canOptimizeGotPcRel().
I just assume that there is not possible to have negative buffer overflow from here.
My point was: since we dont have R_X86_64_GOTPCRELX yet its better to do all possible additional checks. After implementation of R_X86_64_GOTPCRELX we probably can remove it (like we dont check overflows for TLS relaxations, assuming inputs are correct).

Also I am not sure will we still perform relaxation for raw R_X86_64_GOTPCREL then or not (I quess better would be to stop support to be consistent with ABI, but if both gold/bfd do that then it is still safe I think).

[grimar]

In D15779#330019, @rafael wrote:

One thing to keep in mind is the possibility of overflow (https://sourceware.org/bugzilla/show_bug.cgi?id=18591). No need to handle it now since llvm is also broken (pr 26208). I will try to fix the LLVM, at which point we should probably check for overflows in lld.

That is interesting issue, thaks for info.

[• rafael]

Could canBePreempted take care of the ifunc check?

I would not do it.
For example we have the next code currently:

if (!CanBePreempted && Body && isGnuIFunc<ELFT>(*Body))
      Reloc = Target->getIRelativeReloc();

Currently we implemented ifunc for static linking case. But afaik gold/bfd supports dynamic case for which real CBP makes sence. And I am not sure we should cover such special type under clear for understanding canBePreempted() name.

Good point. Thanks.

Comment at: ELF/Target.cpp:955
@@ -906,1 +954,3 @@

case R_X86_64_GOTPCREL:

+ if (S && canOptimizeGotPcRel(Type, *S, Loc, (uint64_t)-1))

+ optimizeGotPcRel(Loc);

rafael wrote:

You are passing -1 in here because the offset is not available, correct?
Is there any point in ever passing the offset if we cannot pass it here?

I cannot pass it here, but I still do the check for that place inside canOptimizeGotPcRel().
I just assume that there is not possible to have negative buffer overflow from here.
My point was: since we dont have R_X86_64_GOTPCRELX yet its better to do all possible additional checks. After implementation of R_X86_64_GOTPCRELX we probably can remove it (like we dont check overflows for TLS relaxations, assuming inputs are correct).

You would still get a buffer overflow. Say Off is 1. On the first call
you pass 1 and avoid the buffer access. On the second one you pass -1
and still access position -2.

The options I see are

• Save the result of the call.
• Propagate Off to RelocateOne
• Don't check it.

I would go with 3 for now.

[grimar]

In D15779#330316, @rafael wrote:

Could canBePreempted take care of the ifunc check?

I would not do it.
For example we have the next code currently:

if (!CanBePreempted && Body && isGnuIFunc<ELFT>(*Body))
      Reloc = Target->getIRelativeReloc();

Currently we implemented ifunc for static linking case. But afaik gold/bfd supports dynamic case for which real CBP makes sence. And I am not sure we should cover such special type under clear for understanding canBePreempted() name.

Good point. Thanks.

Comment at: ELF/Target.cpp:955
@@ -906,1 +954,3 @@

case R_X86_64_GOTPCREL:

+ if (S && canOptimizeGotPcRel(Type, *S, Loc, (uint64_t)-1))

+ optimizeGotPcRel(Loc);

rafael wrote:

You are passing -1 in here because the offset is not available, correct?
Is there any point in ever passing the offset if we cannot pass it here?

I cannot pass it here, but I still do the check for that place inside canOptimizeGotPcRel().
I just assume that there is not possible to have negative buffer overflow from here.
My point was: since we dont have R_X86_64_GOTPCRELX yet its better to do all possible additional checks. After implementation of R_X86_64_GOTPCRELX we probably can remove it (like we dont check overflows for TLS relaxations, assuming inputs are correct).

You would still get a buffer overflow. Say Off is 1. On the first call
you pass 1 and avoid the buffer access. On the second one you pass -1
and still access position -2.

Yes, I know, as "overflow" I was mean that there would not be access violation in that place.
(It is not possible to get it here I believe because of lot of other data in front of buffer before relocations).
So the worst thing could happen is a possible read of some side data at second check. But at least one correct check would still be performed (first one).

The options I see are

• Save the result of the call.
• Propagate Off to RelocateOne
• Don't check it.

I would go with 3 for now.

I am agree with that. Now I think that having partial checks is no better than absence of them here.

[grimar]

Lots of tests started to crash if I remove the "Off <= 2" check. I think that was the reason why I added that initially.

25> lld :: ELF/dynamic-reloc-weak.s
25> lld :: ELF/got.s
25> lld :: ELF/gotpc-relax-und-dso.s
25> lld :: ELF/local-got-shared.s
25> lld :: ELF/local-got.s
25> lld :: ELF/relocation.s
25> lld :: ELF/relro.s

For example ELF/local-got.s which has

_start:
	call bar@gotpcrel

So it looks would be better or to leave check as is for now or to add Off argument to RelocateOne.
I think we should check the buffer somehow to have correct solution. So I would add the argument.

[grimar]

In D15779#330411, @grimar wrote:

Lots of tests started to crash if I remove the "Off <= 2" check. I think that was the reason why I added that initially.

I`ll recheck the reasons of it and how to fix that tomorrow. Probably I am mistaken about that Off argument is needed. Will update the patch then.

[ruiu]

This is not a comment for this particular patch, but in general, pieces of code for code relaxation are scattered to many places -- you have multiple calls of canXXX and call optimizeXXX at some place. It tend to hard to understand. Each patch doesn't increase complexity that much, but when they accumulate, they look being entangled.

Can we separate code relaxation from relocation application? I think that we can create a function that visits all relocations and rewrite code and possibly relocations to relax code, and call that function before applying relocations. Then when we are applying relocations, we don't need to think about code relaxation at all. Anyway, I'd like to find some way to reduce complexity of relocation application.

[grimar]

In D15779#330631, @ruiu wrote:

This is not a comment for this particular patch, but in general, pieces of code for code relaxation are scattered to many places -- you have multiple calls of canXXX and call optimizeXXX at some place. It tend to hard to understand. Each patch doesn't increase complexity that much, but when they accumulate, they look being entangled.

Can we separate code relaxation from relocation application? I think that we can create a function that visits all relocations and rewrite code and possibly relocations to relax code, and call that function before applying relocations. Then when we are applying relocations, we don't need to think about code relaxation at all. Anyway, I'd like to find some way to reduce complexity of relocation application.

I need to think about how possible to do that better. In general that looks for me like additional pass through all relocations and marking them or excluding from futher pass. Idea itself looks attractive for me, but I afraid of possible code duplication that might happen in that case.
Also do you mean you want to see that change before landing any other relaxation patch or its fine to make it right after current pending ones (there are two of them from my side now at reviews: http://reviews.llvm.org/D16201, http://reviews.llvm.org/D15779) ?

[grimar]

• Addressed review comments.
• Removed Off argument.
• Added error message for case when relocation overflow happens during relaxation.

[grimar]

In D15779#330019, @rafael wrote:

One thing to keep in mind is the possibility of overflow (https://sourceware.org/bugzilla/show_bug.cgi?id=18591). No need to handle it now since llvm is also broken (pr 26208). I will try to fix the LLVM, at which point we should probably check for overflows in lld.

Regarding this I added error message to relocateOne() and that have 2 problems:

1. I just unsure how to find out the overflow and not convert mov->lea before we already applying relocations in relocateOne(). I need to find out the distance between symbol and instructions really early to use canOptimizeGotPcRel() method for avoiding create of GOT entries and so on.
2. I did not include the test for it, because it creates 4gb file, I am not sure that is good for test. But I used sample from https://sourceware.org/bugzilla/show_bug.cgi?id=18591 to check that error is displaying.

[• rafael]

ELF/Target.cpp

65

This highlights Rui's comment that we are spreading optimizations out too much. A relocation being relative or not should really not depend on it being optimized. If it is optimized, some other relocation takes its place.

Can you just check for optimization at the caller and pass the new relocation value?

[• rafael]

Or, we should try not computing the size upfront:

It might be possible to avoid this by outputting the file with write:
* Write the allocated output sections, computing addresses.
* Apply relocations, recording which ones require a dynamic reloc.
* Write the dynamic relocations.
// * Write the rest of the file.

[grimar]

X86_64TargetInfo::canOptimizeGotPcRel() needs to have check for "_DYNAMIC" symbol either (since we almost have it, http://reviews.llvm.org/D17607) + testcase.
Both gold/bfd does not apply such optimization for it.

[grimar]

That patch was old, so I:

• Rebased it
• Added _DYNAMIC symbol ignore.
• Reformated the testcases.

[grimar]

• Reimplemented to match updated relocations handling code.

[grimar]

Rebased to fit with the latest llvm and lld code.

[grimar]

Note: this version does not check the instuction op code and does not relax with common gotpcrel relocation.
I think it is save and correct now just to handle R_X86_64_REX_GOTPCRELX one for what this patch do.
This approach simplifies the code a little and should be fully compatible with ABI now.

[• rafael]

ELF/Target.cpp

66

I would probably have this return R_GOT_PC and then have a generic logic for "can we optimize this got use". This would be somewhat similar to the fact that we optimize plt acesses to local symbols.

70

Why is _DYNAMIC special?

The other checks are not architecture specific and should be in architecture independent code.

[grimar]

• Reimplemented in more generic way (addressed review comments).

ELF/Target.cpp

66

Done, reimplemented in more generic way.

70

That is something directly mentioned in docs I think, but initially in binutils there also were no exception for _DYNAMIC,
and they had to do that finally because it turns out ld.so uses it:
https://sourceware.org/ml/binutils/2012-09/msg00000.html

[grimar]

ELF/Target.cpp

64–1

Something *not* mentioned, I mean.

[grimar]

I am reworking this, it was not correct to remove opcode check (I was for some reason thinking that R_X86_64_REX_GOTPCRELX is generated specially for mov->lea relaxation),
so I plan to update this soon.

[grimar]

• Restored removed earlier by mistake a check of opcode for mov->lea conversion.
• Updated code and testcases to produce/relax R_X86_64_GOTPCRELX.

[• rafael]

looking

[• rafael]

ELF/InputSection.h

67 ↗

(On Diff #58087)

It is a bit surprising to see this here. If the got access is relaxed, it result will not refer to a got entry, no?

ELF/Target.cpp

70

I am pretty sure this reference to "_DYNAMIC" is bogus. The email you posted refers to got[0], but we write that value directly. This code will never be used for that.

72

Every target would have to call this, no? Why not call it from target independent code?

76

It is not clear why you need this. relocateOne has a value check. Why you need one here?

[• rafael]

ELF/Writer.cpp

4

I don't think you can do an early return here. You should set Expr and let the function continue so we get the checks.

[• rafael]

I decided to apply the patch to give it a better review.

Some of the issues I pointed out in the review (R_RELAX_GOT referring
to got entry) were the causes of other changes (unnecessary continue).

Also, the *GOTPCRELX relocations can always be relaxed if the symbol
is not ifunc or preemptable, no? It is just that it is not always a
mov->lea.

In any case, I have attached the result of simplifying your patch a
bit. Let me know what you think.

Cheers,
Rafael

• t.diff10 KBDownload

[grimar]

In D15779#437390, @rafael wrote:

I decided to apply the patch to give it a better review.

Some of the issues I pointed out in the review (R_RELAX_GOT referring
to got entry) were the causes of other changes (unnecessary continue).

Thanks !

Also, the *GOTPCRELX relocations can always be relaxed if the symbol
is not ifunc or preemptable, no? It is just that it is not always a
mov->lea.

Sure, but this patch supports only mov->lea conversion. So for our case
I decided to check that instruction is exactly mov, because of next:

In any case, I have attached the result of simplifying your patch a
bit. Let me know what you think.

I think it looks better than mine, but it have an issue:
Imagine you have next code to relax:

.text
.globl foo
.type foo, @function
foo:
 nop

.text
.globl _start
 call	*foo@GOTPCREL(%rip)

Since your patch does not check the mov opcode before relaxing, it "relax" that to lea instead
of "nop call foo" or "call foo nop". That is because relaxGot() does not yet know about how to relax the other
instructions yet.

Cheers,
Rafael

• t.diff10 KBDownload

If you dont mind, I`ll use your code as a base, will fix the issue above, add the testcase for it and update.
(I also plan to add other relaxations, but I wonder will it be better to do that in this patch or separatelly,
I`ll take a look how to do that cleaner, probably implementing all of them at once can help to simplify
the patch, probably not).

ELF/Target.cpp

76

It would write something like "relocation R_X86_64_PC32 is out of range". That does not imo provide enough
info here about what really happened.
Ideally we just should not do that relaxation if we know that overflow happens.

[grimar]

In D15779#437390, @rafael wrote:

I decided to apply the patch to give it a better review.

Some of the issues I pointed out in the review (R_RELAX_GOT referring
to got entry) were the causes of other changes (unnecessary continue).

Also, the *GOTPCRELX relocations can always be relaxed if the symbol
is not ifunc or preemptable, no? It is just that it is not always a
mov->lea.

In any case, I have attached the result of simplifying your patch a
bit. Let me know what you think.

Cheers,
Rafael

• t.diff10 KBDownload

Rafael, returning to this, I have few thoughts now.

Latest x64 ABI describes 3 possible groups of relaxations atm (https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI):

1. Convert call and jump
2. Convert mov->lea
3. Convert Test and Binop Convert memory operand of test and binop into

immediate operand, where binop is one of adc, add, and, cmp, or,
sbb, sub, xor instructions, when position-independent code is disabled.

If there was no 3, we probably would be able to leave R_RELAX_GOT_PC expression assigning
logic as is and just teach relaxGot() to relax all of them at once. If do that at once, that would help to avoid
the op code checks anywhere except relaxGot() itself.

But 3 says that depending on PIC for a specific set of instruction relaxation is possible or not.

That probably does not leave us a chance for above and solution I see is introduce Target method
canGotBeRelaxed() or something, which will check the instructions opcodes, like:

bool canGotBeRelaxed() {
if (call or jump or move opcodes) 
  return true;
if (Test or given binop opcodes)
  return !PIC:
return false; //I guess it is possible to have instructions that can not be relaxed even if RELX relaxation is present ?
}

and call it from adjustExpr(). What do you think ?

[• rafael]

Rafael, returning to this, I have few thoughts now.

Latest x64 ABI describes 3 possible groups of relaxations atm (https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI):

1. Convert call and jump
2. Convert mov->lea
3. Convert Test and Binop Convert memory operand of test and binop into

immediate operand, where binop is one of adc, add, and, cmp, or,
sbb, sub, xor instructions, when position-independent code is disabled.

If there was no 3, we probably would be able to leave R_RELAX_GOT_PC expression assigning
logic as is and just teach relaxGot() to relax all of them at once. If do that at once, that would help to avoid
the op code checks anywhere except relaxGot() itself.

But 3 says that depending on PIC for a specific set of instruction relaxation is possible or not.

That probably does not leave us a chance for above and solution I see is introduce Target method
canGotBeRelaxed() or something, which will check the instructions opcodes, like:

bool canGotBeRelaxed() {
if (call or jump or move opcodes)
  return true;
if (Test or given binop opcodes)
  return !PIC:
return false; //I guess it is possible to have instructions that can not be relaxed even if RELX relaxation is present ?
}

and call it from adjustExpr(). What do you think ?

Yes, I missed that case 3 is non pic only :-(

Given that we don't want to complicate the interface of getRelExpr, I
think that, relative to my patch, what is needed is

• Delete R_RELAXABLE_GOT_PC, getRelExpr returns just R_GOT_PC.
• In Writer.cpp, the code
  
  if (Expr == R_RELAXABLE_GOT_PC)

becomes

if (Expr == R_GOT_PC && Target->canRelaxGot(....))

Given that we will need the predicate, I would leave this patch doing
just mov -> lea for now.

Cheers,
Rafael

[grimar]

In D15779#438263, @rafael wrote:

Given that we will need the predicate, I would leave this patch doing
just mov -> lea for now.

Cheers,
Rafael

Was this about this patch only or it means I should suspend working on
other relaxations for following patches either ?

George.

[grimar]

In D15779#438263, @rafael wrote:

Given that we will need the predicate, I would leave this patch doing
just mov -> lea for now.

Cheers,
Rafael

Ah, I misread. Please ignore my previous comment.

[grimar]

• Updated code according to Rafael's directions.
• Updated testcase to check few other instructions (that them are not converted to lea).

[grimar]

• Rebased to top

[• rafael]

LGTM with nits.

Thank you so much for caring this over some many redesigns. I am very happy to see that this fits nicely in the existing infrastructure.

ELF/Relocations.cpp

345 ↗

(On Diff #58404)

Don't make uintX_t a template parameter. You can just use ELFT::uint

490 ↗

(On Diff #58404)

Use the existing variable Buf.

ELF/Target.cpp

65

Now this is just moving the label, please leave it in the original location.

70

Converting

[• rafael]

LGTM wit nits. See the webpage for the nits, phab is not sending
emails again :-(

[grimar]

In D15779#439090, @rafael wrote:

LGTM with nits.

Thank you so much for caring this over some many redesigns. I am very happy to see that this fits nicely in the existing infrastructure.

Thank you for all that reviews and final code suggestion. Btw today is exactly 5 month from first time this was posted :)

ELF/InputSection.cpp

for (size_t I = 0; I < Num; ++I) {
     if (!Body) {
       uintX_t SymVA = getLocalRelTarget(*File, RI, A);
       // We need to adjust SymVA value in case of R_MIPS_GPREL16/32 relocations
       // because they use the following expression to calculate the relocation's
       // result for local symbol: S + A + GP0 - G.
       if (Config->EMachine == EM_MIPS &&
           (Type == R_MIPS_GPREL16 || Type == R_MIPS_GPREL32))
         SymVA += File->getMipsGp0();
-      Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA, 0,
+      Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA, 0, Body,
                           findMipsPairedReloc(Buf, SymIndex, Type, NextRelocs));
       continue;
     }
 
     if (Target->isTlsGlobalDynamicReloc(Type) &&
         !Target->isTlsOptimized(Type, Body)) {
       Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc,
                           Out<ELFT>::Got->getGlobalDynAddr(*Body) +
                               getAddend<ELFT>(RI));
       continue;
     }
 
     uintX_t SymVA = getSymVA<ELFT>(*Body);
     if (Target->relocNeedsPlt(Type, *Body)) {
       SymVA = Out<ELFT>::Plt->getEntryAddr(*Body);
-    } else if (Target->relocNeedsGot(Type, *Body)) {
+    } else if (Target->relocNeedsGot(Type, *Body, Buf, Offset)) {
       SymVA = Out<ELFT>::Got->getEntryAddr(*Body);
       if (Body->isTls())
         Type = Target->getTlsGotReloc(Type);
     } else if (!Target->needsCopyRel(Type, *Body) &&
                isa<SharedSymbol<ELFT>>(*Body)) {
       continue;
     } else if (Target->isTlsDynReloc(Type, *Body)) {
       continue;
     } else if (Target->isSizeReloc(Type) && canBePreempted(Body, false)) {
       // A SIZE relocation is supposed to set a symbol size, but if a symbol
       // can be preempted, the size at runtime may be different than link time.
       // If that's the case, we leave the field alone rather than filling it
       // with a possibly incorrect value.
       continue;
     } else if (Config->EMachine == EM_MIPS) {
       if (Type == R_MIPS_HI16 && Body == Config->MipsGpDisp)
         SymVA = getMipsGpAddr<ELFT>() - AddrLoc;
       else if (Type == R_MIPS_LO16 && Body == Config->MipsGpDisp)
         SymVA = getMipsGpAddr<ELFT>() - AddrLoc + 4;
     }
     uintX_t Size = getSymSize<ELFT>(*Body);
+    uint8_t *MP = findMipsPairedReloc(Buf, SymIndex, Type, NextRelocs);
     Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA + A, Size + A,
-                        findMipsPairedReloc(Buf, SymIndex, Type, NextRelocs));
+                        Body, MP);
   }
 }
 
 template <class ELFT> void InputSection<ELFT>::writeTo(uint8_t *Buf) {
   if (this->Header->sh_type == SHT_NOBITS)
     return;
   // Copy section contents from source object file to output file.
   ArrayRef<uint8_t> Data = this->getSectionData();

ELF/Target.h

public:
   virtual void writeGotHeaderEntries(uint8_t *Buf) const;
   virtual void writeGotPltHeaderEntries(uint8_t *Buf) const;
   virtual void writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const = 0;
   virtual void writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
                                  uint64_t PltEntryAddr) const = 0;
   virtual void writePltEntry(uint8_t *Buf, uint64_t GotAddr,
                              uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                              int32_t Index, unsigned RelOff) const = 0;
-
   // Returns true if a relocation is just a hint for linker to make for example
   // some code optimization. Such relocations should not be handled as a regular
   // ones and lead to dynamic relocation creation etc.
   virtual bool isHintReloc(uint32_t Type) const;
 
   // Returns true if a relocation is relative to the place being relocated,
   // such as relocations used for PC-relative instructions. Such relocations
   // need not be fixed up if an image is loaded to a different address than
   // the link-time address. So we don't have to emit a relocation for the
   // dynamic linker if isRelRelative returns true.
-  virtual bool isRelRelative(uint32_t Type) const;
-
+  virtual bool isRelRelative(uint32_t Type, const SymbolBody *S,
+                             const uint8_t *D, uint64_t Off) const;
   virtual bool isSizeReloc(uint32_t Type) const;
   virtual bool relocNeedsDynRelative(unsigned Type) const { return false; }
-  virtual bool relocNeedsGot(uint32_t Type, const SymbolBody &S) const = 0;
+  virtual bool relocNeedsGot(uint32_t Type, const SymbolBody &S,
+                             const uint8_t *D = nullptr,
+                             uint64_t Off = 0) const = 0;
   virtual bool relocNeedsPlt(uint32_t Type, const SymbolBody &S) const = 0;
   virtual void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                            uint64_t P, uint64_t SA, uint64_t ZA = 0,
+                           const SymbolBody *S = nullptr,
                            uint8_t *PairedLoc = nullptr) const = 0;
   virtual bool isGotRelative(uint32_t Type) const;
   virtual bool isTlsOptimized(unsigned Type, const SymbolBody *S) const;
   virtual bool needsCopyRel(uint32_t Type, const SymbolBody &S) const;
   virtual unsigned relocateTlsOptimize(uint8_t *Loc, uint8_t *BufEnd,
                                        uint32_t Type, uint64_t P, uint64_t SA,
                                        const SymbolBody &S) const;
   virtual ~TargetInfo();

ELF/Target.cpp

 }
 
 template <unsigned N> static void checkIntUInt(uint64_t V, uint32_t Type) {
   if (isInt<N>(V) || isUInt<N>(V))
     return;
   StringRef S = getELFRelocationTypeName(Config->EMachine, Type);
   error("Relocation " + S + " out of range");
 }
 
 template <unsigned N> static void checkAlignment(uint64_t V, uint32_t Type) {
   if ((V & (N - 1)) == 0)
     return;
   StringRef S = getELFRelocationTypeName(Config->EMachine, Type);
   error("Improper alignment for relocation " + S);
 }
 
 template <class ELFT> bool isGnuIFunc(const SymbolBody &S) {
   if (auto *SS = dyn_cast<DefinedElf<ELFT>>(&S))
     return SS->Sym.getType() == STT_GNU_IFUNC;
   return false;
 }
 
 template bool isGnuIFunc<ELF32LE>(const SymbolBody &S);
 template bool isGnuIFunc<ELF32BE>(const SymbolBody &S);
 template bool isGnuIFunc<ELF64LE>(const SymbolBody &S);
 template bool isGnuIFunc<ELF64BE>(const SymbolBody &S);
 
 namespace {
 class X86TargetInfo final : public TargetInfo {
 public:
   X86TargetInfo();
   void writeGotPltHeaderEntries(uint8_t *Buf) const override;
   unsigned getDynReloc(unsigned Type) const override;
   unsigned getTlsGotReloc(unsigned Type) const override;
   bool isTlsDynReloc(unsigned Type, const SymbolBody &S) const override;
   void writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
                          uint64_t PltEntryAddr) const override;
   void writePltEntry(uint8_t *Buf, uint64_t GotAddr, uint64_t GotEntryAddr,
                      uint64_t PltEntryAddr, int32_t Index,
                      unsigned RelOff) const override;
   bool needsCopyRel(uint32_t Type, const SymbolBody &S) const override;
   bool relocNeedsDynRelative(unsigned Type) const override;
-  bool relocNeedsGot(uint32_t Type, const SymbolBody &S) const override;
+  bool relocNeedsGot(uint32_t Type, const SymbolBody &S, const uint8_t *D,
+                     uint64_t Off) const override;
   bool relocNeedsPlt(uint32_t Type, const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
+                   uint64_t SA, uint64_t ZA = 0, const SymbolBody *S = nullptr,
                    uint8_t *PairedLoc = nullptr) const override;
   bool isTlsOptimized(unsigned Type, const SymbolBody *S) const override;
   unsigned relocateTlsOptimize(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                uint64_t P, uint64_t SA,
                                const SymbolBody &S) const override;
   bool isGotRelative(uint32_t Type) const override;
 
 private:
public:
   void writeGotPltHeaderEntries(uint8_t *Buf) const override;
   void writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
                          uint64_t PltEntryAddr) const override;
   void writePltEntry(uint8_t *Buf, uint64_t GotAddr, uint64_t GotEntryAddr,
                      uint64_t PltEntryAddr, int32_t Index,
                      unsigned RelOff) const override;
   bool needsCopyRel(uint32_t Type, const SymbolBody &S) const override;
-  bool relocNeedsGot(uint32_t Type, const SymbolBody &S) const override;
+  bool relocNeedsGot(uint32_t Type, const SymbolBody &S, const uint8_t *D,
+                     uint64_t Off) const override;
   bool relocNeedsPlt(uint32_t Type, const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
+                   uint64_t SA, uint64_t ZA = 0, const SymbolBody *S = nullptr,
                    uint8_t *PairedLoc = nullptr) const override;
-  bool isRelRelative(uint32_t Type) const override;
+  bool isRelRelative(uint32_t Type, const SymbolBody *S, const uint8_t *D,
+                     uint64_t Off) const override;
   bool isTlsOptimized(unsigned Type, const SymbolBody *S) const override;
   bool isSizeReloc(uint32_t Type) const override;
   unsigned relocateTlsOptimize(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                uint64_t P, uint64_t SA,
                                const SymbolBody &S) const override;
 
 private:
   void relocateTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P,
                          uint64_t SA) const;
   void relocateTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P,
                          uint64_t SA) const;
   void relocateTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P,
                          uint64_t SA) const;
   void relocateTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint64_t P,
                          uint64_t SA) const;
+  bool canOptimizeGotPcRel(uint32_t Type, const SymbolBody &S, const uint8_t *D,
+                           uint64_t Off) const;
+  inline void optimizeGotPcRel(uint8_t *D) const;
 };
 
 class PPCTargetInfo final : public TargetInfo {
 public:
   PPCTargetInfo();
   void writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
                          uint64_t PltEntryAddr) const override;
   void writePltEntry(uint8_t *Buf, uint64_t GotAddr, uint64_t GotEntryAddr,
                      uint64_t PltEntryAddr, int32_t Index,
                      unsigned RelOff) const override;
-  bool relocNeedsGot(uint32_t Type, const SymbolBody &S) const override;
+  bool relocNeedsGot(uint32_t Type, const SymbolBody &S, const uint8_t *D,
+                     uint64_t Off) const override;
   bool relocNeedsPlt(uint32_t Type, const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
+                   uint64_t SA, uint64_t ZA = 0, const SymbolBody *S = nullptr,
                    uint8_t *PairedLoc = nullptr) const override;
-  bool isRelRelative(uint32_t Type) const override;
+  bool isRelRelative(uint32_t Type, const SymbolBody *S, const uint8_t *D,
+                     uint64_t Off) const override;
 };
 
 class PPC64TargetInfo final : public TargetInfo {
 public:
   PPC64TargetInfo();
   void writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
                          uint64_t PltEntryAddr) const override;
   void writePltEntry(uint8_t *Buf, uint64_t GotAddr, uint64_t GotEntryAddr,
                      uint64_t PltEntryAddr, int32_t Index,
                      unsigned RelOff) const override;
-  bool relocNeedsGot(uint32_t Type, const SymbolBody &S) const override;
+  bool relocNeedsGot(uint32_t Type, const SymbolBody &S, const uint8_t *D,
+                     uint64_t Off) const override;
   bool relocNeedsPlt(uint32_t Type, const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
+                   uint64_t SA, uint64_t ZA = 0, const SymbolBody *S = nullptr,
                    uint8_t *PairedLoc = nullptr) const override;
-  bool isRelRelative(uint32_t Type) const override;
+  bool isRelRelative(uint32_t Type, const SymbolBody *S, const uint8_t *D,
+                     uint64_t Off) const override;
 };
 
 class AArch64TargetInfo final : public TargetInfo {
 public:
   AArch64TargetInfo();
   unsigned getDynReloc(unsigned Type) const override;
   void writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
                          uint64_t PltEntryAddr) const override;
   void writePltEntry(uint8_t *Buf, uint64_t GotAddr, uint64_t GotEntryAddr,
                      uint64_t PltEntryAddr, int32_t Index,
                      unsigned RelOff) const override;
   unsigned getTlsGotReloc(unsigned Type = -1) const override;
   bool isTlsDynReloc(unsigned Type, const SymbolBody &S) const override;
   bool needsCopyRel(uint32_t Type, const SymbolBody &S) const override;
-  bool relocNeedsGot(uint32_t Type, const SymbolBody &S) const override;
+  bool relocNeedsGot(uint32_t Type, const SymbolBody &S, const uint8_t *D,
+                     uint64_t Off) const override;
   bool relocNeedsPlt(uint32_t Type, const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
+                   uint64_t SA, uint64_t ZA = 0, const SymbolBody *S = nullptr,
                    uint8_t *PairedLoc = nullptr) const override;
 };
 
 class AMDGPUTargetInfo final : public TargetInfo {
 public:
   AMDGPUTargetInfo();
   void writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
                          uint64_t PltEntryAddr) const override;
   void writePltEntry(uint8_t *Buf, uint64_t GotAddr, uint64_t GotEntryAddr,
                      uint64_t PltEntryAddr, int32_t Index,
                      unsigned RelOff) const override;
-  bool relocNeedsGot(uint32_t Type, const SymbolBody &S) const override;
+  bool relocNeedsGot(uint32_t Type, const SymbolBody &S, const uint8_t *D,
+                     uint64_t Off) const override;
   bool relocNeedsPlt(uint32_t Type, const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
+                   uint64_t SA, uint64_t ZA = 0, const SymbolBody *S = nullptr,
                    uint8_t *PairedLoc = nullptr) const override;
 };
 
 template <class ELFT> class MipsTargetInfo final : public TargetInfo {
 public:
   MipsTargetInfo();
   unsigned getDynReloc(unsigned Type) const override;
   void writeGotHeaderEntries(uint8_t *Buf) const override;
   void writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
                          uint64_t PltEntryAddr) const override;
   void writePltEntry(uint8_t *Buf, uint64_t GotAddr, uint64_t GotEntryAddr,
                      uint64_t PltEntryAddr, int32_t Index,
                      unsigned RelOff) const override;
-  bool relocNeedsGot(uint32_t Type, const SymbolBody &S) const override;
+  bool relocNeedsGot(uint32_t Type, const SymbolBody &S, const uint8_t *D,
+                     uint64_t Off) const override;
   bool relocNeedsPlt(uint32_t Type, const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
+                   uint64_t SA, uint64_t ZA = 0, const SymbolBody *S = nullptr,
                    uint8_t *PairedLoc = nullptr) const override;
   bool isHintReloc(uint32_t Type) const override;
-  bool isRelRelative(uint32_t Type) const override;
+  bool isRelRelative(uint32_t Type, const SymbolBody *S, const uint8_t *D,
+                     uint64_t Off) const override;
 };
 } // anonymous namespace
 
 TargetInfo *createTarget() {
   switch (Config->EMachine) {
   case EM_386:
     return new X86TargetInfo();
   case EM_AARCH64:

 bool TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const {
   return false;
 }
 
 bool TargetInfo::isGotRelative(uint32_t Type) const { return false; }
 
 bool TargetInfo::isHintReloc(uint32_t Type) const { return false; }
 
-bool TargetInfo::isRelRelative(uint32_t Type) const { return true; }
+bool TargetInfo::isRelRelative(uint32_t Type, const SymbolBody *S,
+                               const uint8_t *D, uint64_t Off) const {
+  return true;
+}
 
 bool TargetInfo::isSizeReloc(uint32_t Type) const { return false; }
 
 unsigned TargetInfo::relocateTlsOptimize(uint8_t *Loc, uint8_t *BufEnd,
                                          uint32_t Type, uint64_t P, uint64_t SA,
                                          const SymbolBody &S) const {
   return 0;
 }

 
 bool X86TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const {
   if (Type == R_386_32 || Type == R_386_16 || Type == R_386_8)
     if (auto *SS = dyn_cast<SharedSymbol<ELF32LE>>(&S))
       return SS->Sym.getType() == STT_OBJECT;
   return false;
 }
 
-bool X86TargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S) const {
+bool X86TargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S,
+                                  const uint8_t *D, uint64_t Off) const {
   if (S.isTls() && Type == R_386_TLS_GD)
     return Target->isTlsOptimized(Type, &S) && canBePreempted(&S, true);
   if (Type == R_386_TLS_GOTIE || Type == R_386_TLS_IE)
     return !isTlsOptimized(Type, &S);
   return Type == R_386_GOT32 || relocNeedsPlt(Type, S);
 }
 
 bool X86TargetInfo::relocNeedsPlt(uint32_t Type, const SymbolBody &S) const {
   return isGnuIFunc<ELF32LE>(S) ||
          (Type == R_386_PLT32 && canBePreempted(&S, true)) ||
          (Type == R_386_PC32 && S.isShared());
 }
 
 bool X86TargetInfo::isGotRelative(uint32_t Type) const {
   // This relocation does not require got entry,
   // but it is relative to got and needs it to be created.
   // Here we request for that.
   return Type == R_386_GOTOFF;
 }
 
 void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                 uint64_t P, uint64_t SA, uint64_t ZA,
-                                uint8_t *PairedLoc) const {
+                                const SymbolBody *S, uint8_t *PairedLoc) const {
   switch (Type) {
   case R_386_32:
     add32le(Loc, SA);
     break;
   case R_386_GOT32: {
     uint64_t V = SA - Out<ELF32LE>::Got->getVA() -
                  Out<ELF32LE>::Got->getNumEntries() * 4;
     checkInt<32>(V, Type);

 bool X86_64TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const {
   if (Type == R_X86_64_32S || Type == R_X86_64_32 || Type == R_X86_64_PC32 ||
       Type == R_X86_64_64)
     if (auto *SS = dyn_cast<SharedSymbol<ELF64LE>>(&S))
       return SS->Sym.getType() == STT_OBJECT;
   return false;
 }
 
-bool X86_64TargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S) const {
+// System V Application Binary Interface AMD64 Architecture Processor Supplement
+// Draft Version 0.99.8 introduces possible relaxations for GOTPCRELX
+// Relocations.
+// R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX should be generated instead of
+// R_X86_64_GOTPCREL for places where relaxation is possible.
+// At the same time nothing stops us from using it right now for
+// R_X86_64_GOTPCREL if we perform additional check of instructions. Both gold
+// and bfd do the same.
+bool X86_64TargetInfo::canOptimizeGotPcRel(uint32_t Type, const SymbolBody &S,
+                                           const uint8_t *D,
+                                           uint64_t Off) const {
+  if (Type != R_X86_64_GOTPCREL || Off <= 2 || isGnuIFunc<ELF64LE>(S))
+    return false;
+  if (Off == (uint64_t)-1)
+    Off = 0;
+  if (D[Off - 2] != 0x8b)
+    return false;
+  return !canBePreempted(&S, true);
+}
+
+// Converting mov -> lea.
+void X86_64TargetInfo::optimizeGotPcRel(uint8_t *D) const { D[-2] = 0x8d; }
+
+bool X86_64TargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S,
+                                     const uint8_t *D, uint64_t Off) const {
   if (Type == R_X86_64_TLSGD)
     return Target->isTlsOptimized(Type, &S) && canBePreempted(&S, true);
   if (Type == R_X86_64_GOTTPOFF)
     return !isTlsOptimized(Type, &S);
+  if (canOptimizeGotPcRel(Type, S, D, Off))
+    return false;
   return Type == R_X86_64_GOTPCREL || relocNeedsPlt(Type, S);
 }
 
 bool X86_64TargetInfo::isTlsDynReloc(unsigned Type, const SymbolBody &S) const {
   return Type == R_X86_64_GOTTPOFF || Type == R_X86_64_TLSGD;
 }
 
 bool X86_64TargetInfo::relocNeedsPlt(uint32_t Type, const SymbolBody &S) const {
case R_X86_64_PC32:
     // identified by special relocation types (R_X86_64_JUMP_SLOT,
     // R_386_JMP_SLOT, etc).
     return S.isShared();
   case R_X86_64_PLT32:
     return canBePreempted(&S, true);
   }
 }
 
-bool X86_64TargetInfo::isRelRelative(uint32_t Type) const {
+bool X86_64TargetInfo::isRelRelative(uint32_t Type, const SymbolBody *S,
+                                     const uint8_t *D, uint64_t Off) const {
   switch (Type) {
   default:
     return false;
   case R_X86_64_DTPOFF32:
   case R_X86_64_DTPOFF64:
   case R_X86_64_PC8:
   case R_X86_64_PC16:
   case R_X86_64_PC32:
   case R_X86_64_PC64:
   case R_X86_64_PLT32:
     return true;
+  case R_X86_64_GOTPCREL:
+    return S && canOptimizeGotPcRel(Type, *S, D, Off);
   }
 }
 
 bool X86_64TargetInfo::isSizeReloc(uint32_t Type) const {
   return Type == R_X86_64_SIZE32 || Type == R_X86_64_SIZE64;
 }
 
 bool X86_64TargetInfo::isTlsOptimized(unsigned Type,
case R_X86_64_TLSLD:
     // The next relocation should be against __tls_get_addr, so skip it
     return 1;
   }
   llvm_unreachable("Unknown TLS optimization");
 }
 
 void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                    uint64_t P, uint64_t SA, uint64_t ZA,
+                                   const SymbolBody *S,
                                    uint8_t *PairedLoc) const {
   switch (Type) {
   case R_X86_64_32:
     checkUInt<32>(SA, Type);
     write32le(Loc, SA);
     break;
   case R_X86_64_32S:
     checkInt<32>(SA, Type);
     write32le(Loc, SA);
     break;
   case R_X86_64_64:
     write64le(Loc, SA);
     break;
   case R_X86_64_DTPOFF32:
     write32le(Loc, SA);
     break;
   case R_X86_64_DTPOFF64:
     write64le(Loc, SA);
     break;
   case R_X86_64_GOTPCREL:
+    if (S && canOptimizeGotPcRel(Type, *S, Loc, (uint64_t)-1))
+      optimizeGotPcRel(Loc);
+    write32le(Loc, SA - P);
+    break;
   case R_X86_64_PC32:
   case R_X86_64_PLT32:
   case R_X86_64_TLSGD:
   case R_X86_64_TLSLD:
     write32le(Loc, SA - P);
     break;
   case R_X86_64_SIZE32:
     write32le(Loc, ZA);

 static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; }
 static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; }
 static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; }
 static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
 
 PPCTargetInfo::PPCTargetInfo() {}
 void PPCTargetInfo::writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const {}
 void PPCTargetInfo::writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
-                                        uint64_t PltEntryAddr) const {}
 void PPCTargetInfo::writePltEntry(uint8_t *Buf, uint64_t GotAddr,
-                                  uint64_t GotEntryAddr,
-                                  uint64_t PltEntryAddr, int32_t Index,
-                                  unsigned RelOff) const {}
-bool PPCTargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S) const {
+                                  uint64_t GotEntryAddr, uint64_t PltEntryAddr,
+                                  int32_t Index, unsigned RelOff) const {}
+bool PPCTargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S,
+                                  const uint8_t *D, uint64_t Off) const {
   return false;
 }
 bool PPCTargetInfo::relocNeedsPlt(uint32_t Type, const SymbolBody &S) const {
   return false;
 }
-bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; }
+bool PPCTargetInfo::isRelRelative(uint32_t Type, const SymbolBody *S,
+                                  const uint8_t *D, uint64_t Off) const {
+  return false;
+}
 
 void PPCTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                 uint64_t P, uint64_t SA, uint64_t ZA,
-                                uint8_t *PairedLoc) const {
+                                const SymbolBody *S, uint8_t *PairedLoc) const {
   switch (Type) {
   case R_PPC_ADDR16_HA:
     write16be(Loc, applyPPCHa(SA));
     break;
   case R_PPC_ADDR16_LO:
     write16be(Loc, applyPPCLo(SA));
     break;
   default:
void PPC64TargetInfo::writePltEntry(uint8_t *Buf, uint64_t GotAddr,
   write32be(Buf + 8,  0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11)
   write32be(Buf + 12, 0xe96c0000);                   // ld %r11,0(%r12)
   write32be(Buf + 16, 0x7d6903a6);                   // mtctr %r11
   write32be(Buf + 20, 0xe84c0008);                   // ld %r2,8(%r12)
   write32be(Buf + 24, 0xe96c0010);                   // ld %r11,16(%r12)
   write32be(Buf + 28, 0x4e800420);                   // bctr
 }
 
-bool PPC64TargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S) const {
+bool PPC64TargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S,
+                                    const uint8_t *D, uint64_t Off) const {
   if (relocNeedsPlt(Type, S))
     return true;
 
   switch (Type) {
   default: return false;
   case R_PPC64_GOT16:
   case R_PPC64_GOT16_DS:
   case R_PPC64_GOT16_HA:
   case R_PPC64_GOT16_HI:
   case R_PPC64_GOT16_LO:
   case R_PPC64_GOT16_LO_DS:
     return true;
   }
 }
 
 bool PPC64TargetInfo::relocNeedsPlt(uint32_t Type, const SymbolBody &S) const {
   // These are function calls that need to be redirected through a PLT stub.
   return Type == R_PPC64_REL24 && canBePreempted(&S, false);
 }
 
-bool PPC64TargetInfo::isRelRelative(uint32_t Type) const {
+bool PPC64TargetInfo::isRelRelative(uint32_t Type, const SymbolBody *S,
+                                    const uint8_t *D, uint64_t Off) const {
   switch (Type) {
   default:
     return true;
   case R_PPC64_ADDR64:
   case R_PPC64_TOC:
     return false;
   }
 }
 
 void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                   uint64_t P, uint64_t SA, uint64_t ZA,
+                                  const SymbolBody *S,
                                   uint8_t *PairedLoc) const {
   uint64_t TB = getPPC64TocBase();
 
   // For a TOC-relative relocation, adjust the addend and proceed in terms of
   // the corresponding ADDR16 relocation type.
   switch (Type) {
   case R_PPC64_TOC16:       Type = R_PPC64_ADDR16;       SA -= TB; break;
   case R_PPC64_TOC16_DS:    Type = R_PPC64_ADDR16_DS;    SA -= TB; break;
bool AArch64TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const {
   case R_AARCH64_LDST64_ABS_LO12_NC:
   case R_AARCH64_LDST128_ABS_LO12_NC:
     if (auto *SS = dyn_cast<SharedSymbol<ELF64LE>>(&S))
       return SS->Sym.getType() == STT_OBJECT;
     return false;
   }
 }
 
-bool AArch64TargetInfo::relocNeedsGot(uint32_t Type,
-                                      const SymbolBody &S) const {
+bool AArch64TargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S,
+                                      const uint8_t *D, uint64_t Off) const {
   switch (Type) {
   case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
   case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
   case R_AARCH64_ADR_GOT_PAGE:
   case R_AARCH64_LD64_GOT_LO12_NC:
     return true;
   default:
     return relocNeedsPlt(Type, S);

 // as (Expr & ~0xFFF). (This applies even if the machine page size
 // supported by the platform has a different value.)
 static uint64_t getAArch64Page(uint64_t Expr) {
   return Expr & (~static_cast<uint64_t>(0xFFF));
 }
 
 void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
                                     uint32_t Type, uint64_t P, uint64_t SA,
-                                    uint64_t ZA, uint8_t *PairedLoc) const {
+                                    uint64_t ZA, const SymbolBody *S,
+                                    uint8_t *PairedLoc) const {
   switch (Type) {
   case R_AARCH64_ABS16:
     checkIntUInt<16>(SA, Type);
     write16le(Loc, SA);
     break;
   case R_AARCH64_ABS32:
     checkIntUInt<32>(SA, Type);
     write32le(Loc, SA);

 
 void AMDGPUTargetInfo::writePltEntry(uint8_t *Buf, uint64_t GotAddr,
                                      uint64_t GotEntryAddr,
                                      uint64_t PltEntryAddr, int32_t Index,
                                      unsigned RelOff) const {
   llvm_unreachable("not implemented");
 }
 
-bool AMDGPUTargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S) const {
+bool AMDGPUTargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S,
+                                     const uint8_t *D, uint64_t Off) const {
   return false;
 }
 
 bool AMDGPUTargetInfo::relocNeedsPlt(uint32_t Type, const SymbolBody &S) const {
   return false;
 }
 
 // Implementing relocations for AMDGPU is low priority since most
 // programs don't use relocations now. Thus, this function is not
 // actually called (relocateOne is called for each relocation).
 // That's why the AMDGPU port works without implementing this function.
 void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                    uint64_t P, uint64_t SA, uint64_t ZA,
+                                   const SymbolBody *S,
                                    uint8_t *PairedLoc) const {
   llvm_unreachable("not implemented");
 }
 
 template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() {
   PageSize = 65536;
   GotHeaderEntriesNum = 2;
   RelativeReloc = R_MIPS_REL32;
void MipsTargetInfo<ELFT>::writeGotHeaderEntries(uint8_t *Buf) const {
   auto *P = reinterpret_cast<Elf_Off *>(Buf);
   // Module pointer
   P[1] = ELFT::Is64Bits ? 0x8000000000000000 : 0x80000000;
 }
 
 template <class ELFT>
 void MipsTargetInfo<ELFT>::writeGotPltEntry(uint8_t *Buf, uint64_t Plt) const {}
 template <class ELFT>
-void MipsTargetInfo<ELFT>::writePltZeroEntry(uint8_t *Buf, uint64_t GotEntryAddr,
+void MipsTargetInfo<ELFT>::writePltZeroEntry(uint8_t *Buf,
+                                             uint64_t GotEntryAddr,
                                              uint64_t PltEntryAddr) const {}
 template <class ELFT>
 void MipsTargetInfo<ELFT>::writePltEntry(uint8_t *Buf, uint64_t GotAddr,
                                          uint64_t GotEntryAddr,
                                          uint64_t PltEntryAddr, int32_t Index,
                                          unsigned RelOff) const {}
 
 template <class ELFT>
-bool MipsTargetInfo<ELFT>::relocNeedsGot(uint32_t Type,
-                                         const SymbolBody &S) const {
+bool MipsTargetInfo<ELFT>::relocNeedsGot(uint32_t Type, const SymbolBody &S,
+                                         const uint8_t *D, uint64_t Off) const {
   return Type == R_MIPS_GOT16 || Type == R_MIPS_CALL16;
 }
 
 template <class ELFT>
 bool MipsTargetInfo<ELFT>::relocNeedsPlt(uint32_t Type,
                                          const SymbolBody &S) const {
   return false;
 }
static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t P,
   int64_t V = SA + A - P;
   checkInt<BSIZE + 2>(V, Type);
   write32<E>(Loc, (Instr & ~Mask) | ((V >> 2) & Mask));
 }
 
 template <class ELFT>
 void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
                                        uint32_t Type, uint64_t P, uint64_t SA,
-                                       uint64_t ZA, uint8_t *PairedLoc) const {
+                                       uint64_t ZA, const SymbolBody *S,
+                                       uint8_t *PairedLoc) const {
   const endianness E = ELFT::TargetEndianness;
   switch (Type) {
   case R_MIPS_32:
     add32<E>(Loc, SA);
     break;
   case R_MIPS_CALL16:
   case R_MIPS_GOT16: {
     int64_t V = SA - getMipsGpAddr<ELFT>();

 }
 
 template <class ELFT>
 bool MipsTargetInfo<ELFT>::isHintReloc(uint32_t Type) const {
   return Type == R_MIPS_JALR;
 }
 
 template <class ELFT>
-bool MipsTargetInfo<ELFT>::isRelRelative(uint32_t Type) const {
+bool MipsTargetInfo<ELFT>::isRelRelative(uint32_t Type, const SymbolBody *S,
+                                         const uint8_t *D, uint64_t Off) const {
   switch (Type) {
   default:
     return false;
   case R_MIPS_PC16:
   case R_MIPS_PC19_S2:
   case R_MIPS_PC21_S2:
   case R_MIPS_PC26_S2:
   case R_MIPS_PCHI16:

ELF/Writer.cpp

 //===- Writer.cpp ---------------------------------------------------------===//
 //
 //                             The LLVM Linker
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "Writer.h"
 #include "Config.h"
 #include "OutputSections.h"
if (Target->relocNeedsDynRelative(Type)) {
       RelType *Rel = new (Alloc) RelType;
       Rel->setSymbolAndType(0, Target->getRelativeReloc(), Config->Mips64EL);
       Rel->r_offset = RI.r_offset;
       Out<ELFT>::RelaDyn->addReloc({&C, Rel});
     }
 
     bool NeedsGot = false;
     bool NeedsPlt = false;
+    const uint8_t *D = C.getSectionData().data();
+    uint64_t Off = RI.r_offset;
     if (Body) {
       if (auto *E = dyn_cast<SharedSymbol<ELFT>>(Body)) {
         if (E->NeedsCopy)
           continue;
         if (Target->needsCopyRel(Type, *Body))
           E->NeedsCopy = true;
       }
       NeedsPlt = Target->relocNeedsPlt(Type, *Body);
       if (NeedsPlt) {
         if (Body->isInPlt())
           continue;
         Out<ELFT>::Plt->addEntry(Body);
       }
-      NeedsGot = Target->relocNeedsGot(Type, *Body);
+      NeedsGot = Target->relocNeedsGot(Type, *Body, D, Off);
       if (NeedsGot) {
         if (NeedsPlt && Target->supportsLazyRelocations()) {
           Out<ELFT>::GotPlt->addEntry(Body);
         } else {
           if (Body->isInGot())
             continue;
           Out<ELFT>::Got->addEntry(Body);
         }
if (Config->EMachine == EM_MIPS) {
         // dynamic relocation.
         continue;
     }
 
     // Here we are creating a relocation for the dynamic linker based on
     // a relocation from an object file, but some relocations need no
     // load-time fixup when the final target is known. Skip such relocation.
     bool CBP = canBePreempted(Body, NeedsGot);
-    bool NoDynrel = Target->isRelRelative(Type) || Target->isSizeReloc(Type) ||
-                    !Config->Shared;
+    bool NoDynrel = Target->isRelRelative(Type, Body, D, Off) ||
+                    Target->isSizeReloc(Type) || !Config->Shared;
     if (!CBP && NoDynrel)
       continue;
 
     if (CBP)
       Body->setUsedInDynamicReloc();
     if (NeedsPlt && Target->supportsLazyRelocations())
       Out<ELFT>::RelaPlt->addReloc({&C, &RI});
     else

test/ELF/Inputs/gotpc-relax-und-dso.s

+.globl dsofoo
+.type dsofoo, @function
+dsofoo:
+ nop

test/ELF/gotpc-relax-und-dso.s

+// RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %S/Inputs/gotpc-relax-und-dso.s -o %tdso.o
+// RUN: ld.lld -shared %tdso.o -o %t.so
+// RUN: ld.lld -shared %t.o %t.so -o %tout
+// RUN: llvm-readobj -r -s %tout | FileCheck --check-prefix=RELOC %s
+// RUN: llvm-objdump -d %tout | FileCheck --check-prefix=DISASM %s
+
+// RELOC:      Relocations [
+// RELOC-NEXT:   Section ({{.*}}) .rela.dyn {
+// RELOC-NEXT:     0x20A0 R_X86_64_GLOB_DAT und 0x0
+// RELOC-NEXT:     0x20A8 R_X86_64_GLOB_DAT dsofoo 0x0
+// RELOC-NEXT:     0x20B0 R_X86_64_GLOB_DAT foo 0x0
+// RELOC-NEXT:   }
+// RELOC-NEXT: ]
+
+// 0x101e + 7 - 36 = 0x1001
+// 0x1025 + 7 - 43 = 0x1001
+// DISASM:      Disassembly of section .text:
+// DISASM-NEXT: foo:
+// DISASM-NEXT:     1000: 90 nop
+// DISASM:      hid:
+// DISASM-NEXT:     1001: 90 nop
+// DISASM:      _start:
+// DISASM-NEXT:     1002: 48 8b 05 97 10 00 00 movq 4247(%rip), %rax
+// DISASM-NEXT:     1009: 48 8b 05 90 10 00 00 movq 4240(%rip), %rax
+// DISASM-NEXT:     1010: 48 8b 05 91 10 00 00 movq 4241(%rip), %rax
+// DISASM-NEXT:     1017: 48 8b 05 8a 10 00 00 movq 4234(%rip), %rax
+// DISASM-NEXT:     101e: 48 8d 05 dc ff ff ff leaq -36(%rip), %rax
+// DISASM-NEXT:     1025: 48 8d 05 d5 ff ff ff leaq -43(%rip), %rax
+// DISASM-NEXT:     102c: 48 8b 05 7d 10 00 00 movq 4221(%rip), %rax
+// DISASM-NEXT:     1033: 48 8b 05 76 10 00 00 movq 4214(%rip), %rax
+
+.text
+.globl foo
+.type foo, @function
+foo:
+ nop
+
+.globl hid
+.hidden hid
+.type hid, @function
+hid:
+ nop
+
+.globl _start
+.type _start, @function
+_start:
+ movq und@GOTPCREL(%rip), %rax
+ movq und@GOTPCREL(%rip), %rax
+ movq dsofoo@GOTPCREL(%rip), %rax
+ movq dsofoo@GOTPCREL(%rip), %rax
+ movq hid@GOTPCREL(%rip), %rax
+ movq hid@GOTPCREL(%rip), %rax
+ movq foo@GOTPCREL(%rip), %rax
+ movq foo@GOTPCREL(%rip), %rax

test/ELF/gotpc-relax.s

+// RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+// RUN: ld.lld %t.o -o %t1
+// RUN: llvm-readobj -r %t1 | FileCheck --check-prefix=RELOC %s
+// RUN: llvm-objdump -d %t1 | FileCheck --check-prefix=DISASM %s
+
+// There is no R_X86_64_GLOB_DAT relocations.
+// RELOC:      Relocations [
+// RELOC-NEXT:  Section ({{.*}}) .rela.plt {
+// RELOC-NOT:    R_X86_64_GLOB_DAT
+
+// 0x11003 + 7 - 10 = 0x11000
+// 0x1100a + 7 - 17 = 0x11000
+// 0x11011 + 7 - 23 = 0x11001
+// 0x11018 + 7 - 30 = 0x11001
+// DISASM:      Disassembly of section .text:
+// DISASM-NEXT: foo:
+// DISASM-NEXT:   11000: 90 nop
+// DISASM:      hid:
+// DISASM-NEXT:   11001: 90 nop
+// DISASM:      ifunc:
+// DISASM-NEXT:   11002: c3 retq
+// DISASM:      _start:
+// DISASM-NEXT: 11003: 48 8d 05 f6 ff ff ff leaq -10(%rip), %rax
+// DISASM-NEXT: 1100a: 48 8d 05 ef ff ff ff leaq -17(%rip), %rax
+// DISASM-NEXT: 11011: 48 8d 05 e9 ff ff ff leaq -23(%rip), %rax
+// DISASM-NEXT: 11018: 48 8d 05 e2 ff ff ff leaq -30(%rip), %rax
+// DISASM-NEXT: 1101f: 48 8b 05 1a 00 00 00 movq 26(%rip), %rax
+// DISASM-NEXT: 11026: 48 8b 05 13 00 00 00 movq 19(%rip), %rax
+
+.text
+.globl foo
+.type foo, @function
+foo:
+ nop
+
+.globl hid
+.hidden hid
+.type hid, @function
+hid:
+ nop
+
+.text
+.type ifunc STT_GNU_IFUNC
+.globl ifunc
+.type ifunc, @function
+ifunc:
+ ret
+
+.globl _start
+.type _start, @function
+_start:
+ movq foo@GOTPCREL(%rip), %rax
+ movq foo@GOTPCREL(%rip), %rax
+ movq hid@GOTPCREL(%rip), %rax
+ movq hid@GOTPCREL(%rip), %rax
+ movq ifunc@GOTPCREL(%rip), %rax
+ movq ifunc@GOTPCREL(%rip), %rax