[ValueTracking] Add support for `fshl`/`fshr` in `isKnownToBeAPowerOfTwo`

[goldstein.w.n]

Summary

If the funnel shifts are rotates (op0 == op1) then the number of 1s/0s
don't change so we can just look through op0/op1.

Proofs: https://alive2.llvm.org/ce/z/Pja5yu

[nikic]

LGTM

[goldstein.w.n]

Rebase

[goldstein.w.n]

Rebase

llvm/lib/Analysis/ValueTracking.cpp

if (auto *II = dyn_cast<IntrinsicInst>(I)) {
       case Intrinsic::smin:
         return isKnownToBeAPowerOfTwo(II->getArgOperand(1), OrZero, Depth, Q) &&
                isKnownToBeAPowerOfTwo(II->getArgOperand(0), OrZero, Depth, Q);
       // bswap/bitreverse just move around bits, but don't change any 1s/0s
       // thus dont change pow2/non-pow2 status.
       case Intrinsic::bitreverse:
       case Intrinsic::bswap:
         return isKnownToBeAPowerOfTwo(II->getArgOperand(0), OrZero, Depth, Q);
+      case Intrinsic::fshr:
+      case Intrinsic::fshl:
+        // If Op0 == Op1, this is a rotate. is_pow2(rotate(x, y)) == is_pow2(x)
+        if (II->getArgOperand(0) == II->getArgOperand(1))
+          return isKnownToBeAPowerOfTwo(II->getArgOperand(0), OrZero, Depth, Q);
+        break;
       default:
         break;
       }
     }
     return false;
   }
   default:
     return false;

llvm/test/Analysis/ValueTracking/known-power-of-two.ll

;
   ret i1 %r
 }
 
 define i16 @fshl_is_pow2_or_zero(i16 %x, i16 %y, i16 %z) {
 ; CHECK-LABEL: define i16 @fshl_is_pow2_or_zero
 ; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
 ; CHECK-NEXT:    [[XP2:%.*]] = shl i16 4, [[X]]
 ; CHECK-NEXT:    [[XX:%.*]] = call i16 @llvm.fshl.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
-; CHECK-NEXT:    [[R:%.*]] = urem i16 [[Y]], [[XX]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[XX]], -1
+; CHECK-NEXT:    [[R:%.*]] = and i16 [[TMP1]], [[Y]]
 ; CHECK-NEXT:    ret i16 [[R]]
 ;
   %xp2 = shl i16 4, %x
   %xx = call i16 @llvm.fshl.i16(i16 %xp2, i16 %xp2, i16 %z)
 
   %r = urem i16 %y, %xx
   ret i16 %r
 }

 }
 
 define i1 @fshl_is_pow2(i16 %x, i16 %y, i16 %z) {
 ; CHECK-LABEL: define i1 @fshl_is_pow2
 ; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
 ; CHECK-NEXT:    [[XP2:%.*]] = shl nuw i16 1, [[X]]
 ; CHECK-NEXT:    [[XX:%.*]] = call i16 @llvm.fshl.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
 ; CHECK-NEXT:    [[AND:%.*]] = and i16 [[XX]], [[Y]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i16 [[AND]], 0
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %xp2 = shl i16 1, %x
   %xx = call i16 @llvm.fshl.i16(i16 %xp2, i16 %xp2, i16 %z)
 
   %and = and i16 %y, %xx
   %r = icmp eq i16 %and, %xx
   ret i1 %r
;
   ret i1 %r
 }
 
 define i16 @fshr_is_pow2_or_zero(i16 %x, i16 %y, i16 %z) {
 ; CHECK-LABEL: define i16 @fshr_is_pow2_or_zero
 ; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
 ; CHECK-NEXT:    [[XP2:%.*]] = shl i16 4, [[X]]
 ; CHECK-NEXT:    [[XX:%.*]] = call i16 @llvm.fshr.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
-; CHECK-NEXT:    [[R:%.*]] = urem i16 [[Y]], [[XX]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[XX]], -1
+; CHECK-NEXT:    [[R:%.*]] = and i16 [[TMP1]], [[Y]]
 ; CHECK-NEXT:    ret i16 [[R]]
 ;
   %xp2 = shl i16 4, %x
   %xx = call i16 @llvm.fshr.i16(i16 %xp2, i16 %xp2, i16 %z)
 
   %r = urem i16 %y, %xx
   ret i16 %r
 }

 }
 
 define i1 @fshr_is_pow2(i16 %x, i16 %y, i16 %z) {
 ; CHECK-LABEL: define i1 @fshr_is_pow2
 ; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
 ; CHECK-NEXT:    [[XP2:%.*]] = shl nuw i16 1, [[X]]
 ; CHECK-NEXT:    [[XX:%.*]] = call i16 @llvm.fshr.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
 ; CHECK-NEXT:    [[AND:%.*]] = and i16 [[XX]], [[Y]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i16 [[AND]], 0
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %xp2 = shl i16 1, %x
   %xx = call i16 @llvm.fshr.i16(i16 %xp2, i16 %xp2, i16 %z)
 
   %and = and i16 %y, %xx
   %r = icmp eq i16 %and, %xx
   ret i1 %r