[NFC] Pre-commit test for dead bundle bug

[piotr]

Pre-committing the test for bug fix in D156999. The test is dependent on AMDGPU-specific D154083, which rematerializes instructions with wide registers.

llvm/test/CodeGen/AMDGPU/dead_bundle.mir

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn--amdpal -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs=0 -start-before=greedy,0 -stop-after=virtregrewriter,0 -stress-regalloc=5 %s -o - | FileCheck %s
+
+# This test currently fails with verify-machineinstrs=1 due to dead bundle mishandling: "Live range continues after dead def flag".
+---
+name: psmain
+tracksRegLiveness: true
+machineFunctionInfo:
+  stackPtrOffsetReg: '$sgpr32'
+  psInputAddr:     7
+  psInputEnable:   7
+body:             |
+  bb.0:
+    liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0, $vgpr1, $vgpr2
+
+    ; CHECK-LABEL: name: psmain
+    ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0, $vgpr1, $vgpr2
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: dead renamable $sgpr3 = IMPLICIT_DEF
+    ; CHECK-NEXT: renamable $sgpr1 = KILL undef $sgpr1
+    ; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11 = S_BUFFER_LOAD_DWORDX8_IMM undef renamable $sgpr0_sgpr1_sgpr2_sgpr3, 416, 0 :: (dereferenceable invariant load (s256), align 4)
+    ; CHECK-NEXT: dead [[V_CVT_U32_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_U32_F32_e64 0, $sgpr4, 0, 0, implicit $mode, implicit $exec
+    ; CHECK-NEXT: SI_SPILL_S256_SAVE renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s256) into %stack.0, align 4, addrspace 5)
+    ; CHECK-NEXT: dead renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19 = IMPLICIT_DEF
+    ; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11 = S_BUFFER_LOAD_DWORDX8_IMM undef renamable $sgpr0_sgpr1_sgpr2_sgpr3, 416, 0 :: (dereferenceable invariant load (s256), align 4)
+    ; CHECK-NEXT: renamable $sgpr3 = COPY killed renamable $sgpr7
+    ; CHECK-NEXT: renamable $sgpr5 = COPY renamable $sgpr9
+    ; CHECK-NEXT: dead undef %4.sub0:vreg_64 = COPY renamable $sgpr3
+    ; CHECK-NEXT: dead undef %7.sub1:vreg_64 = COPY killed renamable $sgpr5
+    ; CHECK-NEXT: dead [[IMAGE_SAMPLE_V1_V2_gfx11_:%[0-9]+]]:vgpr_32 = IMAGE_SAMPLE_V1_V2_gfx11 undef %4, undef renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19, renamable $sgpr0_sgpr1_sgpr2_sgpr3, 1, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)
+    ; CHECK-NEXT: S_ENDPGM 0
+    undef %8.sub3:sgpr_128 = IMPLICIT_DEF
+    undef %8.sub1:sgpr_128 = COPY undef $sgpr1
+    %346:sgpr_256 = S_BUFFER_LOAD_DWORDX8_IMM undef %8, 416, 0 :: (dereferenceable invariant load (s256), align 4)
+    %60:vgpr_32 = V_CVT_U32_F32_e64 0, %346.sub0, 0, 0, implicit $mode, implicit $exec
+    %127:sgpr_512 = IMPLICIT_DEF
+    undef %283.sub0:vreg_64 = COPY %346.sub3
+    undef %283.sub1:vreg_64 = COPY %346.sub5
+    %282:vgpr_32 = IMAGE_SAMPLE_V1_V2_gfx11 undef %283, undef %127.sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15, %8, 1, 1, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s32), addrspace 8)
+    S_ENDPGM 0
+...
+