[InstCombine] Remove unneeded isa<PHINode> check in foldOpIntoPhi

[0xdc03]

Summary

This check is redundant as it is covered by the call to
isPotentiallyReachable.

Depends on D155726.

[0xdc03]

• Add test case

[0xdc03]

• Rebase on updated test
• Fix broken test

[0xdc03]

Looks like the build timed out on windows...

[nikic]

The change LGTM, but this patch should not be based on D154064. We should land this first and D154064 later.

[0xdc03]

• Invert the patch stack

[0xdc03]

In D155718#4517570, @nikic wrote:

The change LGTM, but this patch should not be based on D154064. We should land this first and D154064 later.

Okay, I have done this and changed the patch order but the issue I have now is that no changes are visible in the tests introduced in D155726.

[nikic]

In D155718#4517738, @0xdc03 wrote:

In D155718#4517570, @nikic wrote:

The change LGTM, but this patch should not be based on D154064. We should land this first and D154064 later.

Okay, I have done this and changed the patch order but the issue I have now is that no changes are visible in the tests introduced in D155726.

The patch order should be D155726, then D155718, then D154064. If you order the patches that way you should see a test change on SwitchTest. It's expected that you don't see a change on BranchTest, which only makes sure that D154064 doesn't regress it.

[0xdc03]

• Change the patch order

[0xdc03]

• Rebase on main

llvm/lib/Transforms/InstCombine/InstructionCombining.cpp

for (unsigned i = 0; i != NumPHIValues; ++i) {
     Value *InVal = PN->getIncomingValue(i);
     BasicBlock *InBB = PN->getIncomingBlock(i);
 
     if (auto *NewVal = simplifyInstructionWithPHI(I, PN, InVal, InBB, DL, SQ)) {
       NewPhiValues.push_back(NewVal);
       continue;
     }
 
-    if (isa<PHINode>(InVal)) return nullptr;  // Itself a phi.
     if (NonSimplifiedBB) return nullptr;  // More than one non-simplified value.
 
     NonSimplifiedBB = InBB;
     NonSimplifiedInVal = InVal;
     NewPhiValues.push_back(nullptr);
 
     // If the InVal is an invoke at the end of the pred block, then we can't
     // insert a computation after it without breaking the edge.

llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll

 ; CHECK-NEXT:    br i1 [[CMP:%.*]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
 ; CHECK:       cond.true:
 ; CHECK-NEXT:    br i1 [[CMP1:%.*]], label [[COND_TRUE_TRUE:%.*]], label [[COND_TRUE_FALSE:%.*]]
 ; CHECK:       cond.true.true:
 ; CHECK-NEXT:    br label [[COND_TRUE_END:%.*]]
 ; CHECK:       cond.true.false:
 ; CHECK-NEXT:    br label [[COND_TRUE_END]]
 ; CHECK:       cond.true.end:
-; CHECK-NEXT:    [[PHI:%.*]] = phi i64 [ 2, [[COND_TRUE_TRUE]] ], [ 4, [[COND_TRUE_FALSE]] ]
+; CHECK-NEXT:    [[PHI:%.*]] = phi i64 [ 1, [[COND_TRUE_TRUE]] ], [ 3, [[COND_TRUE_FALSE]] ]
 ; CHECK-NEXT:    br label [[COND_END]]
 ; CHECK:       cond.end:
-; CHECK-NEXT:    [[PHI1:%.*]] = phi i64 [ 4096, [[ENTRY:%.*]] ], [ [[PHI]], [[COND_TRUE_END]] ]
-; CHECK-NEXT:    [[TMP0:%.*]] = add nsw i64 [[PHI1]], -1
-; CHECK-NEXT:    [[UREM:%.*]] = and i64 [[TMP0]], [[SIZE:%.*]]
+; CHECK-NEXT:    [[PHI1:%.*]] = phi i64 [ 4095, [[ENTRY:%.*]] ], [ [[PHI]], [[COND_TRUE_END]] ]
+; CHECK-NEXT:    [[UREM:%.*]] = and i64 [[PHI1]], [[SIZE:%.*]]
 ; CHECK-NEXT:    ret i64 [[UREM]]
 ;
 entry:
   br i1 %cmp, label %cond.true, label %cond.end
 
 cond.true:
   br i1 %cmp1, label %cond.true.true, label %cond.true.false
 

llvm/test/Transforms/InstCombine/icmp-fold-into-phi.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
 
 define i1 @SwitchTest(i32 %x, i32 %y) {
 ; CHECK-LABEL: define i1 @SwitchTest
 ; CHECK-SAME: (i32 [[X:%.*]], i32 [[Y:%.*]]) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    switch i32 [[X]], label [[BB1:%.*]] [
 ; CHECK-NEXT:    i32 0, label [[BB2:%.*]]
 ; CHECK-NEXT:    i32 1, label [[BB3:%.*]]
 ; CHECK-NEXT:    ]
 ; CHECK:       bb1:
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp ugt i32 [[Y]], 1
 ; CHECK-NEXT:    br label [[BB2]]
 ; CHECK:       bb2:
-; CHECK-NEXT:    [[PHI1:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[Y]], [[BB1]] ]
+; CHECK-NEXT:    [[PHI1:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TMP0]], [[BB1]] ]
 ; CHECK-NEXT:    br label [[BB3]]
 ; CHECK:       bb3:
-; CHECK-NEXT:    [[PHI2:%.*]] = phi i32 [ [[PHI1]], [[BB2]] ], [ 0, [[ENTRY]] ]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[PHI2]], 1
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    [[PHI2:%.*]] = phi i1 [ [[PHI1]], [[BB2]] ], [ false, [[ENTRY]] ]
+; CHECK-NEXT:    ret i1 [[PHI2]]
 ;
 entry:
   switch i32 %x, label %bb1 [
   i32 0, label %bb2
   i32 1, label %bb3
   ]
 
 bb1: