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Differential D154118

[BOLT][NFC] Simplify parseLBRSample
Needs ReviewPublic

Authored by Amir on Jun 29 2023, 10:41 AM.

Details

Reviewers
rafauler
maksfb
Group Reviewers
Restricted Project
Summary

Make dropping LBR entries a bit more explicit in SKL LBR workaround.

Diff Detail

Event Timeline

Amir created this revision.Jun 29 2023, 10:41 AM
Herald added a reviewer: rafauler. · View Herald TranscriptJun 29 2023, 10:41 AM
Herald added a reviewer: maksfb. · View Herald Transcript
Herald added a project: Restricted Project. · View Herald Transcript
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Amir requested review of this revision.Jun 29 2023, 10:41 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 29 2023, 10:41 AM
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Revision Contents

PathSize
bolt/
lib/
Profile/
19 lines

Diff 535894

bolt/lib/Profile/DataAggregator.cpp

Show First 20 Lines • Show All 1,362 Lines • ▼ Show 20 Lines
} }
uint64_t DataAggregator::parseLBRSample(const PerfBranchSample &Sample, uint64_t DataAggregator::parseLBRSample(const PerfBranchSample &Sample,
bool NeedsSkylakeFix) { bool NeedsSkylakeFix) {
uint64_t NumTraces{0}; uint64_t NumTraces{0};
// LBRs are stored in reverse execution order. NextPC refers to the next // LBRs are stored in reverse execution order. NextPC refers to the next
// recorded executed PC. // recorded executed PC.
uint64_t NextPC = opts::UseEventPC ? Sample.PC : 0; uint64_t NextPC = opts::UseEventPC ? Sample.PC : 0;
uint32_t NumEntry = 0;
for (const LBREntry &LBR : Sample.LBR) {
++NumEntry;
// Hardware bug workaround: Intel Skylake (which has 32 LBR entries) // Hardware bug workaround: Intel Skylake (which has 32 LBR entries)
// sometimes record entry 32 as an exact copy of entry 31. This will cause // sometimes record entry 32 as an exact copy of entry 31. This will cause
// us to likely record an invalid trace and generate a stale function for // us to likely record an invalid trace and generate a stale function for
// BAT mode (non BAT disassembles the function and is able to ignore this // BAT mode (non BAT disassembles the function and is able to ignore this
// trace at aggregation time). Drop first 2 entries (last two, in // trace at aggregation time). Drop first 2 entries (last two, in
// chronological order) // chronological order)
if (NeedsSkylakeFix && NumEntry <= 2) for (const LBREntry &LBR :
continue; llvm::drop_begin(Sample.LBR, NeedsSkylakeFix ? 2 : 0)) {
if (NextPC) { if (NextPC) {
// Record fall-through trace. // Record fall-through trace.
const uint64_t TraceFrom = LBR.To; const uint64_t TraceFrom = LBR.To;
const uint64_t TraceTo = NextPC; const uint64_t TraceTo = NextPC;
const BinaryFunction *TraceBF = const BinaryFunction *TraceBF =
getBinaryFunctionContainingAddress(TraceFrom); getBinaryFunctionContainingAddress(TraceFrom);
if (TraceBF && TraceBF->containsAddress(TraceTo)) { if (TraceBF && TraceBF->containsAddress(TraceTo)) {
FTInfo &Info = FallthroughLBRs[Trace(TraceFrom, TraceTo)]; FTInfo &Info = FallthroughLBRs[Trace(TraceFrom, TraceTo)];
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