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Differential D154089

[InstCombine] Add tests for (A > 0) | (A < 0) -> zext (A != 0) fold (NFC)
ClosedPublic

Authored by XChy on Jun 29 2023, 7:39 AM.

Details

Reviewers
spatel
nikic
k-arrows
RKSimon
goldstein.w.n
Commits
rGe8744ba32d56: [InstCombine] Add tests for (A > 0) | (A < 0) -> zext (A != 0) fold (NFC)
Summary

Tests for an upcoming (A > 0) | (A < 0) -> zext (A != 0) fold.
Related issue:
(a > b) | (a < b) is not simplified only for the case b=0

Diff Detail

Event Timeline

XChy created this revision.Jun 29 2023, 7:39 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 29 2023, 7:39 AM
Herald added a subscriber: StephenFan. · View Herald Transcript
XChy requested review of this revision.Jun 29 2023, 7:39 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 29 2023, 7:39 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
Harbormaster completed remote builds in B242091: Diff 535785.Jun 29 2023, 9:10 AM
XChy updated this revision to Diff 535879.Jun 29 2023, 10:29 AM

Return to the situation before optimization

XChy set the repository for this revision to rG LLVM Github Monorepo.Jun 29 2023, 11:11 AM
Harbormaster completed remote builds in B242150: Diff 535879.Jun 29 2023, 12:42 PM
XChy updated this revision to Diff 536474.Jun 30 2023, 4:22 PM
XChy added a reviewer: goldstein.w.n.
XChy added a child revision: D154126: [InstCombine] Transform (A > 0) | (A < 0) -> zext (A != 0) fold.Jun 30 2023, 4:26 PM
Harbormaster completed remote builds in B242590: Diff 536474.Jun 30 2023, 6:10 PM
XChy updated this revision to Diff 536508.Jun 30 2023, 9:19 PM
XChy set the repository for this revision to rG LLVM Github Monorepo.
Harbormaster completed remote builds in B242617: Diff 536508.Jun 30 2023, 9:51 PM
This revision was not accepted when it landed; it landed in state Needs Review.Jul 6 2023, 12:03 AM
Closed by commit rGe8744ba32d56: [InstCombine] Add tests for (A > 0) | (A < 0) -> zext (A != 0) fold (NFC) (authored by XChy, committed by goldstein.w.n). · Explain Why
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rGe8744ba32d56: [InstCombine] Add tests for (A > 0) | (A < 0) -> zext (A != 0) fold (NFC).

Revision Contents

PathSize
llvm/
test/
Transforms/
InstCombine/
120 lines

Diff 536508

llvm/test/Transforms/InstCombine/and-or-icmps.ll

Show First 20 Lines • Show All 2,562 Lines • ▼ Show 20 Lines
; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], <i8 -1, i8 -1> ; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], <i8 -1, i8 -1>
; CHECK-NEXT: ret <2 x i1> [[R]] ; CHECK-NEXT: ret <2 x i1> [[R]]
; ;
%rx = icmp ne <2 x i8> %x, <i8 -1, i8 -1> %rx = icmp ne <2 x i8> %x, <i8 -1, i8 -1>
%ry = icmp ne <2 x i8> %y, <i8 -1, i8 undef> %ry = icmp ne <2 x i8> %y, <i8 -1, i8 undef>
%r = or <2 x i1> %rx, %ry %r = or <2 x i1> %rx, %ry
ret <2 x i1> %r ret <2 x i1> %r
} }
define i32 @icmp_slt_0_or_icmp_sgt_0_i32(i32 %x) {
; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i32(
; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[X:%.*]], 0
; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 [[X]], 31
; CHECK-NEXT: [[D:%.*]] = zext i1 [[B]] to i32
; CHECK-NEXT: [[E:%.*]] = or i32 [[X_LOBIT]], [[D]]
; CHECK-NEXT: ret i32 [[E]]
;
%A = icmp slt i32 %x, 0
%B = icmp sgt i32 %x, 0
%C = zext i1 %A to i32
%D = zext i1 %B to i32
%E = or i32 %C, %D
ret i32 %E
}
define i64 @icmp_slt_0_or_icmp_sgt_0_i64(i64 %x) {
; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64(
; CHECK-NEXT: [[B:%.*]] = icmp sgt i64 [[X:%.*]], 0
; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i64 [[X]], 63
; CHECK-NEXT: [[D:%.*]] = zext i1 [[B]] to i64
; CHECK-NEXT: [[E:%.*]] = or i64 [[X_LOBIT]], [[D]]
; CHECK-NEXT: ret i64 [[E]]
;
%A = icmp slt i64 %x, 0
%B = icmp sgt i64 %x, 0
%C = zext i1 %A to i64
%D = zext i1 %B to i64
%E = or i64 %C, %D
ret i64 %E
}
define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail0(i64 %x) {
; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail0(
; CHECK-NEXT: [[E:%.*]] = lshr i64 [[X:%.*]], 63
; CHECK-NEXT: ret i64 [[E]]
;
%B = icmp slt i64 %x, 0
%C = lshr i64 %x, 63
%D = zext i1 %B to i64
%E = or i64 %C, %D
ret i64 %E
}
define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail1(i64 %x) {
; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail1(
; CHECK-NEXT: [[B:%.*]] = icmp sgt i64 [[X:%.*]], 0
; CHECK-NEXT: [[C:%.*]] = ashr i64 [[X]], 63
; CHECK-NEXT: [[D:%.*]] = zext i1 [[B]] to i64
; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[D]]
; CHECK-NEXT: ret i64 [[E]]
;
%B = icmp sgt i64 %x, 0
%C = ashr i64 %x, 63
%D = zext i1 %B to i64
%E = or i64 %C, %D
ret i64 %E
}
define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail2(i64 %x) {
; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail2(
; CHECK-NEXT: [[B:%.*]] = icmp sgt i64 [[X:%.*]], 0
; CHECK-NEXT: [[C:%.*]] = lshr i64 [[X]], 62
; CHECK-NEXT: [[D:%.*]] = zext i1 [[B]] to i64
; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[D]]
; CHECK-NEXT: ret i64 [[E]]
;
%B = icmp sgt i64 %x, 0
%C = lshr i64 %x, 62
%D = zext i1 %B to i64
%E = or i64 %C, %D
ret i64 %E
}
define i64 @icmp_slt_0_or_icmp_sgt_0_i64_fail3(i64 %x) {
; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_fail3(
; CHECK-NEXT: [[C:%.*]] = ashr i64 [[X:%.*]], 62
; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i64 [[X]], 63
; CHECK-NEXT: [[E:%.*]] = or i64 [[C]], [[X_LOBIT]]
; CHECK-NEXT: ret i64 [[E]]
;
%B = icmp slt i64 %x, 0
%C = ashr i64 %x, 62
%D = zext i1 %B to i64
%E = or i64 %C, %D
ret i64 %E
}
define <2 x i64> @icmp_slt_0_or_icmp_sgt_0_i64x2(<2 x i64> %x) {
; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64x2(
; CHECK-NEXT: [[B:%.*]] = icmp sgt <2 x i64> [[X:%.*]], zeroinitializer
; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr <2 x i64> [[X]], <i64 63, i64 63>
; CHECK-NEXT: [[D:%.*]] = zext <2 x i1> [[B]] to <2 x i64>
; CHECK-NEXT: [[E:%.*]] = or <2 x i64> [[X_LOBIT]], [[D]]
; CHECK-NEXT: ret <2 x i64> [[E]]
;
%A = icmp slt <2 x i64> %x, <i64 0,i64 0>
%B = icmp sgt <2 x i64> %x, <i64 0,i64 0>
%C = zext <2 x i1> %A to <2 x i64>
%D = zext <2 x i1> %B to <2 x i64>
%E = or <2 x i64> %C, %D
ret <2 x i64> %E
}
define <2 x i64> @icmp_slt_0_or_icmp_sgt_0_i64x2_fail(<2 x i64> %x) {
; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64x2_fail(
; CHECK-NEXT: [[B:%.*]] = icmp sgt <2 x i64> [[X:%.*]], <i64 1, i64 1>
; CHECK-NEXT: [[C:%.*]] = lshr <2 x i64> [[X]], <i64 63, i64 63>
; CHECK-NEXT: [[D:%.*]] = zext <2 x i1> [[B]] to <2 x i64>
; CHECK-NEXT: [[E:%.*]] = or <2 x i64> [[C]], [[D]]
; CHECK-NEXT: ret <2 x i64> [[E]]
;
%B = icmp sgt <2 x i64> %x, <i64 1, i64 1>
%C = lshr <2 x i64> %x, <i64 63, i64 63>
%D = zext <2 x i1> %B to <2 x i64>
%E = or <2 x i64> %C, %D
ret <2 x i64> %E
}