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	Show First 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
	## 'linalg' Dialect Passes			## 'linalg' Dialect Passes

	[include "LinalgPasses.md"]			[include "LinalgPasses.md"]

	## 'llvm' Dialect Passes			## 'llvm' Dialect Passes

	[include "LLVMPasses.md"]			[include "LLVMPasses.md"]

				## 'math' Dialect Passes

				[include "MathPasses.md"]

	## 'memref' Dialect Passes			## 'memref' Dialect Passes

	[include "MemRefPasses.md"]			[include "MemRefPasses.md"]

	## 'nvgpu' Dialect Passes			## 'nvgpu' Dialect Passes

	[include "NVGPUPasses.md"]			[include "NVGPUPasses.md"]

	## 'quant' Dialect Passes

	[include "QuantPasses.md"]

	## Reducer Passes			## Reducer Passes

	[include "ReducerPasses.md"]			[include "ReducerPasses.md"]

	## 'scf' Dialect Passes			## 'scf' Dialect Passes

	[include "SCFPasses.md"]			[include "SCFPasses.md"]

	Show All 27 Lines

mlir/docs/Tutorials/transform/Ch2.md

Show First 20 Lines • Show All 329 Lines • ▼ Show 20 Lines	^bb0(%arg0: !transform.any_op,
transform.my.change_call_target %call, "microkernel" : !transform.any_op		transform.my.change_call_target %call, "microkernel" : !transform.any_op

transform.yield		transform.yield
}		}
```		```

## Appendix: Autogenerated Documentation		## Appendix: Autogenerated Documentation

[include "MyExtensionCh2.md"]		[include "Tutorials/transform/MyExtensionCh2.md"]

Show First 20 Lines • Show All 281 Lines • ▼ Show 20 Lines	::mlir::DiagnosedSilenceableFailure applyToOne(
::mlir::transform::ApplyToEachResultList &results,		::mlir::transform::ApplyToEachResultList &results,
::mlir::transform::TransformState &state);		::mlir::transform::TransformState &state);
}];		}];
}		}
```		```

## Appendix: Autogenerated Documentation		## Appendix: Autogenerated Documentation

[include "MyExtensionCh3.md"]		[include "Tutorials/transform/MyExtensionCh3.md"]