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Differential D152676

[InstCombine] Add tests for ispow2 comparisons with a known bit; NFC
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Authored by goldstein.w.n on Jun 11 2023, 11:30 PM.

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nikic
spatel
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rG5ca14d433e0a: [InstCombine] Add tests for ispow2 comparisons with a known bit; NFC

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goldstein.w.n created this revision.Jun 11 2023, 11:30 PM
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goldstein.w.n requested review of this revision.Jun 11 2023, 11:30 PM
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Harbormaster completed remote builds in B238108: Diff 530399.Jun 11 2023, 11:31 PM
goldstein.w.n added a parent revision: D152673: [InstCombine] Canonicalize `(X^(X-1)) u{ge,lt} X` as pow2 test.Jun 11 2023, 11:31 PM
goldstein.w.n added a child revision: D152677: [InstCombine] If there is a known-bit transform is_pow2 check to just check for any other bits.
goldstein.w.n updated this revision to Diff 530579.Jun 12 2023, 10:24 AM

Rebase

Harbormaster completed remote builds in B238242: Diff 530579.Jun 12 2023, 12:47 PM
goldstein.w.n updated this revision to Diff 530735.Jun 12 2023, 5:52 PM

Rebase

Harbormaster completed remote builds in B238361: Diff 530735.Jun 12 2023, 7:39 PM
goldstein.w.n updated this revision to Diff 535078.Jun 27 2023, 11:32 AM

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Harbormaster completed remote builds in B241558: Diff 535078.Jun 27 2023, 2:00 PM
goldstein.w.n updated this revision to Diff 541144.Jul 17 2023, 11:01 AM

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goldstein.w.n updated this revision to Diff 541212.Jul 17 2023, 1:29 PM

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Harbormaster completed remote builds in B245987: Diff 541212.Jul 17 2023, 7:10 PM
nikic accepted this revision.Jul 18 2023, 8:08 AM

LG

This revision is now accepted and ready to land.Jul 18 2023, 8:08 AM
goldstein.w.n updated this revision to Diff 541584.Jul 18 2023, 8:53 AM

Rebase

Harbormaster completed remote builds in B246263: Diff 541584.Jul 18 2023, 3:45 PM
This revision was landed with ongoing or failed builds.Jul 21 2023, 12:15 PM
Closed by commit rG5ca14d433e0a: [InstCombine] Add tests for ispow2 comparisons with a known bit; NFC (authored by goldstein.w.n). · Explain Why
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rG5ca14d433e0a: [InstCombine] Add tests for ispow2 comparisons with a known bit; NFC.

Revision Contents

PathSize
llvm/
test/
Transforms/
InstCombine/
95 lines

Diff 543023

llvm/test/Transforms/InstCombine/ispow2.ll

Show First 20 Lines • Show All 1,219 Lines • ▼ Show 20 Lines
; ;
%xm1 = add i32 %x, -1 %xm1 = add i32 %x, -1
%y = xor i32 %x, %xm1 %y = xor i32 %x, %xm1
call void @use.i32(i32 %y) call void @use.i32(i32 %y)
%r = icmp ult i32 %y, %x %r = icmp ult i32 %y, %x
ret i1 %r ret i1 %r
} }
define i1 @blsmsk_isnt_p2_or_z_fail_wrong_add(i32 %x, i32 %z) { define i1 @blsmsk_isnt_p2_or_z_fail_wrong_add(i32 %x, i32 %z) {
; CHECK-LABEL: @blsmsk_isnt_p2_or_z_fail_wrong_add( ; CHECK-LABEL: @blsmsk_isnt_p2_or_z_fail_wrong_add(
; CHECK-NEXT: [[XM1:%.*]] = add i32 [[Z:%.*]], -1 ; CHECK-NEXT: [[XM1:%.*]] = add i32 [[Z:%.*]], -1
; CHECK-NEXT: [[Y:%.*]] = xor i32 [[XM1]], [[X:%.*]] ; CHECK-NEXT: [[Y:%.*]] = xor i32 [[XM1]], [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[Y]], [[X]] ; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[Y]], [[X]]
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%xm1 = add i32 %z, -1 %xm1 = add i32 %z, -1
Show All 24 Lines
; CHECK-NEXT: [[R:%.*]] = icmp uge i32 [[Y]], [[Z:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp uge i32 [[Y]], [[Z:%.*]]
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%xm1 = add i32 %x, -1 %xm1 = add i32 %x, -1
%y = xor i32 %x, %xm1 %y = xor i32 %x, %xm1
%r = icmp uge i32 %y, %z %r = icmp uge i32 %y, %z
ret i1 %r ret i1 %r
} }
declare <2 x i32> @llvm.ctpop.2xi32(<2 x i32>)
define i1 @is_pow2_nz_known_bits(i32 %xin) {
; CHECK-LABEL: @is_pow2_nz_known_bits(
; CHECK-NEXT: [[X:%.*]] = or i32 [[XIN:%.*]], 64
; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG3:![0-9]+]]
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[CNT]], 1
; CHECK-NEXT: ret i1 [[R]]
;
%x = or i32 %xin, 64
%cnt = call i32 @llvm.ctpop.i32(i32 %x)
%r = icmp eq i32 %cnt, 1
ret i1 %r
}
define i1 @is_pow2_nz_known_bits_fail_multiuse(i32 %xin) {
; CHECK-LABEL: @is_pow2_nz_known_bits_fail_multiuse(
; CHECK-NEXT: [[X:%.*]] = or i32 [[XIN:%.*]], 64
; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG3]]
; CHECK-NEXT: call void @use.i32(i32 [[CNT]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[CNT]], 1
; CHECK-NEXT: ret i1 [[R]]
;
%x = or i32 %xin, 64
%cnt = call i32 @llvm.ctpop.i32(i32 %x)
call void @use.i32(i32 %cnt)
%r = icmp eq i32 %cnt, 1
ret i1 %r
}
define i1 @not_pow2_nz_known_bits(i32 %xin) {
; CHECK-LABEL: @not_pow2_nz_known_bits(
; CHECK-NEXT: [[X:%.*]] = or i32 [[XIN:%.*]], 1
; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG3]]
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[CNT]], 1
; CHECK-NEXT: ret i1 [[R]]
;
%x = or i32 %xin, 1
%cnt = call i32 @llvm.ctpop.i32(i32 %x)
%r = icmp ne i32 %cnt, 1
ret i1 %r
}
define i1 @not_pow2_nz_known_bits_fail_not_p2_test(i32 %xin) {
; CHECK-LABEL: @not_pow2_nz_known_bits_fail_not_p2_test(
; CHECK-NEXT: [[X:%.*]] = or i32 [[XIN:%.*]], 1
; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG3]]
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[CNT]], 2
; CHECK-NEXT: ret i1 [[R]]
;
%x = or i32 %xin, 1
%cnt = call i32 @llvm.ctpop.i32(i32 %x)
%r = icmp ne i32 %cnt, 2
ret i1 %r
}
define i1 @is_pow2_or_z_known_bits(i32 %xin) {
; CHECK-LABEL: @is_pow2_or_z_known_bits(
; CHECK-NEXT: [[X:%.*]] = or i32 [[XIN:%.*]], -2147483648
; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG3]]
; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[CNT]], 2
; CHECK-NEXT: ret i1 [[R]]
;
%x = or i32 %xin, 2147483648
%cnt = call i32 @llvm.ctpop.i32(i32 %x)
%r = icmp ult i32 %cnt, 2
ret i1 %r
}
define <2 x i1> @not_pow2_or_z_known_bits(<2 x i32> %xin) {
; CHECK-LABEL: @not_pow2_or_z_known_bits(
; CHECK-NEXT: [[X:%.*]] = or <2 x i32> [[XIN:%.*]], <i32 64, i32 64>
; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X]]), !range [[RNG3]]
; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i32> [[CNT]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%x = or <2 x i32> %xin, <i32 64, i32 64>
%cnt = call <2 x i32> @llvm.ctpop.2xi32(<2 x i32> %x)
%r = icmp ugt <2 x i32> %cnt, <i32 1, i32 1>
ret <2 x i1> %r
}
define <2 x i1> @not_pow2_or_z_known_bits_fail_wrong_cmp(<2 x i32> %xin) {
; CHECK-LABEL: @not_pow2_or_z_known_bits_fail_wrong_cmp(
; CHECK-NEXT: [[X:%.*]] = or <2 x i32> [[XIN:%.*]], <i32 64, i32 64>
; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X]]), !range [[RNG3]]
; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i32> [[CNT]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%x = or <2 x i32> %xin, <i32 64, i32 64>
%cnt = call <2 x i32> @llvm.ctpop.2xi32(<2 x i32> %x)
%r = icmp ugt <2 x i32> %cnt, <i32 2, i32 2>
ret <2 x i1> %r
}