[IRTranslator] Implement translation of entry_value dbg.value intrinsics

[fdeazeve]

Summary

For dbg.value intrinsics targeting an llvm::Argument address whose expression
starts with an entry value, we lower this to a DEBUG_VALUE targeting the livein
physical register corresponding to that Argument.

Depends on D151328

[fdeazeve]

Rebased

llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h

 class AssumptionCache;
 class BasicBlock;
 class CallInst;
 class CallLowering;
 class Constant;
 class ConstrainedFPIntrinsic;
 class DataLayout;
 class DbgDeclareInst;
+class DbgValueInst;
 class Instruction;
 class MachineBasicBlock;
 class MachineFunction;
 class MachineInstr;
 class MachineRegisterInfo;
 class OptimizationRemarkEmitter;
 class PHINode;
 class TargetLibraryInfo;
private:
   /// Returns the single livein physical register Arg was lowered to, if
   /// possible.
   std::optional<MCRegister> getArgPhysReg(Argument &Arg);
 
   /// If DebugInst targets an Argument and its expression is an EntryValue,
   /// lower it as an entry in the MF debug table.
   bool translateIfEntryValueArgument(const DbgDeclareInst &DebugInst);
 
+  /// If DebugInst targets an Argument and its expression is an EntryValue,
+  /// lower as a DBG_VALUE targeting the corresponding livein register for that
+  /// Argument.
+  bool translateIfEntryValueArgument(const DbgValueInst &DebugInst,
+                                     MachineIRBuilder &MIRBuilder);
+
   bool translateInlineAsm(const CallBase &CB, MachineIRBuilder &MIRBuilder);
 
   /// Common code for translating normal calls or invokes.
   bool translateCallBase(const CallBase &CB, MachineIRBuilder &MIRBuilder);
 
   /// Translate call instruction.
   /// \pre \p U is a call instruction.
   bool translateCall(const User &U, MachineIRBuilder &MIRBuilder);

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

std::optional<MCRegister> IRTranslator::getArgPhysReg(Argument &Arg) {
 
   // Arguments are lowered as a copy of a livein physical register.
   auto *VRegDef = MF->getRegInfo().getVRegDef(VRegs[0]);
   if (!VRegDef || !VRegDef->isCopy())
     return std::nullopt;
   return VRegDef->getOperand(1).getReg().asMCReg();
 }
 
+bool IRTranslator::translateIfEntryValueArgument(const DbgValueInst &DebugInst,
+                                                 MachineIRBuilder &MIRBuilder) {
+  auto *Arg = dyn_cast<Argument>(DebugInst.getValue());
+  if (!Arg)
+    return false;
+
+  const DIExpression *Expr = DebugInst.getExpression();
+  if (!Expr->isEntryValue())
+    return false;
+
+  std::optional<MCRegister> PhysReg = getArgPhysReg(*Arg);
+  if (!PhysReg) {
+    LLVM_DEBUG(dbgs() << "Dropping dbg.value: expression is entry_value but "
+                         "couldn't find a physical register\n"
+                      << DebugInst << "\n");
+    return true;
+  }
+
+  MIRBuilder.buildDirectDbgValue(*PhysReg, DebugInst.getVariable(),
+                                 DebugInst.getExpression());
+  return true;
+}
+
 bool IRTranslator::translateIfEntryValueArgument(
     const DbgDeclareInst &DebugInst) {
   auto *Arg = dyn_cast<Argument>(DebugInst.getAddress());
   if (!Arg)
     return false;
 
   const DIExpression *Expr = DebugInst.getExpression();
   if (!Expr->isEntryValue())
if (auto *AI = dyn_cast<AllocaInst>(V);
       // may be clobbered.
       auto ExprOperands = DI.getExpression()->getElements();
       auto *ExprDerefRemoved =
           DIExpression::get(AI->getContext(), ExprOperands.drop_front());
       MIRBuilder.buildFIDbgValue(getOrCreateFrameIndex(*AI), DI.getVariable(),
                                  ExprDerefRemoved);
       return true;
     }
+    if (translateIfEntryValueArgument(DI, MIRBuilder))
+      return true;
     for (Register Reg : getOrCreateVRegs(*V)) {
       // FIXME: This does not handle register-indirect values at offset 0. The
       // direct/indirect thing shouldn't really be handled by something as
       // implicit as reg+noreg vs reg+imm in the first place, but it seems
       // pretty baked in right now.
       MIRBuilder.buildDirectDbgValue(Reg, DI.getVariable(), DI.getExpression());
     }
     return true;

llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll

+; RUN: llc -O0 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s
+
+; CHECK-NOT:  DBG_VALUE
+; CHECK:      DBG_VALUE $x22, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+; CHECK-NEXT: DBG_VALUE $x22, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+; CHECK-NOT:  DBG_VALUE
+
+target triple="aarch64--"
+
+define void @foo(ptr %unused_arg, ptr swiftasync %async_arg) !dbg !6 {
+  call void @llvm.dbg.value(metadata ptr %async_arg, metadata !12, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !14
+  call void @llvm.dbg.value(metadata ptr %async_arg, metadata !12, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !14
+  call void @consume(ptr %async_arg)
+  ret void, !dbg !15
+}
+
+declare void @llvm.dbg.value(metadata, metadata, metadata)
+declare void @consume(ptr %ptr)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug)
+!1 = !DIFile(filename: "x.c", directory: "/")
+!3 = !{i32 2, !"Dwarf Version", i32 4}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!6 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 1, type: !7, isLocal: false, isDefinition: true, scopeLine: 1, unit: !0)
+!7 = !DISubroutineType(types: !8)
+!8 = !{null, !9, !9, !9}
+!9 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !10, size: 64)
+!10 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !11)
+!11 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
+!12 = !DILocalVariable(name: "a", scope: !6, file: !1, line: 1, type: !9)
+!14 = !DILocation(line: 1, column: 29, scope: !6)
+!15 = !DILocation(line: 1, column: 37, scope: !6)