[lld-macho] Remove partially supported 32-bit ARM arch

[thevinster]

Summary

We never really supported 32-bit ARM arch entirely, and partial support was added for
very specific features. Regardless, it fails to even link the most basic applications that at
this point, it might be better to move this arch as unsupported. Given that Apple will be
moving towards arm64 long term, I don't see any reason for anyone to invest time in
supporting this either, and for those who still need it should use apple's ld64 linker.

Fixes #62691

[int3]

Thanks :D

[int3]

lld/test/MachO/weak-def-thumb-conflict.s

8

hmm, should we delete the logic around N_ARM_THUMB_DEF in InputFiles.cpp as well? maybe just add an assert that checks that the flag isn't set on any n_desc

[thevinster]

Remove thumb field. Assert N_ARM_THUMB_DEF flag not set.

[int3]

lld/MachO/ConcatOutputSection.cpp

344–345 ↗

(On Diff #522340)

could you run clang-format before landing? I think this can be reflowed

[barannikov88]

lld/MachO/ConcatOutputSection.cpp

344–345 ↗

(On Diff #522340)

FWIW From my experience, clang-format does not join lines with argument comments.
A workaround is to join them manually (possibly exceeding column limit), then reformat.

lld/MachO/Arch/ARM.cpp

-//===- ARM.cpp ------------------------------------------------------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "InputFiles.h"
-#include "Symbols.h"
-#include "SyntheticSections.h"
-#include "Target.h"
-
-#include "lld/Common/ErrorHandler.h"
-#include "llvm/ADT/Bitfields.h"
-#include "llvm/BinaryFormat/MachO.h"
-#include "llvm/Support/Endian.h"
-
-using namespace llvm;
-using namespace llvm::MachO;
-using namespace llvm::support::endian;
-using namespace lld;
-using namespace lld::macho;
-
-namespace {
-
-struct ARM : TargetInfo {
-  ARM(uint32_t cpuSubtype);
-
-  int64_t getEmbeddedAddend(MemoryBufferRef, uint64_t offset,
-                            const relocation_info) const override;
-  void relocateOne(uint8_t *loc, const Reloc &, uint64_t va,
-                   uint64_t pc) const override;
-
-  void writeStub(uint8_t *buf, const Symbol &, uint64_t) const override;
-  void writeStubHelperHeader(uint8_t *buf) const override;
-  void writeStubHelperEntry(uint8_t *buf, const Symbol &,
-                            uint64_t entryAddr) const override;
-
-  void writeObjCMsgSendStub(uint8_t *buf, Symbol *sym, uint64_t stubsAddr,
-                            uint64_t stubOffset, uint64_t selrefsVA,
-                            uint64_t selectorIndex, uint64_t gotAddr,
-                            uint64_t msgSendIndex) const override;
-
-  void relaxGotLoad(uint8_t *loc, uint8_t type) const override;
-  uint64_t getPageSize() const override { return 4 * 1024; }
-
-  void handleDtraceReloc(const Symbol *sym, const Reloc &r,
-                         uint8_t *loc) const override;
-};
-} // namespace
-
-static constexpr std::array<RelocAttrs, 10> relocAttrsArray{{
-#define B(x) RelocAttrBits::x
-    {"VANILLA", /* FIXME populate this */ B(_0)},
-    {"PAIR", /* FIXME populate this */ B(_0)},
-    {"SECTDIFF", /* FIXME populate this */ B(_0)},
-    {"LOCAL_SECTDIFF", /* FIXME populate this */ B(_0)},
-    {"PB_LA_PTR", /* FIXME populate this */ B(_0)},
-    {"BR24", B(PCREL) | B(LOCAL) | B(EXTERN) | B(BRANCH) | B(BYTE4)},
-    {"BR22", B(PCREL) | B(LOCAL) | B(EXTERN) | B(BRANCH) | B(BYTE4)},
-    {"32BIT_BRANCH", /* FIXME populate this */ B(_0)},
-    {"HALF", /* FIXME populate this */ B(_0)},
-    {"HALF_SECTDIFF", /* FIXME populate this */ B(_0)},
-#undef B
-}};
-
-int64_t ARM::getEmbeddedAddend(MemoryBufferRef mb, uint64_t offset,
-                               relocation_info rel) const {
-  // FIXME: implement this
-  return 0;
-}
-
-template <int N> using BitfieldFlag = Bitfield::Element<bool, N, 1>;
-
-// ARM BL encoding:
-//
-// 30       28        24                                              0
-// +---------+---------+----------------------------------------------+
-// |  cond   | 1 0 1 1 |                  imm24                       |
-// +---------+---------+----------------------------------------------+
-//
-// `cond` here varies depending on whether we have bleq, blne, etc.
-// `imm24` encodes a 26-bit pcrel offset -- last 2 bits are zero as ARM
-// functions are 4-byte-aligned.
-//
-// ARM BLX encoding:
-//
-// 30       28        24                                              0
-// +---------+---------+----------------------------------------------+
-// | 1 1 1 1 | 1 0 1 H |                  imm24                       |
-// +---------+---------+----------------------------------------------+
-//
-// Since Thumb functions are 2-byte-aligned, we need one extra bit to encode
-// the offset -- that is the H bit.
-//
-// BLX is always unconditional, so while we can convert directly from BLX to BL,
-// we need to insert a shim if a BL's target is a Thumb function.
-//
-// Helper aliases for decoding BL / BLX:
-using Cond = Bitfield::Element<uint32_t, 28, 4>;
-using Imm24 = Bitfield::Element<int32_t, 0, 24>;
-
-void ARM::relocateOne(uint8_t *loc, const Reloc &r, uint64_t value,
-                      uint64_t pc) const {
-  switch (r.type) {
-  case ARM_RELOC_BR24: {
-    uint32_t base = read32le(loc);
-    bool isBlx = Bitfield::get<Cond>(base) == 0xf;
-    const Symbol *sym = r.referent.get<Symbol *>();
-    int32_t offset = value - (pc + 8);
-
-    if (auto *defined = dyn_cast<Defined>(sym)) {
-      if (!isBlx && defined->thumb) {
-        error("TODO: implement interworking shim");
-        return;
-      } else if (isBlx && !defined->thumb) {
-        Bitfield::set<Cond>(base, 0xe); // unconditional BL
-        Bitfield::set<BitfieldFlag<24>>(base, true);
-        isBlx = false;
-      }
-    } else {
-      error("TODO: Implement ARM_RELOC_BR24 for dylib symbols");
-      return;
-    }
-
-    if (isBlx) {
-      assert((0x1 & value) == 0);
-      Bitfield::set<Imm24>(base, offset >> 2);
-      Bitfield::set<BitfieldFlag<24>>(base, (offset >> 1) & 1); // H bit
-    } else {
-      assert((0x3 & value) == 0);
-      Bitfield::set<Imm24>(base, offset >> 2);
-    }
-    write32le(loc, base);
-    break;
-  }
-  default:
-    fatal("unhandled relocation type");
-  }
-}
-
-void ARM::writeStub(uint8_t *buf, const Symbol &sym, uint64_t) const {
-  fatal("TODO: implement this");
-}
-
-void ARM::writeStubHelperHeader(uint8_t *buf) const {
-  fatal("TODO: implement this");
-}
-
-void ARM::writeStubHelperEntry(uint8_t *buf, const Symbol &sym,
-                               uint64_t entryAddr) const {
-  fatal("TODO: implement this");
-}
-
-void ARM::writeObjCMsgSendStub(uint8_t *buf, Symbol *sym, uint64_t stubsAddr,
-                               uint64_t stubOffset, uint64_t selrefsVA,
-                               uint64_t selectorIndex, uint64_t gotAddr,
-                               uint64_t msgSendIndex) const {
-  fatal("TODO: implement this");
-}
-
-void ARM::relaxGotLoad(uint8_t *loc, uint8_t type) const {
-  fatal("TODO: implement this");
-}
-
-ARM::ARM(uint32_t cpuSubtype) : TargetInfo(ILP32()) {
-  cpuType = CPU_TYPE_ARM;
-  this->cpuSubtype = cpuSubtype;
-
-  stubSize = 0 /* FIXME */;
-  stubHelperHeaderSize = 0 /* FIXME */;
-  stubHelperEntrySize = 0 /* FIXME */;
-
-  relocAttrs = {relocAttrsArray.data(), relocAttrsArray.size()};
-}
-
-TargetInfo *macho::createARMTargetInfo(uint32_t cpuSubtype) {
-  static ARM t(cpuSubtype);
-  return &t;
-}
-
-void ARM::handleDtraceReloc(const Symbol *sym, const Reloc &r,
-                            uint8_t *loc) const {
-  if (config->outputType == MH_OBJECT)
-    return;
-
-  switch (r.type) {
-  case ARM_RELOC_BR24:
-    if (sym->getName().startswith("___dtrace_probe")) {
-      // change call site to a NOP
-      write32le(loc, 0xE1A00000);
-    } else if (sym->getName().startswith("___dtrace_isenabled")) {
-      // change call site to 'eor r0, r0, r0'
-      write32le(loc, 0xE0200000);
-    } else {
-      error("Unrecognized dtrace symbol prefix: " + toString(*sym));
-    }
-    break;
-  case ARM_THUMB_RELOC_BR22:
-    if (sym->getName().startswith("___dtrace_probe")) {
-      // change 32-bit blx call site to two thumb NOPs
-      write32le(loc, 0x46C046C0);
-    } else if (sym->getName().startswith("___dtrace_isenabled")) {
-      // change 32-bit blx call site to 'nop', 'eor r0, r0'
-      write32le(loc, 0x46C04040);
-    } else {
-      error("Unrecognized dtrace symbol prefix: " + toString(*sym));
-    }
-    break;
-  default:
-    llvm_unreachable("Unsupported dtrace relocation type for ARM");
-  }
-}

lld/MachO/CMakeLists.txt

 set(LLVM_TARGET_DEFINITIONS Options.td)
 tablegen(LLVM Options.inc -gen-opt-parser-defs)
 add_public_tablegen_target(MachOOptionsTableGen)
 
 include_directories(${LLVM_MAIN_SRC_DIR}/../libunwind/include)
 
 add_lld_library(lldMachO
-  Arch/ARM.cpp
   Arch/ARM64.cpp
   Arch/ARM64Common.cpp
   Arch/ARM64_32.cpp
   Arch/X86_64.cpp
   ConcatOutputSection.cpp
   Driver.cpp
   DriverUtils.cpp
   Dwarf.cpp

lld/MachO/Driver.cpp

static TargetInfo *createTargetInfo(InputArgList &args) {
   auto [cpuType, cpuSubtype] = getCPUTypeFromArchitecture(config->arch());
   switch (cpuType) {
   case CPU_TYPE_X86_64:
     return createX86_64TargetInfo();
   case CPU_TYPE_ARM64:
     return createARM64TargetInfo();
   case CPU_TYPE_ARM64_32:
     return createARM64_32TargetInfo();
-  case CPU_TYPE_ARM:
-    return createARMTargetInfo(cpuSubtype);
   default:
     error("missing or unsupported -arch " + archName);
     return nullptr;
   }
 }
 
 static UndefinedSymbolTreatment
 getUndefinedSymbolTreatment(const ArgList &args) {

lld/MachO/Target.h

public:
   // good choice because it is (a) only 1 away from wrapping to 0, and (b) the
   // tombstone value for DenseMap<> and caused weird assertions for me.
   static constexpr uint64_t outOfRangeVA = 0xfull << 60;
 };
 
 TargetInfo *createX86_64TargetInfo();
 TargetInfo *createARM64TargetInfo();
 TargetInfo *createARM64_32TargetInfo();
-TargetInfo *createARMTargetInfo(uint32_t cpuSubtype);
 
 struct LP64 {
   using mach_header = llvm::MachO::mach_header_64;
   using nlist = structs::nlist_64;
   using segment_command = llvm::MachO::segment_command_64;
   using section = llvm::MachO::section_64;
   using encryption_info_command = llvm::MachO::encryption_info_command_64;
 

lld/test/MachO/arm-branch-relocs.s

-# REQUIRES: arm
-# RUN: llvm-mc -filetype=obj -triple=armv7-apple-watchos %s -o %t.o
-# RUN: %lld-watchos -dylib -arch armv7 -lSystem -o %t %t.o
-# RUN: llvm-objdump --macho -d %t | FileCheck %s
-
-# CHECK:      _arm:
-# CHECK-NEXT: blx _thumb_1
-# CHECK-NEXT: blx _thumb_2
-# CHECK-NEXT: bl  _arm
-# CHECK-NEXT: bl  _arm
-
-.globl _arm, _thumb_1, _thumb_2
-.syntax unified
-.thumb_func _thumb_1
-.thumb_func _thumb_2
-
-.p2align 2
-
-.code 16
-## These two thumb functions are exactly 2 bytes apart in order to test that we
-## set the H bit correctly in the BLX instruction.
-_thumb_1:
-  nop
-
-_thumb_2:
-  nop
-
-.code 32
-_arm:
-  blx _thumb_1
-  blx _thumb_2
-  bl _arm
-  blx _arm

lld/test/MachO/arm-dtrace.s

-# REQUIRES: arm
-# RUN: rm -rf %t; split-file %s %t
-
-# TODO: Replace %no-lsystem-lld with %lld
-
-# RUN: llvm-mc -filetype=obj -triple=armv4t-apple-darwin %t/armv4t-dtrace.s -o %t/armv4t-dtrace.o
-# RUN: %no-lsystem-lld -arch armv4t -o %t/armv4t-dtrace %t/armv4t-dtrace.o
-
-## If references of dtrace symbols are handled by lld, their relocation should be replaced with the following instructions
-# RUN: llvm-objdump --macho -D %t/armv4t-dtrace | FileCheck %s --check-prefix=CHECK-armv4t
-
-# CHECK-armv4t: 00 00 20 e0  eor     r0, r0, r0
-
-# CHECK-armv4t: 00 00 a0 e1  mov     r0, r0
-
-# RUN: llvm-mc -filetype=obj -triple=thumbv7-apple-darwin %t/armv7-dtrace.s -o %t/armv7-dtrace.o
-# RUN: %no-lsystem-lld -arch armv7 -o %t/armv7-dtrace %t/armv7-dtrace.o
-
-## If references of dtrace symbols are handled by lld, their relocation should be replaced with the following instructions
-# RUN: llvm-objdump --macho -D %t/armv7-dtrace | FileCheck %s --check-prefix=CHECK-armv7
-
-# CHECK-armv7:      40 40   eors    r0, r0
-# CHECK-armv7-NEXT: c0 46   mov     r8, r8
-
-# CHECK-armv7:      c0 46   mov     r8, r8
-# CHECK-armv7-NEXT: c0 46   mov     r8, r8
-
-;--- armv4t-dtrace.s
-  .globl  _main
-_main:
-  bl  ___dtrace_isenabled$Foo$added$v1
-  .reference  ___dtrace_typedefs$Foo$v2
-  bl  ___dtrace_probe$Foo$added$v1$696e74
-  .reference  ___dtrace_stability$Foo$v1$1_1_0_1_1_0_1_1_0_1_1_0_1_1_0
-
-.subsections_via_symbols
-
-;--- armv7-dtrace.s
-  .globl  _main
-  .thumb_func _main
-_main:
-  bl  ___dtrace_isenabled$Foo$added$v1
-  .reference  ___dtrace_typedefs$Foo$v2
-  bl  ___dtrace_probe$Foo$added$v1$696e74
-  .reference  ___dtrace_stability$Foo$v1$1_1_0_1_1_0_1_1_0_1_1_0_1_1_0
-
-.subsections_via_symbols

lld/test/MachO/header.s

-# REQUIRES: x86, aarch64, arm
+# REQUIRES: x86, aarch64
 # RUN: rm -rf %t && mkdir -p %t
 # RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t/x86-64-test.o
 # RUN: llvm-mc -filetype=obj -triple=arm64-apple-darwin %s -o %t/arm64-test.o
 # RUN: llvm-mc -filetype=obj -triple=arm64_32-apple-watchos %s -o %t/arm64-32-test.o
 # RUN: llvm-mc -filetype=obj -triple=arm64_32-apple-watchos %s -o %t/arm64-32-test.o
-# RUN: llvm-mc -filetype=obj -triple=armv7-apple-watchos %s -o %t/arm-test.o
 
 # RUN: %lld -lSystem -arch x86_64 -o %t/x86-64-executable %t/x86-64-test.o
 # RUN: %lld -lSystem -arch arm64 -o %t/arm64-executable %t/arm64-test.o
 # RUN: %lld-watchos -lSystem -o %t/arm64-32-executable %t/arm64-32-test.o
-# RUN: %lld-watchos -lSystem -arch armv7 -o %t/arm-executable %t/arm-test.o
 
 # RUN: %lld -arch x86_64 -dylib -o %t/x86-64-dylib %t/x86-64-test.o
 
 ## NOTE: recent versions of ld64 don't emit LIB64 for x86-64-executable, maybe we should follow suit
 # RUN: llvm-objdump --macho --private-header %t/x86-64-executable | FileCheck %s --check-prefix=EXEC -DCPU=X86_64 -DSUBTYPE=ALL -DCAPS=LIB64
 # RUN: llvm-objdump --macho --private-header %t/arm64-executable | FileCheck %s --check-prefix=EXEC -DCPU=ARM64 -DSUBTYPE=ALL -DCAPS=0x00
 # RUN: llvm-objdump --macho --private-header %t/arm64-32-executable | FileCheck %s --check-prefix=EXEC -DCPU=ARM64_32 -DSUBTYPE=V8 -DCAPS=0x00
-# RUN: llvm-objdump --macho --private-header %t/arm-executable | FileCheck %s  --check-prefix=EXEC -DCPU=ARM -DSUBTYPE=V7 -DCAPS=0x00
 
 # RUN: llvm-objdump --macho --private-header %t/x86-64-dylib | FileCheck %s --check-prefix=DYLIB -DCPU=X86_64 -DSUBTYPE=ALL -DCAPS=0x00
 
 # EXEC:      magic               cputype  cpusubtype   caps     filetype {{.*}} flags
 # EXEC-NEXT: MH_MAGIC{{(_64)?}}  [[CPU]]  [[SUBTYPE]]  [[CAPS]] EXECUTE  {{.*}} NOUNDEFS DYLDLINK TWOLEVEL PIE{{$}}
 
 # DYLIB:      magic                  cputype  cpusubtype   caps      filetype {{.*}} flags
 # DYLIB-NEXT: MH_MAGIC_64{{(_64)?}}  [[CPU]]  [[SUBTYPE]]  [[CAPS]]  DYLIB    {{.*}} NOUNDEFS DYLDLINK TWOLEVEL NO_REEXPORTED_DYLIBS{{$}}
 
 .globl _main
 _main:

lld/test/MachO/weak-def-thumb-conflict.s

-# REQUIRES: arm
-# RUN: rm -rf %t; split-file %s %t
-# RUN: llvm-mc -filetype=obj -triple=armv7-apple-watchos %t/thumb-foo.s -o %t/thumb-foo.o
-# RUN: llvm-mc -filetype=obj -triple=armv7-apple-watchos %t/arm-foo.s -o %t/arm-foo.o
-# RUN: %lld-watchos -arch armv7 -dylib %t/arm-foo.o %t/thumb-foo.o -o %t/arm-foo
-# RUN: %lld-watchos -arch armv7 -dylib %t/thumb-foo.o %t/arm-foo.o -o %t/thumb-foo
-# RUN: llvm-nm -m %t/arm-foo | FileCheck %s --check-prefix=ARM
-# RUN: llvm-nm -m %t/thumb-foo | FileCheck %s --check-prefix=THUMB
-
-## Check that we preserve the .thumb_def flag if we pick the thumb definition of
-## _foo.
-# ARM:   (__TEXT,arm)   weak external         _foo
-# THUMB: (__TEXT,thumb) weak external [Thumb] _foo
-
-#--- thumb-foo.s
-.section __TEXT,thumb
-.globl _foo
-.weak_definition _foo
-.thumb_func _foo
-.p2align 2
-_foo:
-
-#--- arm-foo.s
-.section __TEXT,arm
-.globl _foo
-.weak_definition _foo
-.p2align 2
-_foo: