[HWASAN] Untag pointer with TagMaskByte instead 0xFF

[vitalybuka]

Summary

This applies only X86_64 where mask is 0x3F.

llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp

 // Remove tag from an address.
 Value *HWAddressSanitizer::untagPointer(IRBuilder<> &IRB, Value *PtrLong) {
   assert(!UsePageAliases);
   Value *UntaggedPtrLong;
   if (CompileKernel) {
     // Kernel addresses have 0xFF in the most significant byte.
     UntaggedPtrLong =
         IRB.CreateOr(PtrLong, ConstantInt::get(PtrLong->getType(),
-                                               0xFFULL << PointerTagShift));
+                                               TagMaskByte << PointerTagShift));
   } else {
     // Userspace addresses have 0x00.
-    UntaggedPtrLong =
-        IRB.CreateAnd(PtrLong, ConstantInt::get(PtrLong->getType(),
-                                                ~(0xFFULL << PointerTagShift)));
+    UntaggedPtrLong = IRB.CreateAnd(
+        PtrLong, ConstantInt::get(PtrLong->getType(),
+                                  ~(TagMaskByte << PointerTagShift)));
   }
   return UntaggedPtrLong;
 }
 
 Value *HWAddressSanitizer::getHwasanThreadSlotPtr(IRBuilder<> &IRB, Type *Ty) {
   Module *M = IRB.GetInsertBlock()->getParent()->getParent();
   if (TargetTriple.isAArch64() && TargetTriple.isAndroid()) {
     // Android provides a fixed TLS slot for sanitizers. See TLS_SLOT_SANITIZER

llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll

 ; CHECK-NEXT:    [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
 ; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
 ; CHECK-NEXT:    ret void
 ;
 ; INLINE-LABEL: define void @test_alloca
 ; INLINE-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk {
 ; INLINE-NEXT:  entry:
 ; INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
 ; INLINE-NEXT:    [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
 ; INLINE-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 44
 ; INLINE-NEXT:    [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]]
 ; INLINE-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
 ; INLINE-NEXT:    store i64 [[TMP6]], ptr [[TMP7]], align 8
 ; INLINE-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP0]], 56

 ; INLINE-NEXT:    [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
 ; INLINE-NEXT:    [[TMP16:%.*]] = xor i64 [[TMP2]], 0
 ; INLINE-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
 ; INLINE-NEXT:    [[TMP18:%.*]] = shl i64 [[TMP16]], 57
 ; INLINE-NEXT:    [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]]
 ; INLINE-NEXT:    [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
 ; INLINE-NEXT:    [[TMP20:%.*]] = trunc i64 [[TMP16]] to i8
 ; INLINE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[X]] to i64
-; INLINE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 144115188075855871
+; INLINE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], -9079256848778919937
 ; INLINE-NEXT:    [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
 ; INLINE-NEXT:    [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]]
 ; INLINE-NEXT:    [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0
 ; INLINE-NEXT:    store i8 4, ptr [[TMP25]], align 1
 ; INLINE-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[X]], i32 15
 ; INLINE-NEXT:    store i8 [[TMP20]], ptr [[TMP26]], align 1
 ; INLINE-NEXT:    call void @use32(ptr nonnull [[X_HWASAN]])
 ; INLINE-NEXT:    [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
 ; INLINE-NEXT:    [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
-; INLINE-NEXT:    [[TMP29:%.*]] = and i64 [[TMP28]], 144115188075855871
+; INLINE-NEXT:    [[TMP29:%.*]] = and i64 [[TMP28]], -9079256848778919937
 ; INLINE-NEXT:    [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
 ; INLINE-NEXT:    [[TMP31:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP30]]
 ; INLINE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
 ; INLINE-NEXT:    ret void
 ;
 entry:
   %x = alloca i32, align 4
   call void @use32(ptr nonnull %x)

 ; CHECK-NEXT:    [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
 ; CHECK-NEXT:    call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP11]], i64 16)
 ; CHECK-NEXT:    ret i32 0
 ;
 ; INLINE-LABEL: define i32 @test_simple
 ; INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] personality ptr @__hwasan_personality_thunk {
 ; INLINE-NEXT:  entry:
 ; INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; INLINE-NEXT:    [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
 ; INLINE-NEXT:    [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
 ; INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
 ; INLINE-NEXT:    [[TMP5:%.*]] = shl i64 [[TMP4]], 44
 ; INLINE-NEXT:    [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_simple to i64), [[TMP5]]
 ; INLINE-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
 ; INLINE-NEXT:    store i64 [[TMP6]], ptr [[TMP7]], align 8
 ; INLINE-NEXT:    [[TMP8:%.*]] = ashr i64 [[TMP0]], 56

 ; INLINE-NEXT:    [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16
 ; INLINE-NEXT:    [[TMP16:%.*]] = xor i64 [[TMP2]], 0
 ; INLINE-NEXT:    [[TMP17:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
 ; INLINE-NEXT:    [[TMP18:%.*]] = shl i64 [[TMP16]], 57
 ; INLINE-NEXT:    [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]]
 ; INLINE-NEXT:    [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
 ; INLINE-NEXT:    [[TMP20:%.*]] = trunc i64 [[TMP16]] to i8
 ; INLINE-NEXT:    [[TMP21:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; INLINE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], 144115188075855871
+; INLINE-NEXT:    [[TMP22:%.*]] = and i64 [[TMP21]], -9079256848778919937
 ; INLINE-NEXT:    [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
 ; INLINE-NEXT:    [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]]
 ; INLINE-NEXT:    [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0
 ; INLINE-NEXT:    store i8 1, ptr [[TMP25]], align 1
 ; INLINE-NEXT:    [[TMP26:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15
 ; INLINE-NEXT:    store i8 [[TMP20]], ptr [[TMP26]], align 1
 ; INLINE-NEXT:    [[TMP27:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
 ; INLINE-NEXT:    [[TMP28:%.*]] = lshr i64 [[TMP27]], 57
 ; INLINE-NEXT:    [[TMP29:%.*]] = trunc i64 [[TMP28]] to i8
-; INLINE-NEXT:    [[TMP30:%.*]] = and i64 [[TMP27]], 144115188075855871
+; INLINE-NEXT:    [[TMP30:%.*]] = and i64 [[TMP27]], -9079256848778919937
 ; INLINE-NEXT:    [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
 ; INLINE-NEXT:    [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]]
 ; INLINE-NEXT:    [[TMP33:%.*]] = load i8, ptr [[TMP32]], align 1
 ; INLINE-NEXT:    [[TMP34:%.*]] = icmp ne i8 [[TMP29]], [[TMP33]]
 ; INLINE-NEXT:    br i1 [[TMP34]], label [[TMP35:%.*]], label [[TMP49:%.*]], !prof [[PROF1:![0-9]+]]
 ; INLINE:       35:
 ; INLINE-NEXT:    [[TMP36:%.*]] = icmp ugt i8 [[TMP33]], 15
 ; INLINE-NEXT:    br i1 [[TMP36]], label [[TMP37:%.*]], label [[TMP38:%.*]], !prof [[PROF1]]

 ; INLINE-NEXT:    [[TMP47:%.*]] = icmp ne i8 [[TMP29]], [[TMP46]]
 ; INLINE-NEXT:    br i1 [[TMP47]], label [[TMP37]], label [[TMP48:%.*]], !prof [[PROF1]]
 ; INLINE:       48:
 ; INLINE-NEXT:    br label [[TMP49]]
 ; INLINE:       49:
 ; INLINE-NEXT:    store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4
 ; INLINE-NEXT:    [[TMP50:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
 ; INLINE-NEXT:    [[TMP51:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
-; INLINE-NEXT:    [[TMP52:%.*]] = and i64 [[TMP51]], 144115188075855871
+; INLINE-NEXT:    [[TMP52:%.*]] = and i64 [[TMP51]], -9079256848778919937
 ; INLINE-NEXT:    [[TMP53:%.*]] = lshr i64 [[TMP52]], 4
 ; INLINE-NEXT:    [[TMP54:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP53]]
 ; INLINE-NEXT:    call void @llvm.memset.p0.i64(ptr align 1 [[TMP54]], i8 [[TMP50]], i64 1, i1 false)
 ; INLINE-NEXT:    ret i32 0
 ;
 entry:
   %buf.sroa.0 = alloca i8, align 4
   call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %buf.sroa.0)

llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll

 ; RECOVER-NEXT:    call void @__hwasan_load1_noabort(i64 [[TMP0]])
 ; RECOVER-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; RECOVER-NEXT:    ret i8 [[B]]
 ;
 ; ABORT-INLINE-LABEL: define i8 @test_load8
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 57
 ; ABORT-INLINE-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; ABORT-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 144115188075855871
+; ABORT-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937
 ; ABORT-INLINE-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
 ; ABORT-INLINE-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
 ; ABORT-INLINE-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
 ; ABORT-INLINE-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
 ; ABORT-INLINE-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1:![0-9]+]]
 ; ABORT-INLINE:       12:
 ; ABORT-INLINE-NEXT:    [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
 ; ABORT-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]

 ; ABORT-INLINE:       26:
 ; ABORT-INLINE-NEXT:    [[B:%.*]] = load i8, ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret i8 [[B]]
 ;
 ; RECOVER-INLINE-LABEL: define i8 @test_load8
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 57
 ; RECOVER-INLINE-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; RECOVER-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 144115188075855871
+; RECOVER-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937
 ; RECOVER-INLINE-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
 ; RECOVER-INLINE-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
 ; RECOVER-INLINE-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
 ; RECOVER-INLINE-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
 ; RECOVER-INLINE-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1:![0-9]+]]
 ; RECOVER-INLINE:       12:
 ; RECOVER-INLINE-NEXT:    [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
 ; RECOVER-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]

 ; RECOVER-NEXT:    call void @__hwasan_loadN_noabort(i64 [[TMP0]], i64 5)
 ; RECOVER-NEXT:    [[B:%.*]] = load i40, ptr [[A]], align 4
 ; RECOVER-NEXT:    ret i40 [[B]]
 ;
 ; ABORT-INLINE-LABEL: define i40 @test_load40
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-INLINE-NEXT:    call void @__hwasan_loadN(i64 [[TMP4]], i64 5)
 ; ABORT-INLINE-NEXT:    [[B:%.*]] = load i40, ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret i40 [[B]]
 ;
 ; RECOVER-INLINE-LABEL: define i40 @test_load40
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-INLINE-NEXT:    call void @__hwasan_loadN_noabort(i64 [[TMP4]], i64 5)
 ; RECOVER-INLINE-NEXT:    [[B:%.*]] = load i40, ptr [[A]], align 4
 ; RECOVER-INLINE-NEXT:    ret i40 [[B]]
 ;

 ; RECOVER-NEXT:    call void @__hwasan_store1_noabort(i64 [[TMP0]])
 ; RECOVER-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; RECOVER-NEXT:    ret void
 ;
 ; ABORT-INLINE-LABEL: define void @test_store8
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-INLINE-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 57
 ; ABORT-INLINE-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; ABORT-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 144115188075855871
+; ABORT-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937
 ; ABORT-INLINE-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
 ; ABORT-INLINE-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
 ; ABORT-INLINE-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
 ; ABORT-INLINE-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
 ; ABORT-INLINE-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]
 ; ABORT-INLINE:       12:
 ; ABORT-INLINE-NEXT:    [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
 ; ABORT-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]

 ; ABORT-INLINE:       26:
 ; ABORT-INLINE-NEXT:    store i8 [[B]], ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret void
 ;
 ; RECOVER-INLINE-LABEL: define void @test_store8
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-INLINE-NEXT:    [[TMP5:%.*]] = lshr i64 [[TMP4]], 57
 ; RECOVER-INLINE-NEXT:    [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
-; RECOVER-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], 144115188075855871
+; RECOVER-INLINE-NEXT:    [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937
 ; RECOVER-INLINE-NEXT:    [[TMP8:%.*]] = lshr i64 [[TMP7]], 4
 ; RECOVER-INLINE-NEXT:    [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
 ; RECOVER-INLINE-NEXT:    [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
 ; RECOVER-INLINE-NEXT:    [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
 ; RECOVER-INLINE-NEXT:    br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]
 ; RECOVER-INLINE:       12:
 ; RECOVER-INLINE-NEXT:    [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
 ; RECOVER-INLINE-NEXT:    br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]

 ; RECOVER-NEXT:    call void @__hwasan_storeN_noabort(i64 [[TMP0]], i64 5)
 ; RECOVER-NEXT:    store i40 [[B]], ptr [[A]], align 4
 ; RECOVER-NEXT:    ret void
 ;
 ; ABORT-INLINE-LABEL: define void @test_store40
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-INLINE-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 5)
 ; ABORT-INLINE-NEXT:    store i40 [[B]], ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret void
 ;
 ; RECOVER-INLINE-LABEL: define void @test_store40
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-INLINE-NEXT:    call void @__hwasan_storeN_noabort(i64 [[TMP4]], i64 5)
 ; RECOVER-INLINE-NEXT:    store i40 [[B]], ptr [[A]], align 4
 ; RECOVER-INLINE-NEXT:    ret void
 ;

 ; RECOVER-NEXT:    call void @__hwasan_storeN_noabort(i64 [[TMP0]], i64 8)
 ; RECOVER-NEXT:    store i64 [[B]], ptr [[A]], align 4
 ; RECOVER-NEXT:    ret void
 ;
 ; ABORT-INLINE-LABEL: define void @test_store_unaligned
 ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; ABORT-INLINE-NEXT:  entry:
 ; ABORT-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; ABORT-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; ABORT-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; ABORT-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; ABORT-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; ABORT-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; ABORT-INLINE-NEXT:    call void @__hwasan_storeN(i64 [[TMP4]], i64 8)
 ; ABORT-INLINE-NEXT:    store i64 [[B]], ptr [[A]], align 4
 ; ABORT-INLINE-NEXT:    ret void
 ;
 ; RECOVER-INLINE-LABEL: define void @test_store_unaligned
 ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] {
 ; RECOVER-INLINE-NEXT:  entry:
 ; RECOVER-INLINE-NEXT:    [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871
+; RECOVER-INLINE-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937
 ; RECOVER-INLINE-NEXT:    [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
 ; RECOVER-INLINE-NEXT:    [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
 ; RECOVER-INLINE-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
 ; RECOVER-INLINE-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64
 ; RECOVER-INLINE-NEXT:    call void @__hwasan_storeN_noabort(i64 [[TMP4]], i64 8)
 ; RECOVER-INLINE-NEXT:    store i64 [[B]], ptr [[A]], align 4
 ; RECOVER-INLINE-NEXT:    ret void
 ;
 
 
 
 entry:
   store i64 %b, ptr %a, align 4
   ret void
 }