This is an archive of the discontinued LLVM Phabricator instance.

Differential D149197

[X86] Add tests for `div/rem %x, (select c, <const>, 1)`; NFC
ClosedPublic

Authored by goldstein.w.n on Apr 25 2023, 2:27 PM.

Details

Reviewers
RKSimon
pengfei
Commits
rGeccb45417776: [X86] Add tests for `div/rem %x, (select c, <const>, 1)`; NFC

Diff Detail

Unit TestsFailed

TimeTest
130 msx64 debian > LLVM.CodeGen/X86::divrem-by-select.ll

Event Timeline

goldstein.w.n created this revision.Apr 25 2023, 2:27 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 25 2023, 2:27 PM
goldstein.w.n requested review of this revision.Apr 25 2023, 2:27 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 25 2023, 2:27 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
goldstein.w.n added a child revision: D149198: [DAGCombiner] Make it so that `udiv` can be folded with `(select c, NonZero, 1)`.Apr 25 2023, 2:32 PM
goldstein.w.n added a parent revision: D149196: [SelectionDAG] Use `computeKnownBits` if `Op` is not recognized by `isKnownNeverZero`.
goldstein.w.n updated this revision to Diff 516932.Apr 25 2023, 3:01 PM

Rebase

Harbormaster completed remote builds in B228121: Diff 516932.Apr 25 2023, 3:33 PM
pengfei added inline comments.Apr 25 2023, 8:21 PM
llvm/test/CodeGen/X86/divrem-by-select.ll
141

Why non_zero matters here? Dividen by 0 is posion, we don't need to cary its result.

pengfei added inline comments.Apr 25 2023, 8:27 PM
llvm/test/CodeGen/X86/divrem-by-select.ll
141

Ok, I got the point after read D149199.

pengfei accepted this revision.Apr 25 2023, 8:29 PM
This revision is now accepted and ready to land.Apr 25 2023, 8:29 PM
goldstein.w.n updated this revision to Diff 517047.Apr 25 2023, 9:44 PM

Rebase

Harbormaster completed remote builds in B228207: Diff 517047.Apr 25 2023, 10:47 PM
goldstein.w.n updated this revision to Diff 517329.Apr 26 2023, 2:48 PM

Rebase

Harbormaster completed remote builds in B228406: Diff 517329.Apr 26 2023, 3:37 PM
goldstein.w.n updated this revision to Diff 521862.May 12 2023, 10:08 PM

Rebase

Harbormaster completed remote builds in B231758: Diff 521862.May 12 2023, 11:12 PM
goldstein.w.n updated this revision to Diff 521913.May 13 2023, 10:39 AM

Rebase

Harbormaster completed remote builds in B231792: Diff 521913.May 13 2023, 11:13 AM
goldstein.w.n updated this revision to Diff 523261.May 17 2023, 10:02 PM

Rebase

Harbormaster completed remote builds in B232774: Diff 523261.May 17 2023, 10:59 PM
goldstein.w.n updated this revision to Diff 523418.May 18 2023, 9:56 AM

Rebase

goldstein.w.n updated this revision to Diff 523431.May 18 2023, 10:19 AM

rebase

Harbormaster completed remote builds in B232910: Diff 523431.May 18 2023, 11:09 AM
goldstein.w.n updated this revision to Diff 538472.Jul 9 2023, 6:03 PM

Rebase

Harbormaster completed remote builds in B244015: Diff 538472.Jul 9 2023, 6:59 PM
goldstein.w.n updated this revision to Diff 538691.Jul 10 2023, 9:21 AM

Rebase

Harbormaster completed remote builds in B244178: Diff 538691.Jul 10 2023, 10:47 AM
This revision was landed with ongoing or failed builds.Jul 12 2023, 3:18 PM
Closed by commit rGeccb45417776: [X86] Add tests for `div/rem %x, (select c, <const>, 1)`; NFC (authored by goldstein.w.n). · Explain Why
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rGeccb45417776: [X86] Add tests for `div/rem %x, (select c, <const>, 1)`; NFC.

Revision Contents

PathSize
llvm/
test/
CodeGen/
X86/
520 lines

Diff 538691

llvm/test/CodeGen/X86/divrem-by-select.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK-X64,CHECK-X64-V3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK-X64,CHECK-X64-V4
define <2 x i64> @udiv_identity_const(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: udiv_identity_const:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [1,1]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: udiv_identity_const:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [1,1]
; CHECK-X64-V4-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> <i64 11, i64 11>, <2 x i64> <i64 1, i64 1>
%r = udiv <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @udiv_identity_const_todo_getter_nonzero(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: udiv_identity_const_todo_getter_nonzero:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [1,1]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: udiv_identity_const_todo_getter_nonzero:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [1,1]
; CHECK-X64-V4-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
;; Fails at the moment because `10` is even so there is no common
;; bit between the arms of the select so the default case of
;; isKnownNeverZero has no guaranteed 1 bits.
%d = select <2 x i1> %c, <2 x i64> <i64 10, i64 10>, <2 x i64> <i64 1, i64 1>
%r = udiv <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @udiv_indentity_non_zero(<2 x i1> %c, <2 x i64> %x, <2 x i64> %y) {
; CHECK-X64-V3-LABEL: udiv_indentity_non_zero:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; CHECK-X64-V3-NEXT: vpsubq %xmm3, %xmm2, %xmm2
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm3 = [1,1]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: udiv_indentity_non_zero:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm3 = [1,1]
; CHECK-X64-V4-NEXT: vpsubq %xmm0, %xmm2, %xmm3 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm3, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm3, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
%non_zero = add nsw nuw <2 x i64> %y, <i64 1, i64 1>
%d = select <2 x i1> %c, <2 x i64> %non_zero, <2 x i64> <i64 1, i64 1>
pengfeiUnsubmitted
Not Done
ReplyInline Actions

Why non_zero matters here? Dividen by 0 is posion, we don't need to cary its result.

pengfei: Why non_zero matters here? Dividen by 0 is posion, we don't need to cary its result.
pengfeiUnsubmitted
Not Done
ReplyInline Actions

Ok, I got the point after read D149199.

pengfei: Ok, I got the point after read D149199.
%r = udiv <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @udiv_indentity_zero(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: udiv_indentity_zero:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: udiv_indentity_zero:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k0
; CHECK-X64-V4-NEXT: knotw %k0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1} {z}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> zeroinitializer, <2 x i64> <i64 1, i64 1>
%r = udiv <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @udiv_indentity_partial_zero(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: udiv_indentity_partial_zero:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [1,1]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: udiv_indentity_partial_zero:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [1,1]
; CHECK-X64-V4-NEXT: vmovdqa64 {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> <i64 0, i64 5>, <2 x i64> <i64 1, i64 1>
%r = udiv <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @urem_identity_const(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: urem_identity_const:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [11,11]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rcx
; CHECK-X64-V3-NEXT: movq %rdx, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rdx, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: urem_identity_const:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [11,11]
; CHECK-X64-V4-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rcx
; CHECK-X64-V4-NEXT: movq %rdx, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rdx, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> <i64 1, i64 1>, <2 x i64> <i64 11, i64 11>
%r = urem <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @sdiv_identity_const(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: sdiv_identity_const:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [1,1]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: cqto
; CHECK-X64-V3-NEXT: idivq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: cqto
; CHECK-X64-V3-NEXT: idivq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: sdiv_identity_const:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [1,1]
; CHECK-X64-V4-NEXT: vmovdqa64 {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: cqto
; CHECK-X64-V4-NEXT: idivq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: cqto
; CHECK-X64-V4-NEXT: idivq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> <i64 11, i64 13>, <2 x i64> <i64 1, i64 1>
%r = sdiv <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @sdiv_identity_const_todo_better_nonzero(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: sdiv_identity_const_todo_better_nonzero:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [1,1]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: cqto
; CHECK-X64-V3-NEXT: idivq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: cqto
; CHECK-X64-V3-NEXT: idivq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: sdiv_identity_const_todo_better_nonzero:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [1,1]
; CHECK-X64-V4-NEXT: vmovdqa64 {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: cqto
; CHECK-X64-V4-NEXT: idivq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: cqto
; CHECK-X64-V4-NEXT: idivq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> <i64 11, i64 17>, <2 x i64> <i64 1, i64 1>
%r = sdiv <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @srem_identity_const(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: srem_identity_const:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [11,11]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: cqto
; CHECK-X64-V3-NEXT: idivq %rcx
; CHECK-X64-V3-NEXT: movq %rdx, %rcx
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: cqto
; CHECK-X64-V3-NEXT: idivq %rsi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rdx, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: srem_identity_const:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [11,11]
; CHECK-X64-V4-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: cqto
; CHECK-X64-V4-NEXT: idivq %rcx
; CHECK-X64-V4-NEXT: movq %rdx, %rcx
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: cqto
; CHECK-X64-V4-NEXT: idivq %rsi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rdx, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> <i64 1, i64 1>, <2 x i64> <i64 11, i64 11>
%r = srem <2 x i64> %x, %d
ret <2 x i64> %r
}
define <2 x i64> @udivrem_identity_const(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: udivrem_identity_const:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [1,1]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: movq %rdx, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rdi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: xorl %edx, %edx
; CHECK-X64-V3-NEXT: divq %rdi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: vmovq %rsi, %xmm1
; CHECK-X64-V3-NEXT: vmovq %rdx, %xmm2
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; CHECK-X64-V3-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: udivrem_identity_const:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [1,1]
; CHECK-X64-V4-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: movq %rdx, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rdi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: xorl %edx, %edx
; CHECK-X64-V4-NEXT: divq %rdi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: vmovq %rsi, %xmm1
; CHECK-X64-V4-NEXT: vmovq %rdx, %xmm2
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; CHECK-X64-V4-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> <i64 11, i64 11>, <2 x i64> <i64 1, i64 1>
%div = udiv <2 x i64> %x, %d
%rem = urem <2 x i64> %x, %d
%r = add <2 x i64> %div, %rem
ret <2 x i64> %r
}
define <2 x i64> @sdivrem_identity_const(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: sdivrem_identity_const:
; CHECK-X64-V3: # %bb.0:
; CHECK-X64-V3-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: vmovapd {{.*#+}} xmm2 = [1,1]
; CHECK-X64-V3-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V3-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V3-NEXT: cqto
; CHECK-X64-V3-NEXT: idivq %rcx
; CHECK-X64-V3-NEXT: movq %rax, %rcx
; CHECK-X64-V3-NEXT: movq %rdx, %rsi
; CHECK-X64-V3-NEXT: vmovq %xmm0, %rdi
; CHECK-X64-V3-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V3-NEXT: cqto
; CHECK-X64-V3-NEXT: idivq %rdi
; CHECK-X64-V3-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V3-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V3-NEXT: vmovq %rsi, %xmm1
; CHECK-X64-V3-NEXT: vmovq %rdx, %xmm2
; CHECK-X64-V3-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; CHECK-X64-V3-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; CHECK-X64-V3-NEXT: retq
;
; CHECK-X64-V4-LABEL: sdivrem_identity_const:
; CHECK-X64-V4: # %bb.0:
; CHECK-X64-V4-NEXT: vpsllq $63, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: vpmovq2m %xmm0, %k1
; CHECK-X64-V4-NEXT: vpbroadcastq {{.*#+}} xmm0 = [1,1]
; CHECK-X64-V4-NEXT: vpbroadcastq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 {%k1}
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm0, %rcx
; CHECK-X64-V4-NEXT: vpextrq $1, %xmm1, %rax
; CHECK-X64-V4-NEXT: cqto
; CHECK-X64-V4-NEXT: idivq %rcx
; CHECK-X64-V4-NEXT: movq %rax, %rcx
; CHECK-X64-V4-NEXT: movq %rdx, %rsi
; CHECK-X64-V4-NEXT: vmovq %xmm0, %rdi
; CHECK-X64-V4-NEXT: vmovq %xmm1, %rax
; CHECK-X64-V4-NEXT: cqto
; CHECK-X64-V4-NEXT: idivq %rdi
; CHECK-X64-V4-NEXT: vmovq %rcx, %xmm0
; CHECK-X64-V4-NEXT: vmovq %rax, %xmm1
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; CHECK-X64-V4-NEXT: vmovq %rsi, %xmm1
; CHECK-X64-V4-NEXT: vmovq %rdx, %xmm2
; CHECK-X64-V4-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; CHECK-X64-V4-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; CHECK-X64-V4-NEXT: retq
%d = select <2 x i1> %c, <2 x i64> <i64 11, i64 11>, <2 x i64> <i64 1, i64 1>
%div = sdiv <2 x i64> %x, %d
%rem = srem <2 x i64> %x, %d
%r = add <2 x i64> %div, %rem
ret <2 x i64> %r
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-X64: {{.*}}