[AVR] Reject invalid LDD instruction with explicit error

[benshi001]

Summary

We should reject ldd Rn, X with explicit error message
rather than llvm_unreachable in llvm's release build.

Fixes https://github.com/llvm/llvm-project/issues/62012

llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp

unsigned AVRMCCodeEmitter::encodeMemri(const MCInst &MI, unsigned OpNo,
   auto OffsetOp = MI.getOperand(OpNo + 1);
 
   assert(RegOp.isReg() && "Expected register operand");
 
   uint8_t RegBit = 0;
 
   switch (RegOp.getReg()) {
   default:
-    llvm_unreachable("Expected either Y or Z register");
+    Ctx.reportError(MI.getLoc(), "Expected either Y or Z register");
+    return 0;
   case AVR::R31R30:
     RegBit = 0;
     break; // Z register
   case AVR::R29R28:
     RegBit = 1;
     break; // Y register
   }
 
   int8_t OffsetBits;
 
   if (OffsetOp.isImm()) {
     OffsetBits = OffsetOp.getImm();
   } else if (OffsetOp.isExpr()) {
     OffsetBits = 0;
     Fixups.push_back(MCFixup::create(0, OffsetOp.getExpr(),
                                      MCFixupKind(AVR::fixup_6), MI.getLoc()));
   } else {
-    llvm_unreachable("invalid value for offset");
+    llvm_unreachable("Invalid value for offset");
   }
 
   return (RegBit << 6) | OffsetBits;
 }
 
 unsigned AVRMCCodeEmitter::encodeComplement(const MCInst &MI, unsigned OpNo,
                                             SmallVectorImpl<MCFixup> &Fixups,
                                             const MCSubtargetInfo &STI) const {

llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll

-; RUN: not llc < %s -march=avr -no-integrated-as 2>&1 | FileCheck %s
+; RUN: not llc < %s -march=avr -mcpu=avr6 -filetype=obj -no-integrated-as 2>&1 \
+; RUN:     | FileCheck %s
 
 define void @foo(i16 %a) {
   ; CHECK: error: invalid operand in inline asm: 'jl ${0:l}'
   %i.addr = alloca i32, align 4
   call void asm sideeffect "jl ${0:l}", "*m"(i32* elementtype(i32) %i.addr)
 
   ret void
 }
 
 define void @foo1() {
   ; CHECK: error: invalid operand in inline asm: ';; ${0:C}'
   call i16 asm sideeffect ";; ${0:C}", "=d"()
   ret void
 }
+
+define void @foo2() {
+  ; CHECK: error: expected either Y or Z register
+  call void asm sideeffect "ldd r24, X+2", ""()
+  ret void
+}