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Differential D147566

[InstCombine] Add baseline tests for nsw/nuw (NFC)
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Authored by emgullufsen on Apr 4 2023, 1:19 PM.

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Reviewers
spatel
bcl5980
nikic
Commits
rGe63902128f88: [InstCombine] Add baseline tests for nsw/nuw (NFC)
Summary

nsw/nuw flags are currently not preserved when canonicalizing,
adding baseline tests here and subsequent patch will fix.
Alive2 verification for add,or -> or,add where add has nsw flag

Diff Detail

Event Timeline

emgullufsen created this revision.Apr 4 2023, 1:19 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 4 2023, 1:19 PM
Herald added a subscriber: StephenFan. · View Herald Transcript
emgullufsen requested review of this revision.Apr 4 2023, 1:19 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 4 2023, 1:19 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
emgullufsen added a child revision: D147568: [InstCombine] Preserve nsw/nuw flags in canonicalization.Apr 4 2023, 1:27 PM
emgullufsen set the repository for this revision to rG LLVM Github Monorepo.Apr 4 2023, 1:49 PM
Harbormaster completed remote builds in B223658: Diff 510908.Apr 4 2023, 5:06 PM
nikic accepted this revision.Apr 5 2023, 5:55 AM
nikic added a subscriber: nikic.

LGTM

This revision is now accepted and ready to land.Apr 5 2023, 5:55 AM
Closed by commit rGe63902128f88: [InstCombine] Add baseline tests for nsw/nuw (NFC) (authored by emgullufsen). · Explain WhyApr 5 2023, 7:13 AM
This revision was automatically updated to reflect the committed changes.
emgullufsen added a commit: rGe63902128f88: [InstCombine] Add baseline tests for nsw/nuw (NFC).

Revision Contents

PathSize
llvm/
test/
Transforms/
InstCombine/
170 lines

Diff 511091

llvm/test/Transforms/InstCombine/and-xor-or.ll

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; CHECK-NEXT: [[R:%.*]] = add i32 [[TMP1]], 112 ; CHECK-NEXT: [[R:%.*]] = add i32 [[TMP1]], 112
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
%a = add i32 %x, 112 ; 01110000 %a = add i32 %x, 112 ; 01110000
%r = or i32 %a, 15 ; 00001111 %r = or i32 %a, 15 ; 00001111
ret i32 %r ret i32 %r
} }
define i32 @canonicalize_logic_first_or0_nsw(i32 %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or0_nsw
; CHECK-SAME: (i32 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X]], 15
; CHECK-NEXT: [[R:%.*]] = add i32 [[TMP1]], 112
; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw i32 %x, 112 ; 01110000
%r = or i32 %a, 15 ; 00001111
ret i32 %r
}
define i32 @canonicalize_logic_first_or0_nswnuw(i32 %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or0_nswnuw
; CHECK-SAME: (i32 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X]], 15
; CHECK-NEXT: [[R:%.*]] = add i32 [[TMP1]], 112
; CHECK-NEXT: ret i32 [[R]]
;
%a = add nsw nuw i32 %x, 112 ; 01110000
%r = or i32 %a, 15 ; 00001111
ret i32 %r
}
define <2 x i32> @canonicalize_logic_first_or_vector0(<2 x i32> %x) { define <2 x i32> @canonicalize_logic_first_or_vector0(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector0 ; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector0
; CHECK-SAME: (<2 x i32> [[X:%.*]]) { ; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X]], <i32 15, i32 15> ; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X]], <i32 15, i32 15>
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[TMP1]], <i32 112, i32 112> ; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[TMP1]], <i32 112, i32 112>
; CHECK-NEXT: ret <2 x i32> [[R]] ; CHECK-NEXT: ret <2 x i32> [[R]]
; ;
%a = add <2 x i32> <i32 112, i32 112>, %x ; <0x00000070, 0x00000070> %a = add <2 x i32> <i32 112, i32 112>, %x ; <0x00000070, 0x00000070>
%r = or <2 x i32> <i32 15, i32 15>, %a ; <0x0000000F, 0x0000000F> %r = or <2 x i32> <i32 15, i32 15>, %a ; <0x0000000F, 0x0000000F>
ret <2 x i32> %r ret <2 x i32> %r
} }
; elementwise these constants should be ok to canonicalize logic op then math define <2 x i32> @canonicalize_logic_first_or_vector0_nsw(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector0_nsw
; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X]], <i32 15, i32 15>
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[TMP1]], <i32 112, i32 112>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%a = add nsw <2 x i32> <i32 112, i32 112>, %x ; <0x00000070, 0x00000070>
%r = or <2 x i32> <i32 15, i32 15>, %a ; <0x0000000F, 0x0000000F>
ret <2 x i32> %r
}
define <2 x i32> @canonicalize_logic_first_or_vector0_nswnuw(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector0_nswnuw
; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X]], <i32 15, i32 15>
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[TMP1]], <i32 112, i32 112>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%a = add nsw nuw <2 x i32> <i32 112, i32 112>, %x ; <0x00000070, 0x00000070>
%r = or <2 x i32> <i32 15, i32 15>, %a ; <0x0000000F, 0x0000000F>
ret <2 x i32> %r
}
define <2 x i32> @canonicalize_logic_first_or_vector1(<2 x i32> %x) { define <2 x i32> @canonicalize_logic_first_or_vector1(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector1 ; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector1
; CHECK-SAME: (<2 x i32> [[X:%.*]]) { ; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X]], <i32 -8388608, i32 2071986176> ; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X]], <i32 -8388608, i32 2071986176>
; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[A]], <i32 32783, i32 2063> ; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[A]], <i32 32783, i32 2063>
; CHECK-NEXT: ret <2 x i32> [[R]] ; CHECK-NEXT: ret <2 x i32> [[R]]
; ;
%a = add <2 x i32> <i32 -8388608, i32 2071986176>, %x ; <0xFF800000, 0x7B800000> %a = add <2 x i32> <i32 -8388608, i32 2071986176>, %x ; <0xFF800000, 0x7B800000>
%r = or <2 x i32> <i32 32783, i32 2063>, %a ; <0x0000800F, 0x0000080F> %r = or <2 x i32> <i32 32783, i32 2063>, %a ; <0x0000800F, 0x0000080F>
ret <2 x i32> %r ret <2 x i32> %r
} }
define <2 x i32> @canonicalize_logic_first_or_vector1_nsw(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector1_nsw
; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[A:%.*]] = add nsw <2 x i32> [[X]], <i32 -8388608, i32 2071986176>
; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[A]], <i32 32783, i32 2063>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%a = add nsw <2 x i32> <i32 -8388608, i32 2071986176>, %x ; <0xFF800000, 0x7B800000>
%r = or <2 x i32> <i32 32783, i32 2063>, %a ; <0x0000800F, 0x0000080F>
ret <2 x i32> %r
}
define <2 x i32> @canonicalize_logic_first_or_vector1_nswnuw(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector1_nswnuw
; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[A:%.*]] = add nuw nsw <2 x i32> [[X]], <i32 -8388608, i32 2071986176>
; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[A]], <i32 32783, i32 2063>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%a = add nsw nuw <2 x i32> <i32 -8388608, i32 2071986176>, %x ; <0xFF800000, 0x7B800000>
%r = or <2 x i32> <i32 32783, i32 2063>, %a ; <0x0000800F, 0x0000080F>
ret <2 x i32> %r
}
define <2 x i32> @canonicalize_logic_first_or_vector2(<2 x i32> %x) { define <2 x i32> @canonicalize_logic_first_or_vector2(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector2 ; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_or_vector2
; CHECK-SAME: (<2 x i32> [[X:%.*]]) { ; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X]], <i32 2147483632, i32 2147483640> ; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X]], <i32 2147483632, i32 2147483640>
; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[A]], <i32 32783, i32 2063> ; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[A]], <i32 32783, i32 2063>
; CHECK-NEXT: ret <2 x i32> [[R]] ; CHECK-NEXT: ret <2 x i32> [[R]]
; ;
%a = add <2 x i32> <i32 2147483632, i32 2147483640>, %x ; <0x7FFFFFF0, 0x7FFFFFF8> %a = add <2 x i32> <i32 2147483632, i32 2147483640>, %x ; <0x7FFFFFF0, 0x7FFFFFF8>
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; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], 48 ; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], 48
; CHECK-NEXT: ret i8 [[R]] ; CHECK-NEXT: ret i8 [[R]]
; ;
%b = add i8 %x, 48 ; 00110000 %b = add i8 %x, 48 ; 00110000
%r = and i8 %b, -10 ; 11110110 %r = and i8 %b, -10 ; 11110110
ret i8 %r ret i8 %r
} }
define i8 @canonicalize_logic_first_and0_nsw(i8 %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_and0_nsw
; CHECK-SAME: (i8 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X]], -10
; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], 48
; CHECK-NEXT: ret i8 [[R]]
;
%b = add nsw i8 %x, 48 ; 00110000
%r = and i8 %b, -10 ; 11110110
ret i8 %r
}
define i8 @canonicalize_logic_first_and0_nswnuw(i8 %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_and0_nswnuw
; CHECK-SAME: (i8 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X]], -10
; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], 48
; CHECK-NEXT: ret i8 [[R]]
;
%b = add nsw nuw i8 %x, 48 ; 00110000
%r = and i8 %b, -10 ; 11110110
ret i8 %r
}
define <2 x i8> @canonicalize_logic_first_and_vector0(<2 x i8> %x) { define <2 x i8> @canonicalize_logic_first_and_vector0(<2 x i8> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_and_vector0 ; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_and_vector0
; CHECK-SAME: (<2 x i8> [[X:%.*]]) { ; CHECK-SAME: (<2 x i8> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X]], <i8 -10, i8 -10> ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X]], <i8 -10, i8 -10>
; CHECK-NEXT: [[R:%.*]] = add <2 x i8> [[TMP1]], <i8 48, i8 48> ; CHECK-NEXT: [[R:%.*]] = add <2 x i8> [[TMP1]], <i8 48, i8 48>
; CHECK-NEXT: ret <2 x i8> [[R]] ; CHECK-NEXT: ret <2 x i8> [[R]]
; ;
%a = add <2 x i8> <i8 48, i8 48>, %x %a = add <2 x i8> <i8 48, i8 48>, %x
%r = and <2 x i8> <i8 -10, i8 -10>, %a %r = and <2 x i8> <i8 -10, i8 -10>, %a
ret <2 x i8> %r ret <2 x i8> %r
} }
define <2 x i8> @canonicalize_logic_first_and_vector0_nsw(<2 x i8> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_and_vector0_nsw
; CHECK-SAME: (<2 x i8> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X]], <i8 -10, i8 -10>
; CHECK-NEXT: [[R:%.*]] = add <2 x i8> [[TMP1]], <i8 48, i8 48>
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%a = add nsw <2 x i8> <i8 48, i8 48>, %x
%r = and <2 x i8> <i8 -10, i8 -10>, %a
ret <2 x i8> %r
}
define <2 x i8> @canonicalize_logic_first_and_vector0_nswnuw(<2 x i8> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_and_vector0_nswnuw
; CHECK-SAME: (<2 x i8> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X]], <i8 -10, i8 -10>
; CHECK-NEXT: [[R:%.*]] = add <2 x i8> [[TMP1]], <i8 48, i8 48>
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%a = add nsw nuw <2 x i8> <i8 48, i8 48>, %x
%r = and <2 x i8> <i8 -10, i8 -10>, %a
ret <2 x i8> %r
}
; element-wise the constants match constraints ; element-wise the constants match constraints
define <2 x i8> @canonicalize_logic_first_and_vector1(<2 x i8> %x) { define <2 x i8> @canonicalize_logic_first_and_vector1(<2 x i8> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_and_vector1 ; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_and_vector1
; CHECK-SAME: (<2 x i8> [[X:%.*]]) { ; CHECK-SAME: (<2 x i8> [[X:%.*]]) {
; CHECK-NEXT: [[A:%.*]] = add <2 x i8> [[X]], <i8 48, i8 32> ; CHECK-NEXT: [[A:%.*]] = add <2 x i8> [[X]], <i8 48, i8 32>
; CHECK-NEXT: [[R:%.*]] = and <2 x i8> [[A]], <i8 -10, i8 -4> ; CHECK-NEXT: [[R:%.*]] = and <2 x i8> [[A]], <i8 -10, i8 -4>
; CHECK-NEXT: ret <2 x i8> [[R]] ; CHECK-NEXT: ret <2 x i8> [[R]]
; ;
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; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], 96 ; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], 96
; CHECK-NEXT: ret i8 [[R]] ; CHECK-NEXT: ret i8 [[R]]
; ;
%a = add i8 %x, 96 ; 01100000 %a = add i8 %x, 96 ; 01100000
%r = xor i8 %a, 31 ; 00011111 %r = xor i8 %a, 31 ; 00011111
ret i8 %r ret i8 %r
} }
define i8 @canonicalize_logic_first_xor_0_nsw(i8 %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_xor_0_nsw
; CHECK-SAME: (i8 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], 31
; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], 96
; CHECK-NEXT: ret i8 [[R]]
;
%a = add nsw i8 %x, 96 ; 01100000
%r = xor i8 %a, 31 ; 00011111
ret i8 %r
}
define i8 @canonicalize_logic_first_xor_0_nswnuw(i8 %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_xor_0_nswnuw
; CHECK-SAME: (i8 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], 31
; CHECK-NEXT: [[R:%.*]] = add i8 [[TMP1]], 96
; CHECK-NEXT: ret i8 [[R]]
;
%a = add nsw nuw i8 %x, 96 ; 01100000
%r = xor i8 %a, 31 ; 00011111
ret i8 %r
}
define <2 x i32> @canonicalize_logic_first_xor_vector0(<2 x i32> %x) { define <2 x i32> @canonicalize_logic_first_xor_vector0(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_xor_vector0 ; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_xor_vector0
; CHECK-SAME: (<2 x i32> [[X:%.*]]) { ; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X]], <i32 32783, i32 32783> ; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X]], <i32 32783, i32 32783>
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[TMP1]], <i32 -8388608, i32 -8388608> ; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[TMP1]], <i32 -8388608, i32 -8388608>
; CHECK-NEXT: ret <2 x i32> [[R]] ; CHECK-NEXT: ret <2 x i32> [[R]]
; ;
%a = add <2 x i32> <i32 -8388608, i32 -8388608>, %x ; <0xFF800000, 0xFF800000> %a = add <2 x i32> <i32 -8388608, i32 -8388608>, %x ; <0xFF800000, 0xFF800000>
%r = xor <2 x i32> <i32 32783, i32 32783>, %a ; <0x0000800F, 0x0000800F> %r = xor <2 x i32> <i32 32783, i32 32783>, %a ; <0x0000800F, 0x0000800F>
ret <2 x i32> %r ret <2 x i32> %r
} }
; elementwise these constants do obey constraints required to canonicalize define <2 x i32> @canonicalize_logic_first_xor_vector0_nsw(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_xor_vector0_nsw
; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X]], <i32 32783, i32 32783>
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[TMP1]], <i32 -8388608, i32 -8388608>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%a = add nsw <2 x i32> <i32 -8388608, i32 -8388608>, %x ; <0xFF800000, 0xFF800000>
%r = xor <2 x i32> <i32 32783, i32 32783>, %a ; <0x0000800F, 0x0000800F>
ret <2 x i32> %r
}
define <2 x i32> @canonicalize_logic_first_xor_vector0_nswnuw(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_xor_vector0_nswnuw
; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X]], <i32 32783, i32 32783>
; CHECK-NEXT: [[R:%.*]] = add <2 x i32> [[TMP1]], <i32 -8388608, i32 -8388608>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
%a = add nsw nuw <2 x i32> <i32 -8388608, i32 -8388608>, %x ; <0xFF800000, 0xFF800000>
%r = xor <2 x i32> <i32 32783, i32 32783>, %a ; <0x0000800F, 0x0000800F>
ret <2 x i32> %r
}
define <2 x i32> @canonicalize_logic_first_xor_vector1(<2 x i32> %x) { define <2 x i32> @canonicalize_logic_first_xor_vector1(<2 x i32> %x) {
; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_xor_vector1 ; CHECK-LABEL: define {{[^@]+}}@canonicalize_logic_first_xor_vector1
; CHECK-SAME: (<2 x i32> [[X:%.*]]) { ; CHECK-SAME: (<2 x i32> [[X:%.*]]) {
; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X]], <i32 -8388608, i32 2071986176> ; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X]], <i32 -8388608, i32 2071986176>
; CHECK-NEXT: [[R:%.*]] = xor <2 x i32> [[A]], <i32 32783, i32 2063> ; CHECK-NEXT: [[R:%.*]] = xor <2 x i32> [[A]], <i32 32783, i32 2063>
; CHECK-NEXT: ret <2 x i32> [[R]] ; CHECK-NEXT: ret <2 x i32> [[R]]
; ;
%a = add <2 x i32> <i32 -8388608, i32 2071986176>, %x ; <0xFF800000, 0x7B800000> %a = add <2 x i32> <i32 -8388608, i32 2071986176>, %x ; <0xFF800000, 0x7B800000>
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