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Differential D147517

[NFC][AArch64] Add Test for PR61549
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Authored by lenary on Apr 4 2023, 3:47 AM.

Details

Reviewers
lenary
RKSimon
Commits
rGb3a4dbfd8a33: [NFC][AArch64] Add Test for PR61549

Diff Detail

Unit TestsFailed

TimeTest
180 msx64 debian > LLVM.CodeGen/AArch64/GlobalISel::legalizer-info-validation.mir
60,070 msx64 debian > MLIR.Examples/standalone::test.toy

Event Timeline

lenary created this revision.Apr 4 2023, 3:47 AM
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Herald added a subscriber: kristof.beyls. · View Herald Transcript
lenary requested review of this revision.Apr 4 2023, 3:47 AM
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lenary added a child revision: D147518: [DAGCombiner] Fix (shl (ctlz x) n) for non-power-of-two Data.Apr 4 2023, 3:47 AM
Harbormaster completed remote builds in B223534: Diff 510739.Apr 4 2023, 4:45 AM
lenary added a subscriber: RKSimon.Apr 4 2023, 9:58 AM

Self-approving as @RKSimon approved the main case this is shown as fixing.

lenary accepted this revision.Apr 4 2023, 9:58 AM
This revision is now accepted and ready to land.Apr 4 2023, 9:58 AM
RKSimon accepted this revision.Apr 4 2023, 10:03 AM

LGTM

lenary updated this revision to Diff 511049.Apr 5 2023, 4:39 AM
lenary edited the summary of this revision. (Show Details)
Harbormaster completed remote builds in B223759: Diff 511049.Apr 5 2023, 5:09 AM
This revision was landed with ongoing or failed builds.Apr 12 2023, 9:39 AM
Closed by commit rGb3a4dbfd8a33: [NFC][AArch64] Add Test for PR61549 (authored by Archibald Elliott <archibald.elliott@arm.com>). · Explain Why
This revision was automatically updated to reflect the committed changes.
lenary added a commit: rGb3a4dbfd8a33: [NFC][AArch64] Add Test for PR61549.

Revision Contents

PathSize
llvm/
test/
CodeGen/
AArch64/
32 lines

Diff 511049

llvm/test/CodeGen/AArch64/pr61549.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64 | FileCheck %s
; RUN: llc < %s -mtriple=aarch64 --global-isel | FileCheck %s --check-prefix=GISEL
define i35 @f(i35 %0) {
; CHECK-LABEL: f:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: sbfx x9, x0, #0, #35
; CHECK-NEXT: sdiv x10, x8, x9
; CHECK-NEXT: msub x8, x10, x9, x8
; CHECK-NEXT: eor x0, x8, #0x1
; CHECK-NEXT: ret
;
; GISEL-LABEL: f:
; GISEL: // %bb.0:
; GISEL-NEXT: mov w8, #1 // =0x1
; GISEL-NEXT: sbfx x9, x0, #0, #35
; GISEL-NEXT: sdiv x10, x8, x9
; GISEL-NEXT: msub x8, x10, x9, x8
; GISEL-NEXT: and x8, x8, #0x7ffffffff
; GISEL-NEXT: clz x8, x8
; GISEL-NEXT: sub x8, x8, #29
; GISEL-NEXT: ubfx x0, x8, #5, #30
; GISEL-NEXT: ret
%2 = srem i35 1, %0
%3 = call i35 @llvm.ctlz.i35(i35 %2, i1 false)
%4 = lshr i35 %3, 5
ret i35 %4
}
declare i35 @llvm.ctlz.i35(i35, i1 immarg)