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Differential D147107

[InstCombine] Add test cases for `(rem (shl Y, X), (shl Z, X))`; NFC
ClosedPublic

Authored by goldstein.w.n on Mar 28 2023, 9:01 PM.

Details

Reviewers
nikic
spatel
sdesmalen
majnemer
Commits
rG19fc5e8208b6: [InstCombine] Add test cases for `(rem (shl Y, X), (shl Z, X))`; NFC

Diff Detail

Unit TestsFailed

TimeTest
60,040 msx64 debian > MLIR.Examples/standalone::test.toy

Event Timeline

goldstein.w.n created this revision.Mar 28 2023, 9:01 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 28 2023, 9:01 PM
goldstein.w.n requested review of this revision.Mar 28 2023, 9:01 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 28 2023, 9:01 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
Harbormaster completed remote builds in B222400: Diff 509205.Mar 28 2023, 9:02 PM
goldstein.w.n added a parent revision: D147108: [InstCombine] Add transforms for `(rem (shl Y, X), (shl Z, X))`.Mar 28 2023, 9:02 PM
goldstein.w.n added a child revision: D144225: [InstCombine] Add constant combines for `(urem/srem (shl X, Y), (shl X, Z))`.
goldstein.w.n added reviewers: nikic, spatel, sdesmalen, majnemer.
Herald added a subscriber: StephenFan. · View Herald TranscriptMar 28 2023, 9:03 PM
goldstein.w.n removed a child revision: D144225: [InstCombine] Add constant combines for `(urem/srem (shl X, Y), (shl X, Z))`.Mar 28 2023, 9:04 PM
goldstein.w.n removed a parent revision: D147108: [InstCombine] Add transforms for `(rem (shl Y, X), (shl Z, X))`.
goldstein.w.n added a parent revision: D144225: [InstCombine] Add constant combines for `(urem/srem (shl X, Y), (shl X, Z))`.
goldstein.w.n added a child revision: D147108: [InstCombine] Add transforms for `(rem (shl Y, X), (shl Z, X))`.
goldstein.w.n mentioned this in D144225: [InstCombine] Add constant combines for `(urem/srem (shl X, Y), (shl X, Z))`.Mar 28 2023, 9:06 PM
goldstein.w.n updated this revision to Diff 515201.Apr 19 2023, 8:31 PM

Rebase

Harbormaster completed remote builds in B226779: Diff 515201.Apr 19 2023, 9:15 PM
sdesmalen accepted this revision.May 15 2023, 3:26 AM
This revision is now accepted and ready to land.May 15 2023, 3:26 AM
goldstein.w.n updated this revision to Diff 522306.May 15 2023, 12:58 PM

Rebase

Harbormaster completed remote builds in B232091: Diff 522306.May 15 2023, 2:14 PM
This revision was landed with ongoing or failed builds.Jul 6 2023, 12:47 PM
Closed by commit rG19fc5e8208b6: [InstCombine] Add test cases for `(rem (shl Y, X), (shl Z, X))`; NFC (authored by goldstein.w.n). · Explain Why
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rG19fc5e8208b6: [InstCombine] Add test cases for `(rem (shl Y, X), (shl Z, X))`; NFC.

Revision Contents

PathSize
llvm/
test/
Transforms/
InstCombine/
39 lines

Diff 522306

llvm/test/Transforms/InstCombine/rem-mul-shl.ll

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret i8 0 ; CHECK-NEXT: ret i8 0
; ;
%BO0 = mul nuw i8 %X, 15 %BO0 = mul nuw i8 %X, 15
%BO1 = mul i8 %X, 5 %BO1 = mul i8 %X, 5
%r = urem i8 %BO0, %BO1 %r = urem i8 %BO0, %BO1
ret i8 %r ret i8 %r
} }
define i8 @urem_XY_XZ_with_CY_rem_CZ_eq_0_with_shl(i8 %X) {
; CHECK-LABEL: @urem_XY_XZ_with_CY_rem_CZ_eq_0_with_shl(
; CHECK-NEXT: [[BO0:%.*]] = shl nuw i8 15, [[X:%.*]]
; CHECK-NEXT: [[BO1:%.*]] = shl i8 5, [[X]]
; CHECK-NEXT: [[R:%.*]] = urem i8 [[BO0]], [[BO1]]
; CHECK-NEXT: ret i8 [[R]]
;
%BO0 = shl nuw i8 15, %X
%BO1 = shl i8 5, %X
%r = urem i8 %BO0, %BO1
ret i8 %r
}
define i8 @urem_XY_XZ_with_CY_rem_CZ_eq_0_fail_missing_flag(i8 %X) { define i8 @urem_XY_XZ_with_CY_rem_CZ_eq_0_fail_missing_flag(i8 %X) {
; CHECK-LABEL: @urem_XY_XZ_with_CY_rem_CZ_eq_0_fail_missing_flag( ; CHECK-LABEL: @urem_XY_XZ_with_CY_rem_CZ_eq_0_fail_missing_flag(
; CHECK-NEXT: [[BO0:%.*]] = mul nsw i8 [[X:%.*]], 15 ; CHECK-NEXT: [[BO0:%.*]] = mul nsw i8 [[X:%.*]], 15
; CHECK-NEXT: [[BO1:%.*]] = mul nuw nsw i8 [[X]], 5 ; CHECK-NEXT: [[BO1:%.*]] = mul nuw nsw i8 [[X]], 5
; CHECK-NEXT: [[R:%.*]] = urem i8 [[BO0]], [[BO1]] ; CHECK-NEXT: [[R:%.*]] = urem i8 [[BO0]], [[BO1]]
; CHECK-NEXT: ret i8 [[R]] ; CHECK-NEXT: ret i8 [[R]]
; ;
%BO0 = mul nsw i8 %X, 15 %BO0 = mul nsw i8 %X, 15
%BO1 = mul nsw nuw i8 %X, 5 %BO1 = mul nsw nuw i8 %X, 5
%r = urem i8 %BO0, %BO1 %r = urem i8 %BO0, %BO1
ret i8 %r ret i8 %r
} }
define i8 @urem_XY_XZ_with_CY_lt_CZ(i8 %X) { define i8 @urem_XY_XZ_with_CY_lt_CZ(i8 %X) {
; CHECK-LABEL: @urem_XY_XZ_with_CY_lt_CZ( ; CHECK-LABEL: @urem_XY_XZ_with_CY_lt_CZ(
; CHECK-NEXT: [[R:%.*]] = mul nuw i8 [[X:%.*]], 3 ; CHECK-NEXT: [[R:%.*]] = mul nuw i8 [[X:%.*]], 3
; CHECK-NEXT: ret i8 [[R]] ; CHECK-NEXT: ret i8 [[R]]
; ;
%BO0 = mul i8 %X, 3 %BO0 = mul i8 %X, 3
%BO1 = mul nuw i8 %X, 12 %BO1 = mul nuw i8 %X, 12
%r = urem i8 %BO0, %BO1 %r = urem i8 %BO0, %BO1
ret i8 %r ret i8 %r
} }
define i8 @urem_XY_XZ_with_CY_lt_CZ_with_shl(i8 %X) {
; CHECK-LABEL: @urem_XY_XZ_with_CY_lt_CZ_with_shl(
; CHECK-NEXT: [[BO0:%.*]] = shl i8 3, [[X:%.*]]
; CHECK-NEXT: [[BO1:%.*]] = shl nuw i8 12, [[X]]
; CHECK-NEXT: [[R:%.*]] = urem i8 [[BO0]], [[BO1]]
; CHECK-NEXT: ret i8 [[R]]
;
%BO0 = shl i8 3, %X
%BO1 = shl nuw i8 12, %X
%r = urem i8 %BO0, %BO1
ret i8 %r
}
define <2 x i8> @urem_XY_XZ_with_CY_lt_CZ_with_nsw_out(<2 x i8> %X) { define <2 x i8> @urem_XY_XZ_with_CY_lt_CZ_with_nsw_out(<2 x i8> %X) {
; CHECK-LABEL: @urem_XY_XZ_with_CY_lt_CZ_with_nsw_out( ; CHECK-LABEL: @urem_XY_XZ_with_CY_lt_CZ_with_nsw_out(
; CHECK-NEXT: [[R:%.*]] = shl nuw nsw <2 x i8> [[X:%.*]], <i8 2, i8 2> ; CHECK-NEXT: [[R:%.*]] = shl nuw nsw <2 x i8> [[X:%.*]], <i8 2, i8 2>
; CHECK-NEXT: ret <2 x i8> [[R]] ; CHECK-NEXT: ret <2 x i8> [[R]]
; ;
%BO0 = shl nsw <2 x i8> %X, <i8 2, i8 2> %BO0 = shl nsw <2 x i8> %X, <i8 2, i8 2>
%BO1 = mul nuw <2 x i8> %X, <i8 12, i8 12> %BO1 = mul nuw <2 x i8> %X, <i8 12, i8 12>
%r = urem <2 x i8> %BO0, %BO1 %r = urem <2 x i8> %BO0, %BO1
▲ Show 20 Lines • Show All 192 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret i8 [[R]] ; CHECK-NEXT: ret i8 [[R]]
; ;
%BO0 = mul nuw i8 %X, 5 %BO0 = mul nuw i8 %X, 5
%BO1 = mul nsw i8 %X, 15 %BO1 = mul nsw i8 %X, 15
%r = srem i8 %BO0, %BO1 %r = srem i8 %BO0, %BO1
ret i8 %r ret i8 %r
} }
define <2 x i8> @srem_XY_XZ_with_CY_lt_CZ_with_nuw_out_with_shl(<2 x i8> %X) {
; CHECK-LABEL: @srem_XY_XZ_with_CY_lt_CZ_with_nuw_out_with_shl(
; CHECK-NEXT: [[BO0:%.*]] = shl nuw <2 x i8> <i8 3, i8 3>, [[X:%.*]]
; CHECK-NEXT: [[BO1:%.*]] = shl nsw <2 x i8> <i8 15, i8 15>, [[X]]
; CHECK-NEXT: [[R:%.*]] = srem <2 x i8> [[BO0]], [[BO1]]
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%BO0 = shl nuw <2 x i8> <i8 3, i8 3>, %X
%BO1 = shl nsw <2 x i8> <i8 15, i8 15>, %X
%r = srem <2 x i8> %BO0, %BO1
ret <2 x i8> %r
}
define i8 @srem_XY_XZ_with_CY_lt_CZ_no_nsw_out(i8 %X) { define i8 @srem_XY_XZ_with_CY_lt_CZ_no_nsw_out(i8 %X) {
; CHECK-LABEL: @srem_XY_XZ_with_CY_lt_CZ_no_nsw_out( ; CHECK-LABEL: @srem_XY_XZ_with_CY_lt_CZ_no_nsw_out(
; CHECK-NEXT: [[R:%.*]] = mul nsw i8 [[X:%.*]], 5 ; CHECK-NEXT: [[R:%.*]] = mul nsw i8 [[X:%.*]], 5
; CHECK-NEXT: ret i8 [[R]] ; CHECK-NEXT: ret i8 [[R]]
; ;
%BO0 = mul nsw i8 %X, 5 %BO0 = mul nsw i8 %X, 5
%BO1 = shl nsw nuw i8 %X, 4 %BO1 = shl nsw nuw i8 %X, 4
%r = srem i8 %BO0, %BO1 %r = srem i8 %BO0, %BO1
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