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Differential D146489

[X86] Create extra prolog/epilog for stack realignment [part 2]
ClosedPublic

Authored by LuoYuanke on Mar 20 2023, 6:11 PM.

Details

Reviewers
pengfei
Commits
rG614c63bec6d6: [X86] Create extra prolog/epilog for stack realignment [part 2]
Summary

This patch is to support D145650 for elf target as well.

Diff Detail

Event Timeline

LuoYuanke created this revision.Mar 20 2023, 6:11 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 20 2023, 6:11 PM
Herald added subscribers: pengfei, hiraditya. · View Herald Transcript
LuoYuanke requested review of this revision.Mar 20 2023, 6:11 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 20 2023, 6:11 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
LuoYuanke added a reviewer: pengfei.Mar 20 2023, 6:11 PM
Harbormaster completed remote builds in B220602: Diff 506812.Mar 20 2023, 6:53 PM
pengfei accepted this revision.Mar 20 2023, 7:59 PM

LGTM.

This revision is now accepted and ready to land.Mar 20 2023, 7:59 PM
Closed by commit rG614c63bec6d6: [X86] Create extra prolog/epilog for stack realignment [part 2] (authored by LuoYuanke). · Explain WhyMar 20 2023, 10:52 PM
This revision was automatically updated to reflect the committed changes.
LuoYuanke added a commit: rG614c63bec6d6: [X86] Create extra prolog/epilog for stack realignment [part 2].
LuoYuanke added a reverting change: rG3e2d4e85d347: Revert "[X86] Create extra prolog/epilog for stack realignment [part 2]".Mar 21 2023, 5:14 AM

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
2 lines
test/
CodeGen/
X86/
1 line

Diff 506812

llvm/lib/Target/X86/X86ArgumentStackSlotRebase.cpp

Show First 20 Lines • Show All 108 Lines • ▼ Show 20 Linesbool X86ArgumentStackSlotPass::runOnMachineFunction(MachineFunction &MF) {
const X86RegisterInfo *TRI = STI.getRegisterInfo(); const X86RegisterInfo *TRI = STI.getRegisterInfo();
const X86InstrInfo *TII = STI.getInstrInfo(); const X86InstrInfo *TII = STI.getInstrInfo();
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
bool Changed = false; bool Changed = false;
if (F.hasFnAttribute(Attribute::Naked)) if (F.hasFnAttribute(Attribute::Naked))
return false; return false;
// Only support Linux // Only support Linux
if (!STI.isTargetLinux()) if (!STI.isTargetLinux() && !STI.isTargetELF())
return false; return false;
if (!TRI->hasBasePointer(MF)) if (!TRI->hasBasePointer(MF))
return false; return false;
Register BasePtr = TRI->getBaseRegister(); Register BasePtr = TRI->getBaseRegister();
auto IsBaseRegisterClobbered = [&]() { auto IsBaseRegisterClobbered = [&]() {
for (MachineBasicBlock &MBB : MF) { for (MachineBasicBlock &MBB : MF) {
for (MachineInstr &MI : MBB) { for (MachineInstr &MI : MBB) {
▲ Show 20 Lines • Show All 70 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/i386-baseptr.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=i386-pc-linux -stackrealign < %s | FileCheck %s ; RUN: llc -mtriple=i386-pc-linux -stackrealign < %s | FileCheck %s
; RUN: llc -mtriple=i386-pc-none-elf -stackrealign < %s | FileCheck %s
declare i32 @helper() nounwind declare i32 @helper() nounwind
define void @base() #0 { define void @base() #0 {
; CHECK-LABEL: base: ; CHECK-LABEL: base:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %ebp ; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .cfi_offset %ebp, -8 ; CHECK-NEXT: .cfi_offset %ebp, -8
▲ Show 20 Lines • Show All 134 Lines • Show Last 20 Lines