[X86] Use llvm::Align for passing the alignment

[pengfei]

Summary

This should be a typo in emitConstantSizeRepmov. Both its caller and
callee store the alignment in a 64-bit variables, no reason to truncate
it to 32-bit. It results in alignment turns into 0 when larger than
0x100000000.

Fixes #61348

[RKSimon]

llvm/lib/Target/X86/X86SelectionDAGInfo.cpp

207

Can we use llvm::Align instead?

[pengfei]

Address review comment.

[RKSimon]

LGTM - but please add the PR61348 test case as well

llvm/lib/Target/X86/X86SelectionDAGInfo.cpp

185

Probably worth converting this to Align Alignment as well?

[pengfei]

Convert one more uint64_t Align into Align Alignment.

In D145863#4188386, @RKSimon wrote:

LGTM - but please add the PR61348 test case as well

I hesitate to add PR61348 test case for 3 reasons,

1. Changing unsigned/uint64_t to Align is purely an NFC. No tests required;
2. The origin problem can be reproduced only in assertion mode. But it doesn't make much sense to add a REQUIRES: asserts for it;
3. The IR shouldn't generate such a large alignment. It's not reliable to test something based on it;

Let me know if you still think we should add the test case.

[RKSimon]

We have enough examples of tests with `REQUIRES: asserts``` in llvm-project\llvm\test\CodeGen\X86 that I don't think its unusual

[pengfei]

Add test case.

[RKSimon]

LGTM - cheers

llvm/lib/Target/X86/X86SelectionDAGInfo.cpp

static SDValue emitRepmovsB(const X86Subtarget &Subtarget, SelectionDAG &DAG,
                             const SDLoc &dl, SDValue Chain, SDValue Dst,
                             SDValue Src, uint64_t Size) {
   return emitRepmovs(Subtarget, DAG, dl, Chain, Dst, Src,
                      DAG.getIntPtrConstant(Size, dl), MVT::i8);
 }
 
 /// Returns the best type to use with repmovs depending on alignment.
 static MVT getOptimalRepmovsType(const X86Subtarget &Subtarget,
                                  uint64_t Align) {
   assert((Align != 0) && "Align is normalized");
   assert(isPowerOf2_64(Align) && "Align is a power of 2");
   switch (Align) {
   case 1:
     return MVT::i8;
   case 2:
     return MVT::i16;
   case 4:
     return MVT::i32;
   default:
     return Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
   }
 }
 
 /// Returns a REP MOVS instruction, possibly with a few load/stores to implement
 /// a constant size memory copy. In some cases where we know REP MOVS is
 /// inefficient we return an empty SDValue so the calling code can either
 /// generate a load/store sequence or call the runtime memcpy function.
 static SDValue emitConstantSizeRepmov(
     SelectionDAG &DAG, const X86Subtarget &Subtarget, const SDLoc &dl,
     SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, EVT SizeVT,
-    unsigned Align, bool isVolatile, bool AlwaysInline,
+    uint64_t Align, bool isVolatile, bool AlwaysInline,
     MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) {
 
   /// TODO: Revisit next line: big copy with ERMSB on march >= haswell are very
   /// efficient.
   if (!AlwaysInline && Size > Subtarget.getMaxInlineSizeThreshold())
     return SDValue();
 
   /// If we have enhanced repmovs we use it.