[X86] Make `(shift X (xor/sub N-1, Y))` -> `(shift X, (not Y))` check for one use.

[goldstein.w.n]

Summary

(xor/sub N-1, Y) -> (not Y) is minorly preferable (especially for
(sub N-1, Y) where it saves an instruction), but isn't worth
potentially creating an extra instruction for.

So, only do the transformation if (xor/sub N-1, Y) has one use.

[RKSimon]

llvm/test/CodeGen/X86/pr61038.ll

1–2

You might be able to get away with a common CHECK-X64-BMI2 to replace the SKX and V4 prefixes

[goldstein.w.n]

Fix common prefix

[goldstein.w.n]

Rebase

llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

if (ShiftAmt->getOpcode() == ISD::ADD || ShiftAmt->getOpcode() == ISD::SUB ||
     SDValue Add1 = ShiftAmt->getOperand(1);
     auto *Add0C = dyn_cast<ConstantSDNode>(Add0);
     auto *Add1C = dyn_cast<ConstantSDNode>(Add1);
     // If we are shifting by X+/-/^N where N == 0 mod Size, then just shift by X
     // to avoid the ADD/SUB/XOR.
     if (Add1C && Add1C->getAPIntValue().urem(Size) == 0) {
       NewShiftAmt = Add0;
 
-    } else if (ShiftAmt->getOpcode() != ISD::ADD &&
+    } else if (ShiftAmt->getOpcode() != ISD::ADD && ShiftAmt.hasOneUse() &&
                ((Add0C && Add0C->getAPIntValue().urem(Size) == Size - 1) ||
                 (Add1C && Add1C->getAPIntValue().urem(Size) == Size - 1))) {
       // If we are doing a NOT on just the lower bits with (Size*N-1) -/^ X
       // we can replace it with a NOT. In the XOR case it may save some code
       // size, in the SUB case it also may save a move.
       assert(Add0C == nullptr || Add1C == nullptr);
 
       // We can only do N-X, not X-N

llvm/test/CodeGen/X86/pr61038.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefix=CHECK-BMI2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefix=CHECK-BMI2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=CHECK-BMI
 
 declare i32 @llvm.cttz.i32(i32, i1 immarg)
 define void @test_61038(ptr %tmp_buffer) {
 ; CHECK-BMI2-LABEL: test_61038:
 ; CHECK-BMI2:       # %bb.0: # %entry
 ; CHECK-BMI2-NEXT:    tzcntl %eax, %eax
 ; CHECK-BMI2-NEXT:    movabsq $8589934591, %rcx # imm = 0x1FFFFFFFF
-; CHECK-BMI2-NEXT:    movq $-1, %rdx
+; CHECK-BMI2-NEXT:    movq %rcx, %rdx
 ; CHECK-BMI2-NEXT:    btcq %rax, %rdx
-; CHECK-BMI2-NEXT:    shrxq %rdx, %rcx, %rdx
-; CHECK-BMI2-NEXT:    btcq %rax, %rcx
 ; CHECK-BMI2-NEXT:    xorl %eax, %eax
-; CHECK-BMI2-NEXT:    cmpq $64, %rcx
-; CHECK-BMI2-NEXT:    cmovael %eax, %edx
-; CHECK-BMI2-NEXT:    movl %edx, (%rdi)
+; CHECK-BMI2-NEXT:    cmpq $64, %rdx
+; CHECK-BMI2-NEXT:    shrxq %rdx, %rcx, %rcx
+; CHECK-BMI2-NEXT:    cmovael %eax, %ecx
+; CHECK-BMI2-NEXT:    movl %ecx, (%rdi)
 ; CHECK-BMI2-NEXT:    retq
 ;
 ; CHECK-BMI-LABEL: test_61038:
 ; CHECK-BMI:       # %bb.0: # %entry
 ; CHECK-BMI-NEXT:    tzcntl %eax, %eax
 ; CHECK-BMI-NEXT:    movabsq $8589934591, %rdx # imm = 0x1FFFFFFFF
-; CHECK-BMI-NEXT:    movq %rdx, %rsi
-; CHECK-BMI-NEXT:    btcq %rax, %rsi
-; CHECK-BMI-NEXT:    movq $-1, %rcx
+; CHECK-BMI-NEXT:    movq %rdx, %rcx
 ; CHECK-BMI-NEXT:    btcq %rax, %rcx
-; CHECK-BMI-NEXT:    # kill: def $cl killed $cl killed $rcx
 ; CHECK-BMI-NEXT:    shrq %cl, %rdx
 ; CHECK-BMI-NEXT:    xorl %eax, %eax
-; CHECK-BMI-NEXT:    cmpq $64, %rsi
+; CHECK-BMI-NEXT:    cmpq $64, %rcx
 ; CHECK-BMI-NEXT:    cmovael %eax, %edx
 ; CHECK-BMI-NEXT:    movl %edx, (%rdi)
 ; CHECK-BMI-NEXT:    retq
 entry:
   %0 = tail call i32 @llvm.cttz.i32(i32 poison, i1 false)
   %1 = zext i32 %0 to i64
   %2 = shl nuw nsw i64 1, %1
   %3 = xor i64 %2, 8589934591
   %4 = icmp ugt i64 %3, 63
   %x11.op.i = lshr i64 8589934591, %3
   %5 = trunc i64 %x11.op.i to i32
   %6 = select i1 %4, i32 0, i32 %5
   store i32 %6, ptr %tmp_buffer, align 4
   ret void
 }