[LoongArch] Emit bytepick for picking from concatenation of two values

[xen0n]

Summary

It seems the ISA manual's pseudo-code description for the
BYTEPICK.[WD] instructions is inaccurate; the behavior described here
should be correct though. The instructions' names are misleading too
(they pick full GRLen-wide words instead of bytes; they just index by
bytes) but let's stick to the official names for now.

[xen0n]

@xry111: BTW your GCC implementation of this pattern looks for *arithmetic* right shifts; do you mean logical instead? Because obviously the higher bits would be full of ones after shifting if rj happen to have its MSB set. The sign extension shall happen *after* the pick.

[xen0n]

Self note: the pattern may need more love, because the signext i32 cases appear wrong on LA64.

[xen0n]

In D143880#4121913, @xen0n wrote:

@xry111: BTW your GCC implementation of this pattern looks for *arithmetic* right shifts; do you mean logical instead? Because obviously the higher bits would be full of ones after shifting if rj happen to have its MSB set. The sign extension shall happen *after* the pick.

My bad, I'm not familiar with GCC RTL patterns so I've mistakenly thought "lshiftrt could be some 'left' shift, so ashift must be an arithmetic right shift". Actually your pattern is correct as you have perfect test coverage. Please ignore my comment...

[xry111]

In D143880#4122602, @xen0n wrote:

In D143880#4121913, @xen0n wrote:

@xry111: BTW your GCC implementation of this pattern looks for *arithmetic* right shifts; do you mean logical instead? Because obviously the higher bits would be full of ones after shifting if rj happen to have its MSB set. The sign extension shall happen *after* the pick.

My bad, I'm not familiar with GCC RTL patterns so I've mistakenly thought "lshiftrt could be some 'left' shift, so ashift must be an arithmetic right shift". Actually your pattern is correct as you have perfect test coverage. Please ignore my comment...

Yes, the naming in GCC confused me as well :).

[xen0n]

Fix the pattern for bstrpick.w on LA64.

[xen0n]

update other affected tests

[SixWeining]

LGTM. Thanks!

Yes, I think the ISA's pseudo-code description is incorrect. Maybe it shoud be:

bytepick.w:

  tmp = {GR[rk][31:0],  GR[rj][31:0]}

  GR[rd] = SignExtend(tmp[8×(8-sa2)-1:8×(4-sa2)], GRLEN)

  or

  GR[rd] = SignExtend(tmp[8×(4-sa2)+31:8×(4-sa2)], GRLEN)

llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

 def : PatGprGpr<udiv, DIV_WU>;
 def : PatGprGpr<srem, MOD_W>;
 def : PatGprGpr<urem, MOD_WU>;
 def : PatGprGpr<mul, MUL_W>;
 def : PatGprGpr<mulhs, MULH_W>;
 def : PatGprGpr<mulhu, MULH_WU>;
 def : PatGprGpr<rotr, ROTR_W>;
 def : PatGprImm<rotr, ROTRI_W, uimm5>;
+
+foreach Idx = 1...3 in {
+  defvar ShamtA = !mul(8, Idx);
+  defvar ShamtB = !mul(8, !sub(4, Idx));
+  def : Pat<(or (shl GPR:$rk, (i32 ShamtA)), (srl GPR:$rj, (i32 ShamtB))),
+            (BYTEPICK_W GPR:$rj, GPR:$rk, Idx)>;
+}
 } // Predicates = [IsLA32]
 
 let Predicates = [IsLA64] in {
 def : PatGprGpr<add, ADD_D>;
 def : PatGprGpr_32<add, ADD_W>;
 def : PatGprImm<add, ADDI_D, simm12>;
 def : PatGprImm_32<add, ADDI_W, simm12>;
 def : PatGprGpr<sub, SUB_D>;

 // multiplication.
 def : Pat<(i64 (mul (sext_inreg GPR:$rj, i32), (sext_inreg GPR:$rk, i32))),
           (MULW_D_W GPR:$rj, GPR:$rk)>;
 // Select MULW_D_WU for calculating the full 64 bits product of i32xi32
 // unsigned multiplication.
 def : Pat<(i64 (mul (loongarch_bstrpick GPR:$rj, (i64 31), (i64 0)),
                     (loongarch_bstrpick GPR:$rk, (i64 31), (i64 0)))),
           (MULW_D_WU GPR:$rj, GPR:$rk)>;
+
+foreach Idx = 1...7 in {
+  defvar ShamtA = !mul(8, Idx);
+  defvar ShamtB = !mul(8, !sub(8, Idx));
+  def : Pat<(or (shl GPR:$rk, (i64 ShamtA)), (srl GPR:$rj, (i64 ShamtB))),
+            (BYTEPICK_D GPR:$rj, GPR:$rk, Idx)>;
+}
+
+foreach Idx = 1...3 in {
+  defvar ShamtA = !mul(8, Idx);
+  defvar ShamtB = !mul(8, !sub(4, Idx));
+  // NOTE: the srl node would already be transformed into a loongarch_bstrpick
+  // by the time this pattern gets to execute, hence the weird construction.
+  def : Pat<(sext_inreg (or (shl GPR:$rk, (i64 ShamtA)),
+                            (loongarch_bstrpick GPR:$rj, (i64 31),
+                                                         (i64 ShamtB))), i32),
+            (BYTEPICK_W GPR:$rj, GPR:$rk, Idx)>;
+}
 } // Predicates = [IsLA64]
 
 def : PatGprGpr<and, AND>;
 def : PatGprImm<and, ANDI, uimm12>;
 def : PatGprGpr<or, OR>;
 def : PatGprImm<or, ORI, uimm12>;
 def : PatGprGpr<xor, XOR>;
 def : PatGprImm<xor, XORI, uimm12>;

llvm/test/CodeGen/LoongArch/bitreverse.ll

 ; LA64-NEXT:    ret
   %tmp = call i24 @llvm.bitreverse.i24(i24 %a)
   ret i24 %tmp
 }
 
 define i48 @test_bitreverse_i48(i48 %a) nounwind {
 ; LA32-LABEL: test_bitreverse_i48:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    bitrev.w $a1, $a1
-; LA32-NEXT:    srli.w $a1, $a1, 16
 ; LA32-NEXT:    bitrev.w $a2, $a0
-; LA32-NEXT:    slli.w $a0, $a2, 16
-; LA32-NEXT:    or $a0, $a1, $a0
+; LA32-NEXT:    bitrev.w $a0, $a1
+; LA32-NEXT:    bytepick.w $a0, $a0, $a2, 2
 ; LA32-NEXT:    srli.w $a1, $a2, 16
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: test_bitreverse_i48:
 ; LA64:       # %bb.0:
 ; LA64-NEXT:    bitrev.d $a0, $a0
 ; LA64-NEXT:    srli.d $a0, $a0, 16
 ; LA64-NEXT:    ret

llvm/test/CodeGen/LoongArch/bswap.ll

; LA64-NEXT:    ret
   ret i64 %tmp
 }
 
 ;; Bswap on non-native integer widths.
 
 define i48 @test_bswap_i48(i48 %a) nounwind {
 ; LA32-LABEL: test_bswap_i48:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    revb.2h $a1, $a1
-; LA32-NEXT:    rotri.w $a1, $a1, 16
-; LA32-NEXT:    srli.w $a1, $a1, 16
 ; LA32-NEXT:    revb.2h $a0, $a0
 ; LA32-NEXT:    rotri.w $a2, $a0, 16
-; LA32-NEXT:    slli.w $a0, $a2, 16
-; LA32-NEXT:    or $a0, $a1, $a0
+; LA32-NEXT:    revb.2h $a0, $a1
+; LA32-NEXT:    rotri.w $a0, $a0, 16
+; LA32-NEXT:    bytepick.w $a0, $a0, $a2, 2
 ; LA32-NEXT:    srli.w $a1, $a2, 16
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: test_bswap_i48:
 ; LA64:       # %bb.0:
 ; LA64-NEXT:    revb.d $a0, $a0
 ; LA64-NEXT:    srli.d $a0, $a0, 16
 ; LA64-NEXT:    ret
   %tmp = call i48 @llvm.bswap.i48(i48 %a)
   ret i48 %tmp
 }
 
 define i80 @test_bswap_i80(i80 %a) nounwind {
 ; LA32-LABEL: test_bswap_i80:
 ; LA32:       # %bb.0:
 ; LA32-NEXT:    ld.w $a2, $a1, 0
 ; LA32-NEXT:    revb.2h $a2, $a2
 ; LA32-NEXT:    rotri.w $a2, $a2, 16
 ; LA32-NEXT:    ld.w $a3, $a1, 4
 ; LA32-NEXT:    revb.2h $a3, $a3
 ; LA32-NEXT:    rotri.w $a3, $a3, 16
-; LA32-NEXT:    srli.w $a4, $a3, 16
-; LA32-NEXT:    slli.w $a5, $a2, 16
-; LA32-NEXT:    or $a4, $a5, $a4
-; LA32-NEXT:    srli.w $a2, $a2, 16
-; LA32-NEXT:    st.h $a2, $a0, 8
+; LA32-NEXT:    bytepick.w $a4, $a3, $a2, 2
 ; LA32-NEXT:    st.w $a4, $a0, 4
-; LA32-NEXT:    slli.w $a2, $a3, 16
 ; LA32-NEXT:    ld.w $a1, $a1, 8
 ; LA32-NEXT:    revb.2h $a1, $a1
 ; LA32-NEXT:    rotri.w $a1, $a1, 16
-; LA32-NEXT:    srli.w $a1, $a1, 16
-; LA32-NEXT:    or $a1, $a1, $a2
+; LA32-NEXT:    bytepick.w $a1, $a1, $a3, 2
 ; LA32-NEXT:    st.w $a1, $a0, 0
+; LA32-NEXT:    srli.w $a1, $a2, 16
+; LA32-NEXT:    st.h $a1, $a0, 8
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: test_bswap_i80:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    revb.d $a1, $a1
-; LA64-NEXT:    srli.d $a1, $a1, 48
 ; LA64-NEXT:    revb.d $a2, $a0
-; LA64-NEXT:    slli.d $a0, $a2, 16
-; LA64-NEXT:    or $a0, $a1, $a0
+; LA64-NEXT:    revb.d $a0, $a1
+; LA64-NEXT:    bytepick.d $a0, $a0, $a2, 2
 ; LA64-NEXT:    srli.d $a1, $a2, 48
 ; LA64-NEXT:    ret
   %tmp = call i80 @llvm.bswap.i80(i80 %a)
   ret i80 %tmp
 }
 
 define i128 @test_bswap_i128(i128 %a) nounwind {
 ; LA32-LABEL: test_bswap_i128:

llvm/test/CodeGen/LoongArch/bytepick.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc --mtriple=loongarch32 --verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s --check-prefix=LA32
 ; RUN: llc --mtriple=loongarch64 --verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s --check-prefix=LA64
 
 ;; a=00112233 b=44556677
 ;; expected 11223344
 define i32 @pick_i32_1(i32 %a, i32 %b) {
 ; LA32-LABEL: pick_i32_1:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    slli.w $a0, $a0, 8
-; LA32-NEXT:    srli.w $a1, $a1, 24
-; LA32-NEXT:    or $a0, $a1, $a0
+; LA32-NEXT:    bytepick.w $a0, $a1, $a0, 1
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i32_1:
 ; LA64:       # %bb.0:
 ; LA64-NEXT:    slli.d $a0, $a0, 8
 ; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 24
 ; LA64-NEXT:    or $a0, $a1, $a0
 ; LA64-NEXT:    ret
   %1 = lshr i32 %b, 24
   %2 = shl i32 %a, 8
   %3 = or i32 %1, %2
   ret i32 %3
 }
 
 ;; a=00112233 b=44556677
 ;; expected 11223344
 define signext i32 @pick_i32_1_sext(i32 %a, i32 %b) {
 ; LA32-LABEL: pick_i32_1_sext:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    slli.w $a0, $a0, 8
-; LA32-NEXT:    srli.w $a1, $a1, 24
-; LA32-NEXT:    or $a0, $a1, $a0
+; LA32-NEXT:    bytepick.w $a0, $a1, $a0, 1
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i32_1_sext:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 8
-; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 24
-; LA64-NEXT:    or $a0, $a1, $a0
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    bytepick.w $a0, $a1, $a0, 1
 ; LA64-NEXT:    ret
   %1 = lshr i32 %b, 24
   %2 = shl i32 %a, 8
   %3 = or i32 %1, %2
   ret i32 %3
 }
 
 ;; a=00112233 b=44556677
 ;; expected 22334455
 define i32 @pick_i32_2(i32 %a, i32 %b) {
 ; LA32-LABEL: pick_i32_2:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    slli.w $a0, $a0, 16
-; LA32-NEXT:    srli.w $a1, $a1, 16
-; LA32-NEXT:    or $a0, $a1, $a0
+; LA32-NEXT:    bytepick.w $a0, $a1, $a0, 2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i32_2:
 ; LA64:       # %bb.0:
 ; LA64-NEXT:    slli.d $a0, $a0, 16
 ; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 16
 ; LA64-NEXT:    or $a0, $a1, $a0
 ; LA64-NEXT:    ret
   %1 = lshr i32 %b, 16
   %2 = shl i32 %a, 16
   %3 = or i32 %1, %2
   ret i32 %3
 }
 
 ;; a=00112233 b=44556677
 ;; expected 22334455
 define signext i32 @pick_i32_2_sext(i32 %a, i32 %b) {
 ; LA32-LABEL: pick_i32_2_sext:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    slli.w $a0, $a0, 16
-; LA32-NEXT:    srli.w $a1, $a1, 16
-; LA32-NEXT:    or $a0, $a1, $a0
+; LA32-NEXT:    bytepick.w $a0, $a1, $a0, 2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i32_2_sext:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 16
-; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 16
-; LA64-NEXT:    or $a0, $a1, $a0
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    bytepick.w $a0, $a1, $a0, 2
 ; LA64-NEXT:    ret
   %1 = lshr i32 %b, 16
   %2 = shl i32 %a, 16
   %3 = or i32 %1, %2
   ret i32 %3
 }
 
 ;; a=00112233 b=44556677
 ;; expected 33445566
 define i32 @pick_i32_3(i32 %a, i32 %b) {
 ; LA32-LABEL: pick_i32_3:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    slli.w $a0, $a0, 24
-; LA32-NEXT:    srli.w $a1, $a1, 8
-; LA32-NEXT:    or $a0, $a1, $a0
+; LA32-NEXT:    bytepick.w $a0, $a1, $a0, 3
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i32_3:
 ; LA64:       # %bb.0:
 ; LA64-NEXT:    slli.d $a0, $a0, 24
 ; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 8
 ; LA64-NEXT:    or $a0, $a1, $a0
 ; LA64-NEXT:    ret
   %1 = lshr i32 %b, 8
   %2 = shl i32 %a, 24
   %3 = or i32 %1, %2
   ret i32 %3
 }
 
 ;; a=00112233 b=44556677
 ;; expected 33445566
 define signext i32 @pick_i32_3_sext(i32 %a, i32 %b) {
 ; LA32-LABEL: pick_i32_3_sext:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    slli.w $a0, $a0, 24
-; LA32-NEXT:    srli.w $a1, $a1, 8
-; LA32-NEXT:    or $a0, $a1, $a0
+; LA32-NEXT:    bytepick.w $a0, $a1, $a0, 3
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i32_3_sext:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 24
-; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 8
-; LA64-NEXT:    or $a0, $a1, $a0
-; LA64-NEXT:    addi.w $a0, $a0, 0
+; LA64-NEXT:    bytepick.w $a0, $a1, $a0, 3
 ; LA64-NEXT:    ret
   %1 = lshr i32 %b, 8
   %2 = shl i32 %a, 24
   %3 = or i32 %1, %2
   ret i32 %3
 }
 
 ;; a=0011223344556677 b=8899aabbccddeeff
 ;; expected 1122334455667788
 define i64 @pick_i64_1(i64 %a, i64 %b) {
 ; LA32-LABEL: pick_i64_1:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    srli.w $a2, $a3, 24
-; LA32-NEXT:    slli.w $a3, $a0, 8
-; LA32-NEXT:    or $a2, $a2, $a3
-; LA32-NEXT:    srli.w $a0, $a0, 24
-; LA32-NEXT:    slli.w $a1, $a1, 8
-; LA32-NEXT:    or $a1, $a1, $a0
+; LA32-NEXT:    bytepick.w $a2, $a3, $a0, 1
+; LA32-NEXT:    bytepick.w $a1, $a0, $a1, 1
 ; LA32-NEXT:    move $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i64_1:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 8
-; LA64-NEXT:    srli.d $a1, $a1, 56
-; LA64-NEXT:    or $a0, $a1, $a0
+; LA64-NEXT:    bytepick.d $a0, $a1, $a0, 1
 ; LA64-NEXT:    ret
   %1 = lshr i64 %b, 56
   %2 = shl i64 %a, 8
   %3 = or i64 %1, %2
   ret i64 %3
 }
 
 ;; a=0011223344556677 b=8899aabbccddeeff
 ;; expected 2233445566778899
 define i64 @pick_i64_2(i64 %a, i64 %b) {
 ; LA32-LABEL: pick_i64_2:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    srli.w $a2, $a3, 16
-; LA32-NEXT:    slli.w $a3, $a0, 16
-; LA32-NEXT:    or $a2, $a2, $a3
-; LA32-NEXT:    srli.w $a0, $a0, 16
-; LA32-NEXT:    slli.w $a1, $a1, 16
-; LA32-NEXT:    or $a1, $a1, $a0
+; LA32-NEXT:    bytepick.w $a2, $a3, $a0, 2
+; LA32-NEXT:    bytepick.w $a1, $a0, $a1, 2
 ; LA32-NEXT:    move $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i64_2:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 16
-; LA64-NEXT:    srli.d $a1, $a1, 48
-; LA64-NEXT:    or $a0, $a1, $a0
+; LA64-NEXT:    bytepick.d $a0, $a1, $a0, 2
 ; LA64-NEXT:    ret
   %1 = lshr i64 %b, 48
   %2 = shl i64 %a, 16
   %3 = or i64 %1, %2
   ret i64 %3
 }
 
 ;; a=0011223344556677 b=8899aabbccddeeff
 ;; expected 33445566778899aa
 define i64 @pick_i64_3(i64 %a, i64 %b) {
 ; LA32-LABEL: pick_i64_3:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    srli.w $a2, $a3, 8
-; LA32-NEXT:    slli.w $a3, $a0, 24
-; LA32-NEXT:    or $a2, $a2, $a3
-; LA32-NEXT:    srli.w $a0, $a0, 8
-; LA32-NEXT:    slli.w $a1, $a1, 24
-; LA32-NEXT:    or $a1, $a1, $a0
+; LA32-NEXT:    bytepick.w $a2, $a3, $a0, 3
+; LA32-NEXT:    bytepick.w $a1, $a0, $a1, 3
 ; LA32-NEXT:    move $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i64_3:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 24
-; LA64-NEXT:    srli.d $a1, $a1, 40
-; LA64-NEXT:    or $a0, $a1, $a0
+; LA64-NEXT:    bytepick.d $a0, $a1, $a0, 3
 ; LA64-NEXT:    ret
   %1 = lshr i64 %b, 40
   %2 = shl i64 %a, 24
   %3 = or i64 %1, %2
   ret i64 %3
 }
 
 ;; a=0011223344556677 b=8899aabbccddeeff
 ;; expected 445566778899aabb
 define i64 @pick_i64_4(i64 %a, i64 %b) {
 ; LA32-LABEL: pick_i64_4:
 ; LA32:       # %bb.0:
 ; LA32-NEXT:    move $a1, $a0
 ; LA32-NEXT:    move $a0, $a3
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i64_4:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 32
-; LA64-NEXT:    srli.d $a1, $a1, 32
-; LA64-NEXT:    or $a0, $a1, $a0
+; LA64-NEXT:    bytepick.d $a0, $a1, $a0, 4
 ; LA64-NEXT:    ret
   %1 = lshr i64 %b, 32
   %2 = shl i64 %a, 32
   %3 = or i64 %1, %2
   ret i64 %3
 }
 
 ;; a=0011223344556677 b=8899aabbccddeeff
 ;; expected 5566778899aabbcc
 define i64 @pick_i64_5(i64 %a, i64 %b) {
 ; LA32-LABEL: pick_i64_5:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    srli.w $a1, $a2, 24
-; LA32-NEXT:    slli.w $a2, $a3, 8
-; LA32-NEXT:    or $a2, $a1, $a2
-; LA32-NEXT:    slli.w $a0, $a0, 8
-; LA32-NEXT:    srli.w $a1, $a3, 24
-; LA32-NEXT:    or $a1, $a1, $a0
+; LA32-NEXT:    bytepick.w $a2, $a2, $a3, 1
+; LA32-NEXT:    bytepick.w $a1, $a3, $a0, 1
 ; LA32-NEXT:    move $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i64_5:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 40
-; LA64-NEXT:    srli.d $a1, $a1, 24
-; LA64-NEXT:    or $a0, $a1, $a0
+; LA64-NEXT:    bytepick.d $a0, $a1, $a0, 5
 ; LA64-NEXT:    ret
   %1 = lshr i64 %b, 24
   %2 = shl i64 %a,40
   %3 = or i64 %1, %2
   ret i64 %3
 }
 
 ;; a=0011223344556677 b=8899aabbccddeeff
 ;; expected 66778899aabbccdd
 define i64 @pick_i64_6(i64 %a, i64 %b) {
 ; LA32-LABEL: pick_i64_6:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    srli.w $a1, $a2, 16
-; LA32-NEXT:    slli.w $a2, $a3, 16
-; LA32-NEXT:    or $a2, $a1, $a2
-; LA32-NEXT:    slli.w $a0, $a0, 16
-; LA32-NEXT:    srli.w $a1, $a3, 16
-; LA32-NEXT:    or $a1, $a1, $a0
+; LA32-NEXT:    bytepick.w $a2, $a2, $a3, 2
+; LA32-NEXT:    bytepick.w $a1, $a3, $a0, 2
 ; LA32-NEXT:    move $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i64_6:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 48
-; LA64-NEXT:    srli.d $a1, $a1, 16
-; LA64-NEXT:    or $a0, $a1, $a0
+; LA64-NEXT:    bytepick.d $a0, $a1, $a0, 6
 ; LA64-NEXT:    ret
   %1 = lshr i64 %b, 16
   %2 = shl i64 %a, 48
   %3 = or i64 %1, %2
   ret i64 %3
 }
 
 ;; a=0011223344556677 b=8899aabbccddeeff
 ;; expected 778899aabbccddee
 define i64 @pick_i64_7(i64 %a, i64 %b) {
 ; LA32-LABEL: pick_i64_7:
 ; LA32:       # %bb.0:
-; LA32-NEXT:    srli.w $a1, $a2, 8
-; LA32-NEXT:    slli.w $a2, $a3, 24
-; LA32-NEXT:    or $a2, $a1, $a2
-; LA32-NEXT:    slli.w $a0, $a0, 24
-; LA32-NEXT:    srli.w $a1, $a3, 8
-; LA32-NEXT:    or $a1, $a1, $a0
+; LA32-NEXT:    bytepick.w $a2, $a2, $a3, 3
+; LA32-NEXT:    bytepick.w $a1, $a3, $a0, 3
 ; LA32-NEXT:    move $a0, $a2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: pick_i64_7:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a0, $a0, 56
-; LA64-NEXT:    srli.d $a1, $a1, 8
-; LA64-NEXT:    or $a0, $a1, $a0
+; LA64-NEXT:    bytepick.d $a0, $a1, $a0, 7
 ; LA64-NEXT:    ret
   %1 = lshr i64 %b, 8
   %2 = shl i64 %a, 56
   %3 = or i64 %1, %2
   ret i64 %3
 }