[llvm][test] restrict 2 GVN tests to just test GVN (NFC)

[nickdesaulniers]

llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll

6

Q: isn't %i8 based on gep ptr %i, 1 while %i3 is based on get ptr %i, 2? Aren't those different addresses? Or is it because it's a 16b load (so the two adjacent 8bits)?

[nickdesaulniers]

llvm/test/Transforms/NewGVN/no_speculative_loads_with_asan.ll

19–20

I think these two instructions show that this whole test is kind of pointless IMO.

It's a copy of llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll, but using newgvn rather than gvn (unless I messed something up by converting this from -O3.

The @TestNoAsan case is the same as the @TestAsan case, so it just shows that NewGVN cannot elide redundant non-local loads. Am I understanding correctly?

[nikic]

llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll

6

%i8 is an out of bounds load which can be folded to poison (which then allows eliding the phi).

llvm/test/Transforms/NewGVN/no_speculative_loads_with_asan.ll

19–20

Yes, load folding in NewGVN is incomplete. Your new test it fine (the previous one was broken, because it did not actually test newgvn).

[nickdesaulniers]

• update comment in test as per @nikic

[nikic]

LG

llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -O3 -S %s | FileCheck %s
+; RUN: opt -passes=gvn -S %s | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 declare noalias ptr @_Znam(i64) #1
 
+; Load of %i8 is an out of bounds load, which is folded to poison, which allows
+; us to elide the phi.
 define i32 @TestNoAsan() {
 ; CHECK-LABEL: @TestNoAsan(
 ; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[I:%.*]] = tail call noalias ptr @_Znam(i64 2)
+; CHECK-NEXT:    [[I1:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 1
+; CHECK-NEXT:    store i8 0, ptr [[I1]], align 1
+; CHECK-NEXT:    store i8 0, ptr [[I]], align 1
+; CHECK-NEXT:    [[I3:%.*]] = load i16, ptr [[I]], align 4
+; CHECK-NEXT:    [[I4:%.*]] = icmp eq i16 [[I3]], 0
+; CHECK-NEXT:    br i1 [[I4]], label [[BB10:%.*]], label [[BB5:%.*]]
+; CHECK:       bb5:
+; CHECK-NEXT:    [[I6:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 2
+; CHECK-NEXT:    br label [[BB10]]
+; CHECK:       bb10:
 ; CHECK-NEXT:    ret i32 0
 ;
 bb:
   %i = tail call noalias ptr @_Znam(i64 2)
   %i1 = getelementptr inbounds i8, ptr %i, i64 1
   store i8 0, ptr %i1, align 1
   store i8 0, ptr %i, align 1
   %i3 = load i16, ptr %i, align 4

 bb10:                                             ; preds = %bb5, %bb
   %i11 = phi i32 [ %i9, %bb5 ], [ 0, %bb ]
   ret i32 %i11
 }
 
 define i32 @TestAsan() sanitize_address {
 ; CHECK-LABEL: @TestAsan(
 ; CHECK-NEXT:  bb:
-; CHECK-NEXT:    [[I:%.*]] = tail call noalias dereferenceable_or_null(2) ptr @_Znam(i64 2)
+; CHECK-NEXT:    [[I:%.*]] = tail call noalias ptr @_Znam(i64 2)
 ; CHECK-NEXT:    [[I1:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 1
 ; CHECK-NEXT:    store i8 0, ptr [[I1]], align 1
 ; CHECK-NEXT:    store i8 0, ptr [[I]], align 1
 ; CHECK-NEXT:    [[I3:%.*]] = load i16, ptr [[I]], align 4
 ; CHECK-NEXT:    [[I4:%.*]] = icmp eq i16 [[I3]], 0
 ; CHECK-NEXT:    br i1 [[I4]], label [[BB10:%.*]], label [[BB5:%.*]]
 ; CHECK:       bb5:
 ; CHECK-NEXT:    [[I6:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 2

 bb10:                                             ; preds = %bb5, %bb
   %i11 = phi i32 [ %i9, %bb5 ], [ 0, %bb ]
   ret i32 %i11
 }
 
 define i32 @TestHWAsan() sanitize_hwaddress {
 ; CHECK-LABEL: @TestHWAsan(
 ; CHECK-NEXT:  bb:
-; CHECK-NEXT:    [[I:%.*]] = tail call noalias dereferenceable_or_null(2) ptr @_Znam(i64 2)
+; CHECK-NEXT:    [[I:%.*]] = tail call noalias ptr @_Znam(i64 2)
 ; CHECK-NEXT:    [[I1:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 1
 ; CHECK-NEXT:    store i8 0, ptr [[I1]], align 1
 ; CHECK-NEXT:    store i8 0, ptr [[I]], align 1
 ; CHECK-NEXT:    [[I3:%.*]] = load i16, ptr [[I]], align 4
 ; CHECK-NEXT:    [[I4:%.*]] = icmp eq i16 [[I3]], 0
 ; CHECK-NEXT:    br i1 [[I4]], label [[BB10:%.*]], label [[BB5:%.*]]
 ; CHECK:       bb5:
 ; CHECK-NEXT:    [[I6:%.*]] = getelementptr inbounds i8, ptr [[I]], i64 2

llvm/test/Transforms/NewGVN/no_speculative_loads_with_asan.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -opaque-pointers=0 -O3 -S %s | FileCheck %s
+; RUN: opt -opaque-pointers=0 -passes=newgvn -S %s | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 declare noalias i8* @_Znam(i64) #1
 
 define i32 @TestNoAsan() {
 ; CHECK-LABEL: @TestNoAsan(
-; CHECK-NEXT:    ret i32 0
+; CHECK-NEXT:    [[TMP1:%.*]] = tail call noalias i8* @_Znam(i64 2)
+; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 1
+; CHECK-NEXT:    store i8 0, i8* [[TMP2]], align 1
+; CHECK-NEXT:    store i8 0, i8* [[TMP1]], align 1
+; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i16*
+; CHECK-NEXT:    [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4
+; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i16 [[TMP4]], 0
+; CHECK-NEXT:    br i1 [[TMP5]], label [[TMP11:%.*]], label [[TMP6:%.*]]
+; CHECK:       6:
+; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 2
+; CHECK-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16*
+; CHECK-NEXT:    [[TMP9:%.*]] = load i16, i16* [[TMP8]], align 2
+; CHECK-NEXT:    [[TMP10:%.*]] = sext i16 [[TMP9]] to i32
+; CHECK-NEXT:    br label [[TMP11]]
+; CHECK:       11:
+; CHECK-NEXT:    [[TMP12:%.*]] = phi i32 [ [[TMP10]], [[TMP6]] ], [ 0, [[TMP0:%.*]] ]
+; CHECK-NEXT:    ret i32 [[TMP12]]
 ;
   %1 = tail call noalias i8* @_Znam(i64 2)
   %2 = getelementptr inbounds i8, i8* %1, i64 1
   store i8 0, i8* %2, align 1
   store i8 0, i8* %1, align 1
   %3 = bitcast i8* %1 to i16*
   %4 = load i16, i16* %3, align 4
   %5 = icmp eq i16 %4, 0
   br i1 %5, label %11, label %6
 
 ; <label>:6                                       ; preds = %0
   %7 = getelementptr inbounds i8, i8* %1, i64 2
   %8 = bitcast i8* %7 to i16*
   %9 = load i16, i16* %8, align 2
   %10 = sext i16 %9 to i32
   br label %11
 
 ; <label>:11                                      ; preds = %0, %6
   %12 = phi i32 [ %10, %6 ], [ 0, %0 ]
   ret i32 %12
 }
 
 define i32 @TestAsan() sanitize_address {
 ; CHECK-LABEL: @TestAsan(
-; CHECK-NEXT:    [[TMP1:%.*]] = tail call noalias dereferenceable_or_null(2) i8* @_Znam(i64 2)
+; CHECK-NEXT:    [[TMP1:%.*]] = tail call noalias i8* @_Znam(i64 2)
 ; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 1
 ; CHECK-NEXT:    store i8 0, i8* [[TMP2]], align 1
 ; CHECK-NEXT:    store i8 0, i8* [[TMP1]], align 1
 ; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i16*
 ; CHECK-NEXT:    [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4
 ; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i16 [[TMP4]], 0
 ; CHECK-NEXT:    br i1 [[TMP5]], label [[TMP11:%.*]], label [[TMP6:%.*]]
 ; CHECK:       6:

 
 ; <label>:11                                      ; preds = %0, %6
   %12 = phi i32 [ %10, %6 ], [ 0, %0 ]
   ret i32 %12
 }
 
 define i32 @TestHWAsan() sanitize_hwaddress {
 ; CHECK-LABEL: @TestHWAsan(
-; CHECK-NEXT:    [[TMP1:%.*]] = tail call noalias dereferenceable_or_null(2) i8* @_Znam(i64 2)
+; CHECK-NEXT:    [[TMP1:%.*]] = tail call noalias i8* @_Znam(i64 2)
 ; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 1
 ; CHECK-NEXT:    store i8 0, i8* [[TMP2]], align 1
 ; CHECK-NEXT:    store i8 0, i8* [[TMP1]], align 1
 ; CHECK-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP1]] to i16*
 ; CHECK-NEXT:    [[TMP4:%.*]] = load i16, i16* [[TMP3]], align 4
 ; CHECK-NEXT:    [[TMP5:%.*]] = icmp eq i16 [[TMP4]], 0
 ; CHECK-NEXT:    br i1 [[TMP5]], label [[TMP11:%.*]], label [[TMP6:%.*]]
 ; CHECK:       6: