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[AArch64] Handle extract_subvector(..., 0) in ISel.

Authored by chatur01 on Oct 30 2015, 9:31 AM.



Lowering this pattern early to an EXTRACT_SUBREG was making it impossible to match larger patterns in tblgen that use extract_subvector(..., 0) as part of the their input pattern.

It seems like there will exist somewhere a better way of specifying this pattern over all relevant register value types, but I didn't manage to find it.

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chatur01 retitled this revision from to [AArch64] Handle extract_subvector(..., 0) in ISel..
chatur01 updated this object.
chatur01 added a reviewer: t.p.northover.
chatur01 set the repository for this revision to rL LLVM.
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jmolloy accepted this revision.Nov 9 2015, 3:49 AM
jmolloy edited edge metadata.

Hi Charlie,

This looks totally reasonable to me. I also know you've thrown all the testing we've got at it, so LGTM.


This revision is now accepted and ready to land.Nov 9 2015, 3:49 AM
chatur01 closed this revision.Nov 9 2015, 4:47 AM