[AArch64] Handle extract_subvector(..., 0) in ISel.
Lowering this pattern early to an EXTRACT_SUBREG was making it impossible to match larger patterns in tblgen that use extract_subvector(..., 0) as part of the their input pattern.
It seems like there will exist somewhere a better way of specifying this pattern over all relevant register value types, but I didn't manage to find it.
Reviewers: t.p.northover, jmolloy
Subscribers: aemerson, llvm-commits, rengolin
Differential Revision: http://reviews.llvm.org/D14207