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Differential D140414

[PowerPC] Implement P10 Byte Reverse Insructions
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Authored by lei on Dec 20 2022, 9:10 AM.

Details

Reviewers
stefanp
nemanjai
power-llvm-team
Commits
rG7a7e9109a2d6: [PowerPC] Implement P10 Byte Reverse Insructions
Summary

Generate brh, brw and brd instructions for byte-swap operations
on P10 and generating a single instruction for a 32-bit swap followed
by a 16-bit right shift.

Diff Detail

Event Timeline

lei created this revision.Dec 20 2022, 9:10 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 20 2022, 9:10 AM
Herald added subscribers: shchenz, hiraditya. · View Herald Transcript
lei requested review of this revision.Dec 20 2022, 9:10 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 20 2022, 9:10 AM
Harbormaster completed remote builds in B204184: Diff 484297.Dec 20 2022, 11:27 AM
lei updated this revision to Diff 484346.Dec 20 2022, 12:01 PM

fix test doc wording

Harbormaster completed remote builds in B204215: Diff 484346.Dec 20 2022, 1:10 PM
stefanp accepted this revision.Dec 20 2022, 6:47 PM

LGTM

This revision is now accepted and ready to land.Dec 20 2022, 6:47 PM
Closed by commit rG7a7e9109a2d6: [PowerPC] Implement P10 Byte Reverse Insructions (authored by lei). · Explain WhyDec 21 2022, 7:16 AM
This revision was automatically updated to reflect the committed changes.
lei added a commit: rG7a7e9109a2d6: [PowerPC] Implement P10 Byte Reverse Insructions.

Revision Contents
Changeset List

PathSize
llvm/
lib/
Target/
PowerPC/
3 lines
12 lines
19 lines
15 lines
test/
CodeGen/
PowerPC/
137 lines
MC/
Disassembler/
PowerPC/
9 lines
PowerPC/
9 lines

Diff 484574

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llvm/lib/Target/PowerPC/P10InstrResources.td

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llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

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llvm/lib/Target/PowerPC/PPCISelLowering.cpp

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llvm/lib/Target/PowerPC/PPCInstrP10.td

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llvm/test/CodeGen/PowerPC/p10-bswap.ll

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llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt

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llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s

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