[LoongArch] Specify registers used for exception handling

[SixWeining]

Summary

See definition in backend D134709 and the doc [1] for more detail.

With the benefit of this change, most libcxx and libcxxabi tests pass.

[1]: https://llvm.org/docs/ExceptionHandling.html

[xen0n]

Trivial enough ($a0 and $a1 respectively, same as RISCV and Mips). Thanks for the quick fixing!

[SixWeining]

Add clang test.

[wangleiat]

LGTM

clang/lib/Basic/Targets/LoongArch.h

public:
   BuiltinVaListKind getBuiltinVaListKind() const override {
     return TargetInfo::VoidPtrBuiltinVaList;
   }
 
   const char *getClobbers() const override { return ""; }
 
   ArrayRef<const char *> getGCCRegNames() const override;
 
+  int getEHDataRegisterNumber(unsigned RegNo) const override {
+    if (RegNo == 0)
+      return 4;
+    if (RegNo == 1)
+      return 5;
+    return -1;
+  }
+
   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
 
   bool validateAsmConstraint(const char *&Name,
                              TargetInfo::ConstraintInfo &Info) const override;
   std::string convertConstraint(const char *&Constraint) const override;
 
   bool hasBitIntType() const override { return true; }
 

clang/test/CodeGen/builtins-loongarch.c

+// RUN: %clang_cc1 -Wall -Wno-unused-but-set-variable -Werror -triple loongarch32 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
+// RUN: %clang_cc1 -Wall -Wno-unused-but-set-variable -Werror -triple loongarch64 -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
+
+void test_eh_return_data_regno(void) {
+  // CHECK: store volatile i32 4
+  // CHECK: store volatile i32 5
+  volatile int res;
+  res = __builtin_eh_return_data_regno(0);
+  res = __builtin_eh_return_data_regno(1);
+}