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Differential D138497

[AArch64] Add Host identifiers for cortex-a55, cortex-a510, cortex-a710 and cortex-x2.
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Authored by dmgreen on Nov 22 2022, 6:40 AM.

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Reviewers
lenary
stuij
mubashar_
Commits
rG7fefa9944515: [AArch64] Add Host identifiers for cortex-a55, cortex-a510, cortex-a710 and…
Summary

I noticed these were missing, so this adds Host identifiers for cortex-a55, cortex-a510, cortex-a710 and cortex-x2, taken from their respective TRMs.

Diff Detail

Event Timeline

dmgreen created this revision.Nov 22 2022, 6:40 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 22 2022, 6:40 AM
Herald added subscribers: hiraditya, kristof.beyls. · View Herald Transcript
dmgreen requested review of this revision.Nov 22 2022, 6:40 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 22 2022, 6:40 AM
lenary accepted this revision.Nov 22 2022, 7:23 AM
This revision is now accepted and ready to land.Nov 22 2022, 7:23 AM
Harbormaster completed remote builds in B198970: Diff 477174.Nov 22 2022, 7:39 AM
Closed by commit rG7fefa9944515: [AArch64] Add Host identifiers for cortex-a55, cortex-a510, cortex-a710 and… (authored by dmgreen). · Explain WhyNov 23 2022, 4:11 AM
This revision was automatically updated to reflect the committed changes.
dmgreen added a commit: rG7fefa9944515: [AArch64] Add Host identifiers for cortex-a55, cortex-a510, cortex-a710 and….

Revision Contents

PathSize
llvm/
lib/
Support/
4 lines
unittests/
Support/
12 lines

Diff 477449

llvm/lib/Support/Host.cpp

Show First 20 Lines • Show All 200 Lines • ▼ Show 20 Lines return StringSwitch<const char *>(Part)
.Case("0xc0f", "cortex-a15") .Case("0xc0f", "cortex-a15")
.Case("0xc20", "cortex-m0") .Case("0xc20", "cortex-m0")
.Case("0xc23", "cortex-m3") .Case("0xc23", "cortex-m3")
.Case("0xc24", "cortex-m4") .Case("0xc24", "cortex-m4")
.Case("0xd22", "cortex-m55") .Case("0xd22", "cortex-m55")
.Case("0xd02", "cortex-a34") .Case("0xd02", "cortex-a34")
.Case("0xd04", "cortex-a35") .Case("0xd04", "cortex-a35")
.Case("0xd03", "cortex-a53") .Case("0xd03", "cortex-a53")
.Case("0xd05", "cortex-a55")
.Case("0xd46", "cortex-a510")
.Case("0xd07", "cortex-a57") .Case("0xd07", "cortex-a57")
.Case("0xd08", "cortex-a72") .Case("0xd08", "cortex-a72")
.Case("0xd09", "cortex-a73") .Case("0xd09", "cortex-a73")
.Case("0xd0a", "cortex-a75") .Case("0xd0a", "cortex-a75")
.Case("0xd0b", "cortex-a76") .Case("0xd0b", "cortex-a76")
.Case("0xd0d", "cortex-a77") .Case("0xd0d", "cortex-a77")
.Case("0xd41", "cortex-a78") .Case("0xd41", "cortex-a78")
.Case("0xd47", "cortex-a710")
.Case("0xd4d", "cortex-a715") .Case("0xd4d", "cortex-a715")
.Case("0xd44", "cortex-x1") .Case("0xd44", "cortex-x1")
.Case("0xd4c", "cortex-x1c") .Case("0xd4c", "cortex-x1c")
.Case("0xd48", "cortex-x2")
.Case("0xd4e", "cortex-x3") .Case("0xd4e", "cortex-x3")
.Case("0xd0c", "neoverse-n1") .Case("0xd0c", "neoverse-n1")
.Case("0xd49", "neoverse-n2") .Case("0xd49", "neoverse-n2")
.Case("0xd40", "neoverse-v1") .Case("0xd40", "neoverse-v1")
.Case("0xd4f", "neoverse-v2") .Case("0xd4f", "neoverse-v2")
.Default("generic"); .Default("generic");
} }
▲ Show 20 Lines • Show All 1,739 Lines • Show Last 20 Lines

llvm/unittests/Support/Host.cpp

Show First 20 Lines • Show All 100 Lines • ▼ Show 20 Lines EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
"CPU part : 0x06f"), "CPU part : 0x06f"),
"krait"); "krait");
} }
TEST(getLinuxHostCPUName, AArch64) { TEST(getLinuxHostCPUName, AArch64) {
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
"CPU part : 0xd03"), "CPU part : 0xd03"),
"cortex-a53"); "cortex-a53");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
"CPU part : 0xd05"),
"cortex-a55");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
"CPU part : 0xd40"), "CPU part : 0xd40"),
"neoverse-v1"); "neoverse-v1");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
"CPU part : 0xd0c"), "CPU part : 0xd0c"),
"neoverse-n1"); "neoverse-n1");
// Verify that both CPU implementer and CPU part are checked: // Verify that both CPU implementer and CPU part are checked:
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n"
"CPU part : 0xd03"), "CPU part : 0xd03"),
"generic"); "generic");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
"CPU part : 0x201"), "CPU part : 0x201"),
"kryo"); "kryo");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
"CPU part : 0x800"), "CPU part : 0x800"),
"cortex-a73"); "cortex-a73");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
"CPU part : 0x801"), "CPU part : 0x801"),
"cortex-a73"); "cortex-a73");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
"CPU part : 0xd46"),
"cortex-a510");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
"CPU part : 0xd47"),
"cortex-a710");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
"CPU part : 0xd48"),
"cortex-x2");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
"CPU part : 0xc00"), "CPU part : 0xc00"),
"falkor"); "falkor");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
"CPU part : 0xc01"), "CPU part : 0xc01"),
"saphira"); "saphira");
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n" EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n"
▲ Show 20 Lines • Show All 421 Lines • Show Last 20 Lines