WebAssembly: fix load/store syntax

[jfb]

Summary

The syntax has changed a bit recently.

[jfb]

@binji looked over and said lgtm in meat-space. I assume meat-space lgtm applies to cyber-space.

[binji]

lgtm

lib/Target/WebAssembly/WebAssemblyInstrMemory.td

 //  - WebAssemblyTargetLowering having to do with atomics
 //  - Each has optional alignment and immediate byte offset.
 
 // WebAssembly has i8/i16/i32/i64/f32/f64 memory types, but doesn't have i8/i16
 // local types. These memory-only types instead zero- or sign-extend into local
 // types when loading, and truncate when storing.
 
 // Basic load.
-def LOAD_I32_ : I<(outs I32:$dst), (ins I32:$addr),
-                  [(set I32:$dst, (load I32:$addr))]>;
-def LOAD_I64_ : I<(outs I64:$dst), (ins I32:$addr),
-                  [(set I64:$dst, (load I32:$addr))]>;
-def LOAD_F32_ : I<(outs F32:$dst), (ins I32:$addr),
-                  [(set F32:$dst, (load I32:$addr))]>;
-def LOAD_F64_ : I<(outs F64:$dst), (ins I32:$addr),
-                  [(set F64:$dst, (load I32:$addr))]>;
+def LOAD_I32 : I<(outs I32:$dst), (ins I32:$addr),
+def LOAD_I64 : I<(outs I64:$dst), (ins I32:$addr),
+def LOAD_F32 : I<(outs F32:$dst), (ins I32:$addr),
+def LOAD_F64 : I<(outs F64:$dst), (ins I32:$addr),
 
 // Extending load.
-def LOAD_S_i8_I32_  : I<(outs I32:$dst), (ins I32:$addr),
-                        [(set I32:$dst, (sextloadi8 I32:$addr))]>;
-def LOAD_U_i8_I32_  : I<(outs I32:$dst), (ins I32:$addr),
-                        [(set I32:$dst, (zextloadi8 I32:$addr))]>;
-def LOAD_S_i16_I32_ : I<(outs I32:$dst), (ins I32:$addr),
-                        [(set I32:$dst, (sextloadi16 I32:$addr))]>;
-def LOAD_U_i16_I32_ : I<(outs I32:$dst), (ins I32:$addr),
-                        [(set I32:$dst, (zextloadi16 I32:$addr))]>;
-def LOAD_S_i8_I64_  : I<(outs I64:$dst), (ins I32:$addr),
-                        [(set I64:$dst, (sextloadi8 I32:$addr))]>;
-def LOAD_U_i8_I64_  : I<(outs I64:$dst), (ins I32:$addr),
-                        [(set I64:$dst, (zextloadi8 I32:$addr))]>;
-def LOAD_S_i16_I64_ : I<(outs I64:$dst), (ins I32:$addr),
-                        [(set I64:$dst, (sextloadi16 I32:$addr))]>;
-def LOAD_U_i16_I64_ : I<(outs I64:$dst), (ins I32:$addr),
-                        [(set I64:$dst, (zextloadi16 I32:$addr))]>;
-def LOAD_S_I32_I64_ : I<(outs I64:$dst), (ins I32:$addr),
-                        [(set I64:$dst, (sextloadi32 I32:$addr))]>;
-def LOAD_U_I32_I64_ : I<(outs I64:$dst), (ins I32:$addr),
-                        [(set I64:$dst, (zextloadi32 I32:$addr))]>;
+def LOAD8_S_I32  : I<(outs I32:$dst), (ins I32:$addr),
+def LOAD8_U_I32  : I<(outs I32:$dst), (ins I32:$addr),
+def LOAD16_S_I32 : I<(outs I32:$dst), (ins I32:$addr),
+def LOAD16_U_I32 : I<(outs I32:$dst), (ins I32:$addr),
+def LOAD8_S_I64  : I<(outs I64:$dst), (ins I32:$addr),
+def LOAD8_U_I64  : I<(outs I64:$dst), (ins I32:$addr),
+def LOAD16_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
+def LOAD16_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
+def LOAD32_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
+def LOAD32_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
 
 // "Don't care" extending load become zero-extending load.
-def : Pat<(i32 (extloadi8 I32:$addr)),  (LOAD_U_i8_I32_ $addr)>;
-def : Pat<(i32 (extloadi16 I32:$addr)), (LOAD_U_i16_I32_ $addr)>;
-def : Pat<(i64 (extloadi8 I32:$addr)),  (LOAD_U_i8_I64_ $addr)>;
-def : Pat<(i64 (extloadi16 I32:$addr)), (LOAD_U_i16_I64_ $addr)>;
-def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD_U_I32_I64_ $addr)>;
+def : Pat<(i32 (extloadi8 I32:$addr)),  (LOAD8_U_I32 $addr)>;
+def : Pat<(i32 (extloadi16 I32:$addr)), (LOAD16_U_I32 $addr)>;
+def : Pat<(i64 (extloadi8 I32:$addr)),  (LOAD8_U_I64 $addr)>;
+def : Pat<(i64 (extloadi16 I32:$addr)), (LOAD16_U_I64 $addr)>;
+def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD32_U_I64 $addr)>;
 
 // Basic store.
 // Note: WebAssembly inverts SelectionDAG's usual operand order.
-def STORE_I32_  : I<(outs), (ins I32:$addr, I32:$val),
-                    [(store i32:$val, I32:$addr)]>;
-def STORE_I64_  : I<(outs), (ins I32:$addr, I64:$val),
-                    [(store i64:$val, I32:$addr)]>;
-def STORE_F32_  : I<(outs), (ins I32:$addr, F32:$val),
-                    [(store f32:$val, I32:$addr)]>;
-def STORE_F64_  : I<(outs), (ins I32:$addr, F64:$val),
-                    [(store f64:$val, I32:$addr)]>;
+def STORE_I32  : I<(outs), (ins I32:$addr, I32:$val),
+def STORE_I64  : I<(outs), (ins I32:$addr, I64:$val),
+def STORE_F32  : I<(outs), (ins I32:$addr, F32:$val),
+def STORE_F64  : I<(outs), (ins I32:$addr, F64:$val),
 
 // Truncating store.
-def STORE_i8_I32  : I<(outs), (ins I32:$addr, I32:$val),
-                      [(truncstorei8 I32:$val, I32:$addr)]>;
-def STORE_i16_I32 : I<(outs), (ins I32:$addr, I32:$val),
-                      [(truncstorei16 I32:$val, I32:$addr)]>;
-def STORE_i8_I64  : I<(outs), (ins I32:$addr, I64:$val),
-                      [(truncstorei8 I64:$val, I32:$addr)]>;
-def STORE_i16_I64 : I<(outs), (ins I32:$addr, I64:$val),
-                      [(truncstorei16 I64:$val, I32:$addr)]>;
-def STORE_I32_I64 : I<(outs), (ins I32:$addr, I64:$val),
-                      [(truncstorei32 I64:$val, I32:$addr)]>;
+def STORE8_I32  : I<(outs), (ins I32:$addr, I32:$val),
+def STORE16_I32 : I<(outs), (ins I32:$addr, I32:$val),
+def STORE8_I64  : I<(outs), (ins I32:$addr, I64:$val),
+def STORE16_I64 : I<(outs), (ins I32:$addr, I64:$val),
+def STORE32_I64 : I<(outs), (ins I32:$addr, I64:$val),
 
 // Page size.
 def page_size_I32 : I<(outs I32:$dst), (ins),
                       [(set I32:$dst, (int_wasm_page_size))]>,
                     Requires<[HasAddr32]>;
 def page_size_I64 : I<(outs I64:$dst), (ins),
                       [(set I64:$dst, (int_wasm_page_size))]>,
                     Requires<[HasAddr64]>;

test/CodeGen/WebAssembly/cfg-stackify.ll

 entry:
   store volatile i32 0, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: minimal_loop:
 ; CHECK-NOT: br
 ; CHECK: BB7_1:
-; CHECK: store_i32 (get_local 1), (get_local 3){{$}}
+; CHECK: i32.store (get_local 1), (get_local 3){{$}}
 ; CHECK: br $BB7_1{{$}}
 define i32 @minimal_loop(i32* %p) {
 entry:
   store volatile i32 0, i32* %p
   br label %loop
 loop:
   store volatile i32 1, i32* %p
   br label %loop

test/CodeGen/WebAssembly/load-ext.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that extending loads are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sext_i8_i32:
-; CHECK: load_s_i8_i32 (get_local 1){{$}}
+; CHECK: i32.load8_s (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i32 @sext_i8_i32(i8 *%p) {
   %v = load i8, i8* %p
   %e = sext i8 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: zext_i8_i32:
-; CHECK: load_u_i8_i32 (get_local 1){{$}}
+; CHECK: i32.load8_u (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i32 @zext_i8_i32(i8 *%p) {
   %v = load i8, i8* %p
   %e = zext i8 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: sext_i16_i32:
-; CHECK: load_s_i16_i32 (get_local 1){{$}}
+; CHECK: i32.load16_s (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i32 @sext_i16_i32(i16 *%p) {
   %v = load i16, i16* %p
   %e = sext i16 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: zext_i16_i32:
-; CHECK: load_u_i16_i32 (get_local 1){{$}}
+; CHECK: i32.load16_u (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i32 @zext_i16_i32(i16 *%p) {
   %v = load i16, i16* %p
   %e = zext i16 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: sext_i8_i64:
-; CHECK: load_s_i8_i64 (get_local 1){{$}}
+; CHECK: i64.load8_s (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @sext_i8_i64(i8 *%p) {
   %v = load i8, i8* %p
   %e = sext i8 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: zext_i8_i64:
-; CHECK: load_u_i8_i64 (get_local 1){{$}}
+; CHECK: i64.load8_u (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @zext_i8_i64(i8 *%p) {
   %v = load i8, i8* %p
   %e = zext i8 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: sext_i16_i64:
-; CHECK: load_s_i16_i64 (get_local 1){{$}}
+; CHECK: i64.load16_s (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @sext_i16_i64(i16 *%p) {
   %v = load i16, i16* %p
   %e = sext i16 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: zext_i16_i64:
-; CHECK: load_u_i16_i64 (get_local 1){{$}}
+; CHECK: i64.load16_u (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @zext_i16_i64(i16 *%p) {
   %v = load i16, i16* %p
   %e = zext i16 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: sext_i32_i64:
-; CHECK: load_s_i32_i64 (get_local 1){{$}}
+; CHECK: i64.load32_s (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @sext_i32_i64(i32 *%p) {
   %v = load i32, i32* %p
   %e = sext i32 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: zext_i32_i64:
-; CHECK: load_u_i32_i64 (get_local 1){{$}}
+; CHECK: i64.load32_u (get_local 1){{$}}
 ; CHECK: set_local 2, pop{{$}}
 define i64 @zext_i32_i64(i32 *%p) {
   %v = load i32, i32* %p
   %e = zext i32 %v to i64
   ret i64 %e
 }

test/CodeGen/WebAssembly/load-store-i1.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that i1 extending loads and truncating stores are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: load_u_i1_i32:
-; CHECK:      load_u_i8_i32 (get_local 1){{$}}
+; CHECK:      i32.load8_u (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: return (get_local 2){{$}}
 define i32 @load_u_i1_i32(i1* %p) {
   %v = load i1, i1* %p
   %e = zext i1 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: load_s_i1_i32:
-; CHECK:      load_u_i8_i32 (get_local 1){{$}}
+; CHECK:      i32.load8_u (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: i32.const 31{{$}}
 ; CHECK-NEXT: set_local 3, pop{{$}}
 ; CHECK-NEXT: shl (get_local 2), (get_local 3){{$}}
 ; CHECK-NEXT: set_local 4, pop{{$}}
 ; CHECK-NEXT: shr_s (get_local 4), (get_local 3){{$}}
 ; CHECK-NEXT: set_local 5, pop{{$}}
 ; CHECK-NEXT: return (get_local 5){{$}}
 define i32 @load_s_i1_i32(i1* %p) {
   %v = load i1, i1* %p
   %e = sext i1 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: load_u_i1_i64:
-; CHECK:      load_u_i8_i64 (get_local 1){{$}}
+; CHECK:      i64.load8_u (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: return (get_local 2){{$}}
 define i64 @load_u_i1_i64(i1* %p) {
   %v = load i1, i1* %p
   %e = zext i1 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: load_s_i1_i64:
-; CHECK:      load_u_i8_i64 (get_local 1){{$}}
+; CHECK:      i64.load8_u (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: i64.const 63{{$}}
 ; CHECK-NEXT: set_local 3, pop{{$}}
 ; CHECK-NEXT: shl (get_local 2), (get_local 3){{$}}
 ; CHECK-NEXT: set_local 4, pop{{$}}
 ; CHECK-NEXT: shr_s (get_local 4), (get_local 3){{$}}
 ; CHECK-NEXT: set_local 5, pop{{$}}
 ; CHECK-NEXT: return (get_local 5){{$}}
 define i64 @load_s_i1_i64(i1* %p) {
   %v = load i1, i1* %p
   %e = sext i1 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: store_i32_i1:
 ; CHECK:      i32.const 1{{$}}
 ; CHECK-NEXT: set_local 4, pop{{$}}
 ; CHECK-NEXT: and (get_local 3), (get_local 4){{$}}
 ; CHECK-NEXT: set_local 5, pop{{$}}
-; CHECK-NEXT: store_i8 (get_local 2), (get_local 5){{$}}
+; CHECK-NEXT: i32.store8 (get_local 2), (get_local 5){{$}}
 define void @store_i32_i1(i1* %p, i32 %v) {
   %t = trunc i32 %v to i1
   store i1 %t, i1* %p
   ret void
 }
 
 ; CHECK-LABEL: store_i64_i1:
 ; CHECK:      i64.const 1{{$}}
 ; CHECK-NEXT: set_local 4, pop{{$}}
 ; CHECK-NEXT: and (get_local 3), (get_local 4){{$}}
 ; CHECK-NEXT: set_local 5, pop{{$}}
-; CHECK-NEXT: store_i8 (get_local 2), (get_local 5){{$}}
+; CHECK-NEXT: i64.store8 (get_local 2), (get_local 5){{$}}
 define void @store_i64_i1(i1* %p, i64 %v) {
   %t = trunc i64 %v to i1
   store i1 %t, i1* %p
   ret void
 }

test/CodeGen/WebAssembly/load.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic loads are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ldi32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: .local i32, i32{{$}}
 ; CHECK-NEXT: get_local 0{{$}}
 ; CHECK-NEXT: set_local 1, pop{{$}}
-; CHECK-NEXT: load_i32 (get_local 1){{$}}
+; CHECK-NEXT: i32.load (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: return (get_local 2){{$}}
 define i32 @ldi32(i32 *%p) {
   %v = load i32, i32* %p
   ret i32 %v
 }
 
 ; CHECK-LABEL: ldi64:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: .local i32, i64{{$}}
 ; CHECK-NEXT: get_local 0{{$}}
 ; CHECK-NEXT: set_local 1, pop{{$}}
-; CHECK-NEXT: load_i64 (get_local 1){{$}}
+; CHECK-NEXT: i64.load (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: return (get_local 2){{$}}
 define i64 @ldi64(i64 *%p) {
   %v = load i64, i64* %p
   ret i64 %v
 }
 
 ; CHECK-LABEL: ldf32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: .local i32, f32{{$}}
 ; CHECK-NEXT: get_local 0{{$}}
 ; CHECK-NEXT: set_local 1, pop{{$}}
-; CHECK-NEXT: load_f32 (get_local 1){{$}}
+; CHECK-NEXT: f32.load (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: return (get_local 2){{$}}
 define float @ldf32(float *%p) {
   %v = load float, float* %p
   ret float %v
 }
 
 ; CHECK-LABEL: ldf64:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: .local i32, f64{{$}}
 ; CHECK-NEXT: get_local 0{{$}}
 ; CHECK-NEXT: set_local 1, pop{{$}}
-; CHECK-NEXT: load_f64 (get_local 1){{$}}
+; CHECK-NEXT: f64.load (get_local 1){{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: return (get_local 2){{$}}
 define double @ldf64(double *%p) {
   %v = load double, double* %p
   ret double %v
 }

test/CodeGen/WebAssembly/store-trunc.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that truncating stores are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: trunc_i8_i32:
-; CHECK: store_i8 (get_local 3), (get_local 2){{$}}
+; CHECK: i32.store8 (get_local 3), (get_local 2){{$}}
 define void @trunc_i8_i32(i8 *%p, i32 %v) {
   %t = trunc i32 %v to i8
   store i8 %t, i8* %p
   ret void
 }
 
 ; CHECK-LABEL: trunc_i16_i32:
-; CHECK: store_i16 (get_local 3), (get_local 2){{$}}
+; CHECK: i32.store16 (get_local 3), (get_local 2){{$}}
 define void @trunc_i16_i32(i16 *%p, i32 %v) {
   %t = trunc i32 %v to i16
   store i16 %t, i16* %p
   ret void
 }
 
 ; CHECK-LABEL: trunc_i8_i64:
-; CHECK: store_i8 (get_local 3), (get_local 2){{$}}
+; CHECK: i64.store8 (get_local 3), (get_local 2){{$}}
 define void @trunc_i8_i64(i8 *%p, i64 %v) {
   %t = trunc i64 %v to i8
   store i8 %t, i8* %p
   ret void
 }
 
 ; CHECK-LABEL: trunc_i16_i64:
-; CHECK: store_i16 (get_local 3), (get_local 2){{$}}
+; CHECK: i64.store16 (get_local 3), (get_local 2){{$}}
 define void @trunc_i16_i64(i16 *%p, i64 %v) {
   %t = trunc i64 %v to i16
   store i16 %t, i16* %p
   ret void
 }
 
 ; CHECK-LABEL: trunc_i32_i64:
-; CHECK: store_i32 (get_local 3), (get_local 2){{$}}
+; CHECK: i64.store32 (get_local 3), (get_local 2){{$}}
 define void @trunc_i32_i64(i32 *%p, i64 %v) {
   %t = trunc i64 %v to i32
   store i32 %t, i32* %p
   ret void
 }

test/CodeGen/WebAssembly/store.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic stores are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sti32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .local i32, i32{{$}}
 ; CHECK-NEXT: get_local 1{{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: get_local 0{{$}}
 ; CHECK-NEXT: set_local 3, pop{{$}}
-; CHECK-NEXT: store_i32 (get_local 3), (get_local 2){{$}}
+; CHECK-NEXT: i32.store (get_local 3), (get_local 2){{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti32(i32 *%p, i32 %v) {
   store i32 %v, i32* %p
   ret void
 }
 
 ; CHECK-LABEL: sti64:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .local i64, i32{{$}}
 ; CHECK-NEXT: get_local 1{{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: get_local 0{{$}}
 ; CHECK-NEXT: set_local 3, pop{{$}}
-; CHECK-NEXT: store_i64 (get_local 3), (get_local 2){{$}}
+; CHECK-NEXT: i64.store (get_local 3), (get_local 2){{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti64(i64 *%p, i64 %v) {
   store i64 %v, i64* %p
   ret void
 }
 
 ; CHECK-LABEL: stf32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .local f32, i32{{$}}
 ; CHECK-NEXT: get_local 1{{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: get_local 0{{$}}
 ; CHECK-NEXT: set_local 3, pop{{$}}
-; CHECK-NEXT: store_f32 (get_local 3), (get_local 2){{$}}
+; CHECK-NEXT: f32.store (get_local 3), (get_local 2){{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf32(float *%p, float %v) {
   store float %v, float* %p
   ret void
 }
 
 ; CHECK-LABEL: stf64:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .local f64, i32{{$}}
 ; CHECK-NEXT: get_local 1{{$}}
 ; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: get_local 0{{$}}
 ; CHECK-NEXT: set_local 3, pop{{$}}
-; CHECK-NEXT: store_f64 (get_local 3), (get_local 2){{$}}
+; CHECK-NEXT: f64.store (get_local 3), (get_local 2){{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf64(double *%p, double %v) {
   store double %v, double* %p
   ret void
 }