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Differential D137713

[SCCP] Add support for with.overflow intrinsics
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Authored by nikic on Nov 9 2022, 6:43 AM.

Details

Reviewers
fhahn
efriedma
Commits
rGf101196d695e: [SCCP] Add support for with.overflow intrinsics
Summary

This adds SCCP support for extractvalues of with.overflow. We compute both the range of the result value and determine when the overflow value is always false.

Diff Detail

Event Timeline

nikic created this revision.Nov 9 2022, 6:43 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 9 2022, 6:43 AM
Herald added a subscriber: hiraditya. · View Herald Transcript
nikic requested review of this revision.Nov 9 2022, 6:43 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 9 2022, 6:43 AM
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nikic edited the summary of this revision. (Show Details)Nov 9 2022, 6:46 AM
Harbormaster completed remote builds in B196898: Diff 474257.Nov 9 2022, 8:00 AM
nikic added a comment.Dec 5 2022, 12:29 AM

Ping :)

fhahn accepted this revision.Dec 5 2022, 2:47 AM

LGTM, thanks!

This revision is now accepted and ready to land.Dec 5 2022, 2:47 AM
Closed by commit rGf101196d695e: [SCCP] Add support for with.overflow intrinsics (authored by nikic). · Explain WhyDec 5 2022, 3:00 AM
This revision was automatically updated to reflect the committed changes.
nikic added a commit: rGf101196d695e: [SCCP] Add support for with.overflow intrinsics.

Revision Contents

PathSize
llvm/
lib/
Transforms/
Utils/
31 lines
test/
Transforms/
SCCP/
54 lines

Diff 474257

llvm/lib/Transforms/Utils/SCCPSolver.cpp

Show First 20 Lines • Show All 264 Lines • ▼ Show 20 Lines if (Iter != AdditionalUsers.end()) {
ToNotify.push_back(UI); ToNotify.push_back(UI);
for (Instruction *UI : ToNotify) for (Instruction *UI : ToNotify)
operandChangedState(UI); operandChangedState(UI);
} }
} }
void handleCallOverdefined(CallBase &CB); void handleCallOverdefined(CallBase &CB);
void handleCallResult(CallBase &CB); void handleCallResult(CallBase &CB);
void handleCallArguments(CallBase &CB); void handleCallArguments(CallBase &CB);
void handleExtractOfWithOverflow(ExtractValueInst &EVI,
const WithOverflowInst *WO, unsigned Idx);
private: private:
friend class InstVisitor<SCCPInstVisitor>; friend class InstVisitor<SCCPInstVisitor>;
// visit implementations - Something changed in this instruction. Either an // visit implementations - Something changed in this instruction. Either an
// operand made a transition, or the instruction is newly executable. Change // operand made a transition, or the instruction is newly executable. Change
// the value type of I to reflect these changes if appropriate. // the value type of I to reflect these changes if appropriate.
void visitPHINode(PHINode &I); void visitPHINode(PHINode &I);
▲ Show 20 Lines • Show All 574 Lines • ▼ Show 20 Lines if (Constant *OpC = getConstant(OpSt)) {
ConstantRange Res = ConstantRange Res =
OpRange.castOp(I.getOpcode(), DL.getTypeSizeInBits(DestTy)); OpRange.castOp(I.getOpcode(), DL.getTypeSizeInBits(DestTy));
mergeInValue(LV, &I, ValueLatticeElement::getRange(Res)); mergeInValue(LV, &I, ValueLatticeElement::getRange(Res));
} else } else
markOverdefined(&I); markOverdefined(&I);
} }
void SCCPInstVisitor::handleExtractOfWithOverflow(ExtractValueInst &EVI,
const WithOverflowInst *WO,
unsigned Idx) {
Value *LHS = WO->getLHS(), *RHS = WO->getRHS();
ValueLatticeElement L = getValueState(LHS);
ValueLatticeElement R = getValueState(RHS);
addAdditionalUser(LHS, &EVI);
addAdditionalUser(RHS, &EVI);
if (L.isUnknownOrUndef() || R.isUnknownOrUndef())
return; // Wait to resolve.
Type *Ty = LHS->getType();
ConstantRange LR = getConstantRange(L, Ty);
ConstantRange RR = getConstantRange(R, Ty);
if (Idx == 0) {
ConstantRange Res = LR.binaryOp(WO->getBinaryOp(), RR);
mergeInValue(&EVI, ValueLatticeElement::getRange(Res));
} else {
assert(Idx == 1 && "Index can only be 0 or 1");
ConstantRange NWRegion = ConstantRange::makeGuaranteedNoWrapRegion(
WO->getBinaryOp(), RR, WO->getNoWrapKind());
if (NWRegion.contains(LR))
return (void)markConstant(&EVI, ConstantInt::getFalse(EVI.getType()));
markOverdefined(&EVI);
}
}
void SCCPInstVisitor::visitExtractValueInst(ExtractValueInst &EVI) { void SCCPInstVisitor::visitExtractValueInst(ExtractValueInst &EVI) {
// If this returns a struct, mark all elements over defined, we don't track // If this returns a struct, mark all elements over defined, we don't track
// structs in structs. // structs in structs.
if (EVI.getType()->isStructTy()) if (EVI.getType()->isStructTy())
return (void)markOverdefined(&EVI); return (void)markOverdefined(&EVI);
// resolvedUndefsIn might mark I as overdefined. Bail out, even if we would // resolvedUndefsIn might mark I as overdefined. Bail out, even if we would
// discover a concrete value later. // discover a concrete value later.
if (ValueState[&EVI].isOverdefined()) if (ValueState[&EVI].isOverdefined())
return (void)markOverdefined(&EVI); return (void)markOverdefined(&EVI);
// If this is extracting from more than one level of struct, we don't know. // If this is extracting from more than one level of struct, we don't know.
if (EVI.getNumIndices() != 1) if (EVI.getNumIndices() != 1)
return (void)markOverdefined(&EVI); return (void)markOverdefined(&EVI);
Value *AggVal = EVI.getAggregateOperand(); Value *AggVal = EVI.getAggregateOperand();
if (AggVal->getType()->isStructTy()) { if (AggVal->getType()->isStructTy()) {
unsigned i = *EVI.idx_begin(); unsigned i = *EVI.idx_begin();
if (auto *WO = dyn_cast<WithOverflowInst>(AggVal))
return handleExtractOfWithOverflow(EVI, WO, i);
ValueLatticeElement EltVal = getStructValueState(AggVal, i); ValueLatticeElement EltVal = getStructValueState(AggVal, i);
mergeInValue(getValueState(&EVI), &EVI, EltVal); mergeInValue(getValueState(&EVI), &EVI, EltVal);
} else { } else {
// Otherwise, must be extracting from an array. // Otherwise, must be extracting from an array.
return (void)markOverdefined(&EVI); return (void)markOverdefined(&EVI);
} }
} }
▲ Show 20 Lines • Show All 737 Lines • Show Last 20 Lines

llvm/test/Transforms/SCCP/with.overflow.ll

Show All 14 Lines
; CHECK-NEXT: [[V0_100:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG0:![0-9]+]] ; CHECK-NEXT: [[V0_100:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG0:![0-9]+]]
; CHECK-NEXT: [[V0_155:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG1:![0-9]+]] ; CHECK-NEXT: [[V0_155:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG1:![0-9]+]]
; CHECK-NEXT: [[V0_156:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG2:![0-9]+]] ; CHECK-NEXT: [[V0_156:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG2:![0-9]+]]
; CHECK-NEXT: [[V100_255:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG3:![0-9]+]] ; CHECK-NEXT: [[V100_255:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG3:![0-9]+]]
; CHECK-NEXT: [[V99_255:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG4:![0-9]+]] ; CHECK-NEXT: [[V99_255:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG4:![0-9]+]]
; CHECK-NEXT: [[V1_2:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG5:![0-9]+]] ; CHECK-NEXT: [[V1_2:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG5:![0-9]+]]
; CHECK-NEXT: [[V1_3:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG6:![0-9]+]] ; CHECK-NEXT: [[V1_3:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG6:![0-9]+]]
; CHECK-NEXT: [[WO1:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[V0_100]], i8 [[V0_155]]) ; CHECK-NEXT: [[WO1:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[V0_100]], i8 [[V0_155]])
; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i8, i1 } [[WO1]], 1 ; CHECK-NEXT: call void @use.i1(i1 false)
; CHECK-NEXT: call void @use.i1(i1 [[OV1]])
; CHECK-NEXT: [[WO2:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[V0_100]], i8 [[V0_156]]) ; CHECK-NEXT: [[WO2:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[V0_100]], i8 [[V0_156]])
; CHECK-NEXT: [[OV2:%.*]] = extractvalue { i8, i1 } [[WO2]], 1 ; CHECK-NEXT: [[OV2:%.*]] = extractvalue { i8, i1 } [[WO2]], 1
; CHECK-NEXT: call void @use.i1(i1 [[OV2]]) ; CHECK-NEXT: call void @use.i1(i1 [[OV2]])
; CHECK-NEXT: [[WO3:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[V100_255]], i8 [[V0_100]]) ; CHECK-NEXT: [[WO3:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[V100_255]], i8 [[V0_100]])
; CHECK-NEXT: [[OV3:%.*]] = extractvalue { i8, i1 } [[WO3]], 1 ; CHECK-NEXT: call void @use.i1(i1 false)
; CHECK-NEXT: call void @use.i1(i1 [[OV3]])
; CHECK-NEXT: [[WO4:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[V99_255]], i8 [[V0_100]]) ; CHECK-NEXT: [[WO4:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[V99_255]], i8 [[V0_100]])
; CHECK-NEXT: [[OV4:%.*]] = extractvalue { i8, i1 } [[WO4]], 1 ; CHECK-NEXT: [[OV4:%.*]] = extractvalue { i8, i1 } [[WO4]], 1
; CHECK-NEXT: call void @use.i1(i1 [[OV4]]) ; CHECK-NEXT: call void @use.i1(i1 [[OV4]])
; CHECK-NEXT: [[WO5:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[V0_100]], i8 [[V1_2]]) ; CHECK-NEXT: [[WO5:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[V0_100]], i8 [[V1_2]])
; CHECK-NEXT: [[OV5:%.*]] = extractvalue { i8, i1 } [[WO5]], 1 ; CHECK-NEXT: call void @use.i1(i1 false)
; CHECK-NEXT: call void @use.i1(i1 [[OV5]])
; CHECK-NEXT: [[WO6:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[V0_100]], i8 [[V1_3]]) ; CHECK-NEXT: [[WO6:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[V0_100]], i8 [[V1_3]])
; CHECK-NEXT: [[OV6:%.*]] = extractvalue { i8, i1 } [[WO6]], 1 ; CHECK-NEXT: [[OV6:%.*]] = extractvalue { i8, i1 } [[WO6]], 1
; CHECK-NEXT: call void @use.i1(i1 [[OV6]]) ; CHECK-NEXT: call void @use.i1(i1 [[OV6]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%v0_100 = load i8, ptr %p, !range !{i8 0, i8 101} %v0_100 = load i8, ptr %p, !range !{i8 0, i8 101}
%v0_155 = load i8, ptr %p, !range !{i8 0, i8 156} %v0_155 = load i8, ptr %p, !range !{i8 0, i8 156}
%v0_156 = load i8, ptr %p, !range !{i8 0, i8 157} %v0_156 = load i8, ptr %p, !range !{i8 0, i8 157}
Show All 33 Lines
; CHECK-NEXT: [[V0_100:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG0]] ; CHECK-NEXT: [[V0_100:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG0]]
; CHECK-NEXT: [[V0_27:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG7:![0-9]+]] ; CHECK-NEXT: [[V0_27:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG7:![0-9]+]]
; CHECK-NEXT: [[V0_28:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG8:![0-9]+]] ; CHECK-NEXT: [[V0_28:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG8:![0-9]+]]
; CHECK-NEXT: [[VM27_0:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG9:![0-9]+]] ; CHECK-NEXT: [[VM27_0:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG9:![0-9]+]]
; CHECK-NEXT: [[VM28_0:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG10:![0-9]+]] ; CHECK-NEXT: [[VM28_0:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG10:![0-9]+]]
; CHECK-NEXT: [[V1_4:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG11:![0-9]+]] ; CHECK-NEXT: [[V1_4:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG11:![0-9]+]]
; CHECK-NEXT: [[V1_5:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG12:![0-9]+]] ; CHECK-NEXT: [[V1_5:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG12:![0-9]+]]
; CHECK-NEXT: [[WO1:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[V0_100]], i8 [[V0_27]]) ; CHECK-NEXT: [[WO1:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[V0_100]], i8 [[V0_27]])
; CHECK-NEXT: [[OV1:%.*]] = extractvalue { i8, i1 } [[WO1]], 1 ; CHECK-NEXT: call void @use.i1(i1 false)
; CHECK-NEXT: call void @use.i1(i1 [[OV1]])
; CHECK-NEXT: [[WO2:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[V0_100]], i8 [[V0_28]]) ; CHECK-NEXT: [[WO2:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[V0_100]], i8 [[V0_28]])
; CHECK-NEXT: [[OV2:%.*]] = extractvalue { i8, i1 } [[WO2]], 1 ; CHECK-NEXT: [[OV2:%.*]] = extractvalue { i8, i1 } [[WO2]], 1
; CHECK-NEXT: call void @use.i1(i1 [[OV2]]) ; CHECK-NEXT: call void @use.i1(i1 [[OV2]])
; CHECK-NEXT: [[WO3:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[V0_100]], i8 [[VM27_0]]) ; CHECK-NEXT: [[WO3:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[V0_100]], i8 [[VM27_0]])
; CHECK-NEXT: [[OV3:%.*]] = extractvalue { i8, i1 } [[WO3]], 1 ; CHECK-NEXT: call void @use.i1(i1 false)
; CHECK-NEXT: call void @use.i1(i1 [[OV3]])
; CHECK-NEXT: [[WO4:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[V0_100]], i8 [[VM28_0]]) ; CHECK-NEXT: [[WO4:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[V0_100]], i8 [[VM28_0]])
; CHECK-NEXT: [[OV4:%.*]] = extractvalue { i8, i1 } [[WO4]], 1 ; CHECK-NEXT: [[OV4:%.*]] = extractvalue { i8, i1 } [[WO4]], 1
; CHECK-NEXT: call void @use.i1(i1 [[OV4]]) ; CHECK-NEXT: call void @use.i1(i1 [[OV4]])
; CHECK-NEXT: [[WO5:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[V0_27]], i8 [[V1_4]]) ; CHECK-NEXT: [[WO5:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[V0_27]], i8 [[V1_4]])
; CHECK-NEXT: [[OV5:%.*]] = extractvalue { i8, i1 } [[WO5]], 1 ; CHECK-NEXT: call void @use.i1(i1 false)
; CHECK-NEXT: call void @use.i1(i1 [[OV5]])
; CHECK-NEXT: [[WO6:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[V0_27]], i8 [[V1_5]]) ; CHECK-NEXT: [[WO6:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[V0_27]], i8 [[V1_5]])
; CHECK-NEXT: [[OV6:%.*]] = extractvalue { i8, i1 } [[WO6]], 1 ; CHECK-NEXT: [[OV6:%.*]] = extractvalue { i8, i1 } [[WO6]], 1
; CHECK-NEXT: call void @use.i1(i1 [[OV6]]) ; CHECK-NEXT: call void @use.i1(i1 [[OV6]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%v0_100 = load i8, ptr %p, !range !{i8 0, i8 101} %v0_100 = load i8, ptr %p, !range !{i8 0, i8 101}
%v0_27 = load i8, ptr %p, !range !{i8 0, i8 28} %v0_27 = load i8, ptr %p, !range !{i8 0, i8 28}
%v0_28 = load i8, ptr %p, !range !{i8 0, i8 29} %v0_28 = load i8, ptr %p, !range !{i8 0, i8 29}
Show All 31 Lines
define void @unsigned_result(ptr %p) { define void @unsigned_result(ptr %p) {
; CHECK-LABEL: @unsigned_result( ; CHECK-LABEL: @unsigned_result(
; CHECK-NEXT: [[V0_20:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG13:![0-9]+]] ; CHECK-NEXT: [[V0_20:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG13:![0-9]+]]
; CHECK-NEXT: [[V20_40:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG14:![0-9]+]] ; CHECK-NEXT: [[V20_40:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG14:![0-9]+]]
; CHECK-NEXT: [[V0_10:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG15:![0-9]+]] ; CHECK-NEXT: [[V0_10:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG15:![0-9]+]]
; CHECK-NEXT: [[V2_3:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG16:![0-9]+]] ; CHECK-NEXT: [[V2_3:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG16:![0-9]+]]
; CHECK-NEXT: [[WO1:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[V0_20]], i8 [[V20_40]]) ; CHECK-NEXT: [[WO1:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[V0_20]], i8 [[V20_40]])
; CHECK-NEXT: [[RES1:%.*]] = extractvalue { i8, i1 } [[WO1]], 0 ; CHECK-NEXT: [[RES1:%.*]] = extractvalue { i8, i1 } [[WO1]], 0
; CHECK-NEXT: [[CMP1_1:%.*]] = icmp uge i8 [[RES1]], 20 ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: call void @use.i1(i1 [[CMP1_1]]) ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: [[CMP1_2:%.*]] = icmp ule i8 [[RES1]], 60
; CHECK-NEXT: call void @use.i1(i1 [[CMP1_2]])
; CHECK-NEXT: [[CMP1_3:%.*]] = icmp ugt i8 [[RES1]], 20 ; CHECK-NEXT: [[CMP1_3:%.*]] = icmp ugt i8 [[RES1]], 20
; CHECK-NEXT: call void @use.i1(i1 [[CMP1_3]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP1_3]])
; CHECK-NEXT: [[CMP1_4:%.*]] = icmp ult i8 [[RES1]], 60 ; CHECK-NEXT: [[CMP1_4:%.*]] = icmp ult i8 [[RES1]], 60
; CHECK-NEXT: call void @use.i1(i1 [[CMP1_4]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP1_4]])
; CHECK-NEXT: [[WO2:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[V0_10]], i8 [[V20_40]]) ; CHECK-NEXT: [[WO2:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[V0_10]], i8 [[V20_40]])
; CHECK-NEXT: [[RES2:%.*]] = extractvalue { i8, i1 } [[WO2]], 0 ; CHECK-NEXT: [[RES2:%.*]] = extractvalue { i8, i1 } [[WO2]], 0
; CHECK-NEXT: [[CMP2_1:%.*]] = icmp uge i8 [[RES2]], -40 ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: call void @use.i1(i1 [[CMP2_1]]) ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: [[CMP2_2:%.*]] = icmp ule i8 [[RES2]], -10
; CHECK-NEXT: call void @use.i1(i1 [[CMP2_2]])
; CHECK-NEXT: [[CMP2_3:%.*]] = icmp ugt i8 [[RES2]], -40 ; CHECK-NEXT: [[CMP2_3:%.*]] = icmp ugt i8 [[RES2]], -40
; CHECK-NEXT: call void @use.i1(i1 [[CMP2_3]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP2_3]])
; CHECK-NEXT: [[CMP2_4:%.*]] = icmp ult i8 [[RES2]], -10 ; CHECK-NEXT: [[CMP2_4:%.*]] = icmp ult i8 [[RES2]], -10
; CHECK-NEXT: call void @use.i1(i1 [[CMP2_4]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP2_4]])
; CHECK-NEXT: [[WO3:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[V20_40]], i8 [[V2_3]]) ; CHECK-NEXT: [[WO3:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[V20_40]], i8 [[V2_3]])
; CHECK-NEXT: [[RES3:%.*]] = extractvalue { i8, i1 } [[WO3]], 0 ; CHECK-NEXT: [[RES3:%.*]] = extractvalue { i8, i1 } [[WO3]], 0
; CHECK-NEXT: [[CMP3_1:%.*]] = icmp uge i8 [[RES3]], 40 ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: call void @use.i1(i1 [[CMP3_1]]) ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: [[CMP3_2:%.*]] = icmp ule i8 [[RES3]], 120
; CHECK-NEXT: call void @use.i1(i1 [[CMP3_2]])
; CHECK-NEXT: [[CMP3_3:%.*]] = icmp ugt i8 [[RES3]], 40 ; CHECK-NEXT: [[CMP3_3:%.*]] = icmp ugt i8 [[RES3]], 40
; CHECK-NEXT: call void @use.i1(i1 [[CMP3_3]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP3_3]])
; CHECK-NEXT: [[CMP3_4:%.*]] = icmp ult i8 [[RES3]], 120 ; CHECK-NEXT: [[CMP3_4:%.*]] = icmp ult i8 [[RES3]], 120
; CHECK-NEXT: call void @use.i1(i1 [[CMP3_4]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP3_4]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%v0_20 = load i8, ptr %p, !range !{i8 0, i8 21} %v0_20 = load i8, ptr %p, !range !{i8 0, i8 21}
%v20_40 = load i8, ptr %p, !range !{i8 20, i8 41} %v20_40 = load i8, ptr %p, !range !{i8 20, i8 41}
Show All 38 Lines
define void @signed_result(ptr %p) { define void @signed_result(ptr %p) {
; CHECK-LABEL: @signed_result( ; CHECK-LABEL: @signed_result(
; CHECK-NEXT: [[V0_20:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG13]] ; CHECK-NEXT: [[V0_20:%.*]] = load i8, ptr [[P:%.*]], align 1, !range [[RNG13]]
; CHECK-NEXT: [[V20_40:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG14]] ; CHECK-NEXT: [[V20_40:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG14]]
; CHECK-NEXT: [[V0_10:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG15]] ; CHECK-NEXT: [[V0_10:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG15]]
; CHECK-NEXT: [[V2_3:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG16]] ; CHECK-NEXT: [[V2_3:%.*]] = load i8, ptr [[P]], align 1, !range [[RNG16]]
; CHECK-NEXT: [[WO1:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[V0_20]], i8 [[V20_40]]) ; CHECK-NEXT: [[WO1:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[V0_20]], i8 [[V20_40]])
; CHECK-NEXT: [[RES1:%.*]] = extractvalue { i8, i1 } [[WO1]], 0 ; CHECK-NEXT: [[RES1:%.*]] = extractvalue { i8, i1 } [[WO1]], 0
; CHECK-NEXT: [[CMP1_1:%.*]] = icmp uge i8 [[RES1]], 20 ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: call void @use.i1(i1 [[CMP1_1]]) ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: [[CMP1_2:%.*]] = icmp ule i8 [[RES1]], 60
; CHECK-NEXT: call void @use.i1(i1 [[CMP1_2]])
; CHECK-NEXT: [[CMP1_3:%.*]] = icmp ugt i8 [[RES1]], 20 ; CHECK-NEXT: [[CMP1_3:%.*]] = icmp ugt i8 [[RES1]], 20
; CHECK-NEXT: call void @use.i1(i1 [[CMP1_3]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP1_3]])
; CHECK-NEXT: [[CMP1_4:%.*]] = icmp ult i8 [[RES1]], 60 ; CHECK-NEXT: [[CMP1_4:%.*]] = icmp ult i8 [[RES1]], 60
; CHECK-NEXT: call void @use.i1(i1 [[CMP1_4]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP1_4]])
; CHECK-NEXT: [[WO2:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[V0_10]], i8 [[V20_40]]) ; CHECK-NEXT: [[WO2:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[V0_10]], i8 [[V20_40]])
; CHECK-NEXT: [[RES2:%.*]] = extractvalue { i8, i1 } [[WO2]], 0 ; CHECK-NEXT: [[RES2:%.*]] = extractvalue { i8, i1 } [[WO2]], 0
; CHECK-NEXT: [[CMP2_1:%.*]] = icmp uge i8 [[RES2]], -40 ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: call void @use.i1(i1 [[CMP2_1]]) ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: [[CMP2_2:%.*]] = icmp ule i8 [[RES2]], -10
; CHECK-NEXT: call void @use.i1(i1 [[CMP2_2]])
; CHECK-NEXT: [[CMP2_3:%.*]] = icmp ugt i8 [[RES2]], -40 ; CHECK-NEXT: [[CMP2_3:%.*]] = icmp ugt i8 [[RES2]], -40
; CHECK-NEXT: call void @use.i1(i1 [[CMP2_3]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP2_3]])
; CHECK-NEXT: [[CMP2_4:%.*]] = icmp ult i8 [[RES2]], -10 ; CHECK-NEXT: [[CMP2_4:%.*]] = icmp ult i8 [[RES2]], -10
; CHECK-NEXT: call void @use.i1(i1 [[CMP2_4]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP2_4]])
; CHECK-NEXT: [[WO3:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[V20_40]], i8 [[V2_3]]) ; CHECK-NEXT: [[WO3:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[V20_40]], i8 [[V2_3]])
; CHECK-NEXT: [[RES3:%.*]] = extractvalue { i8, i1 } [[WO3]], 0 ; CHECK-NEXT: [[RES3:%.*]] = extractvalue { i8, i1 } [[WO3]], 0
; CHECK-NEXT: [[CMP3_1:%.*]] = icmp uge i8 [[RES3]], 40 ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: call void @use.i1(i1 [[CMP3_1]]) ; CHECK-NEXT: call void @use.i1(i1 true)
; CHECK-NEXT: [[CMP3_2:%.*]] = icmp ule i8 [[RES3]], 120
; CHECK-NEXT: call void @use.i1(i1 [[CMP3_2]])
; CHECK-NEXT: [[CMP3_3:%.*]] = icmp ugt i8 [[RES3]], 40 ; CHECK-NEXT: [[CMP3_3:%.*]] = icmp ugt i8 [[RES3]], 40
; CHECK-NEXT: call void @use.i1(i1 [[CMP3_3]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP3_3]])
; CHECK-NEXT: [[CMP3_4:%.*]] = icmp ult i8 [[RES3]], 120 ; CHECK-NEXT: [[CMP3_4:%.*]] = icmp ult i8 [[RES3]], 120
; CHECK-NEXT: call void @use.i1(i1 [[CMP3_4]]) ; CHECK-NEXT: call void @use.i1(i1 [[CMP3_4]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%v0_20 = load i8, ptr %p, !range !{i8 0, i8 21} %v0_20 = load i8, ptr %p, !range !{i8 0, i8 21}
%v20_40 = load i8, ptr %p, !range !{i8 20, i8 41} %v20_40 = load i8, ptr %p, !range !{i8 20, i8 41}
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