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Differential D13447

[AArch64]Fix bug in DAG combine for ADDV
AbandonedPublic

Authored by junbuml on Oct 5 2015, 1:23 PM.

Details

Reviewers
jmolloy
• chatur01
mcrosier
Summary

Added more constraint when checking the number of vector elements during DAG combine for across vector reductions.

This fix PR25056.

Diff Detail

Event Timeline

junbuml updated this revision to Diff 36543.Oct 5 2015, 1:23 PM
junbuml retitled this revision from to [AArch64]Fix bug in DAG combine for ADDV.
junbuml updated this object.
junbuml added reviewers: jmolloy, mcrosier, • chatur01.
junbuml added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson. · View Herald TranscriptOct 5 2015, 1:23 PM
jmolloy requested changes to this revision.Oct 5 2015, 1:29 PM
jmolloy edited edge metadata.

Hi Jun,

I don't think this is the right fix. We generate oversized vectors in the loop vectorizer, and we expect them to work well. The right way to solve this PR is by implementing vector splitting for the [US]ADDV and [SU][MIN,MAX]V nodes.

Cheers,

James

This revision now requires changes to proceed.Oct 5 2015, 1:29 PM
junbuml added a comment.Oct 5 2015, 2:06 PM

Do you mean combining for oversized input vector for ADDV could be combined, but it should be legalized after then by splitting the vector ?

llvm-commits added a comment.Oct 6 2015, 9:01 AM

Yes. This occurs for all other ISD nodes, see what happens for example if
you try a v8i32 ADD.

mcrosier edited edge metadata.Oct 6 2015, 9:34 AM

Jun,
In case you haven't seen it Charlie proposed a fix for PR25056 here: http://reviews.llvm.org/D13466.

Chad

junbuml added a comment.Oct 6 2015, 9:38 AM

Yes, looks like D13466 by Charlie tries to do what you mentioned.

junbuml abandoned this revision.Oct 12 2015, 8:43 AM

Revision Contents

PathSize
lib/
Target/
AArch64/
16 lines
test/
CodeGen/
AArch64/
101 lines
332 lines

Diff 36543

lib/Target/AArch64/AArch64ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
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/// LoopVectorizer for the across vector reduction. It consists of /// LoopVectorizer for the across vector reduction. It consists of
/// log2(NumVectorElements) steps and, in each step, 2^(s) elements /// log2(NumVectorElements) steps and, in each step, 2^(s) elements
/// are reduced, where s is an induction variable from 0 to /// are reduced, where s is an induction variable from 0 to
/// log2(NumVectorElements). /// log2(NumVectorElements).
static SDValue tryMatchAcrossLaneShuffleForReduction(SDNode *N, SDValue OpV, static SDValue tryMatchAcrossLaneShuffleForReduction(SDNode *N, SDValue OpV,
unsigned Op, unsigned Op,
SelectionDAG &DAG) { SelectionDAG &DAG) {
EVT VTy = OpV->getOperand(0).getValueType(); EVT VTy = OpV->getOperand(0).getValueType();
if (!VTy.isVector()) assert(VTy.isVector() && "Expected a vector type");
return SDValue();
int NumVecElts = VTy.getVectorNumElements(); int NumVecElts = VTy.getVectorNumElements();
if (NumVecElts != 4 && NumVecElts != 8 && NumVecElts != 16)
return SDValue();
int NumExpectedSteps = APInt(8, NumVecElts).logBase2(); int NumExpectedSteps = APInt(8, NumVecElts).logBase2();
SDValue PreOp = OpV; SDValue PreOp = OpV;
// Iterate over each step of the across vector reduction. // Iterate over each step of the across vector reduction.
for (int CurStep = 0; CurStep != NumExpectedSteps; ++CurStep) { for (int CurStep = 0; CurStep != NumExpectedSteps; ++CurStep) {
SDValue CurOp = PreOp.getOperand(0); SDValue CurOp = PreOp.getOperand(0);
SDValue Shuffle = PreOp.getOperand(1); SDValue Shuffle = PreOp.getOperand(1);
if (Shuffle.getOpcode() != ISD::VECTOR_SHUFFLE) { if (Shuffle.getOpcode() != ISD::VECTOR_SHUFFLE) {
// Try to swap the 1st and 2nd operand as add and min/max instructions // Try to swap the 1st and 2nd operand as add and min/max instructions
▲ Show 20 Lines • Show All 117 Lines • ▼ Show 20 LinesperformAcrossLaneMinMaxReductionCombine(SDNode *N, SelectionDAG &DAG,
if (Op != ISD::SMAX && Op != ISD::UMAX && Op != ISD::SMIN && Op != ISD::UMIN) if (Op != ISD::SMAX && Op != ISD::UMAX && Op != ISD::SMIN && Op != ISD::UMIN)
return SDValue(); return SDValue();
EVT VTy = VectorOp.getValueType(); EVT VTy = VectorOp.getValueType();
if (!VTy.isVector()) if (!VTy.isVector())
return SDValue(); return SDValue();
EVT EltTy = VTy.getVectorElementType(); EVT EltTy = VTy.getVectorElementType();
if (EltTy != MVT::i32 && EltTy != MVT::i16 && EltTy != MVT::i8) int NumVecElts = VTy.getVectorNumElements();
if (!((EltTy == MVT::i32 && NumVecElts == 4) ||
(EltTy == MVT::i16 && (NumVecElts == 4 || NumVecElts == 8)) ||
(EltTy == MVT::i8 && (NumVecElts == 8 || NumVecElts == 16))))
return SDValue(); return SDValue();
// Check if extracting from the same vector. // Check if extracting from the same vector.
// For example, // For example,
// %sc = setcc %vector, %svn1, gt // %sc = setcc %vector, %svn1, gt
// %n0 = extract_vector_elt %sc, #0 // %n0 = extract_vector_elt %sc, #0
// %n1 = extract_vector_elt %vector, #0 // %n1 = extract_vector_elt %vector, #0
// %n2 = extract_vector_elt $vector, #1 // %n2 = extract_vector_elt $vector, #1
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 LinesperformAcrossLaneAddReductionCombine(SDNode *N, SelectionDAG &DAG,
if (!isa<ConstantSDNode>(N1) || cast<ConstantSDNode>(N1)->getZExtValue() != 0) if (!isa<ConstantSDNode>(N1) || cast<ConstantSDNode>(N1)->getZExtValue() != 0)
return SDValue(); return SDValue();
EVT VTy = N0.getValueType(); EVT VTy = N0.getValueType();
if (!VTy.isVector()) if (!VTy.isVector())
return SDValue(); return SDValue();
EVT EltTy = VTy.getVectorElementType(); EVT EltTy = VTy.getVectorElementType();
if (EltTy != MVT::i32 && EltTy != MVT::i16 && EltTy != MVT::i8) int NumVecElts = VTy.getVectorNumElements();
if (!((EltTy == MVT::i32 && NumVecElts == 4) ||
(EltTy == MVT::i16 && (NumVecElts == 4 || NumVecElts == 8)) ||
(EltTy == MVT::i8 && (NumVecElts == 8 || NumVecElts == 16))))
return SDValue(); return SDValue();
return tryMatchAcrossLaneShuffleForReduction(N, N0, ISD::ADD, DAG); return tryMatchAcrossLaneShuffleForReduction(N, N0, ISD::ADD, DAG);
} }
/// Target-specific DAG combine function for NEON load/store intrinsics /// Target-specific DAG combine function for NEON load/store intrinsics
/// to merge base address updates. /// to merge base address updates.
static SDValue performNEONPostLDSTCombine(SDNode *N, static SDValue performNEONPostLDSTCombine(SDNode *N,
▲ Show 20 Lines • Show All 913 Lines • Show Last 20 Lines

test/CodeGen/AArch64/aarch64-addv.ll

; RUN: llc -march=aarch64 -aarch64-neon-syntax=generic < %s | FileCheck %s ; RUN: llc -march=aarch64 -aarch64-neon-syntax=generic < %s | FileCheck %s
define i8 @add_B(<16 x i8>* %arr) { define i8 @add_8B(<8 x i8>* %arr) {
; CHECK-LABEL: add_B ; CHECK-LABEL: add_8B
; CHECK: addv {{b[0-9]+}}, {{v[0-9]+}}.8b
%bin.rdx = load <8 x i8>, <8 x i8>* %arr
%rdx.shuf = shufflevector <8 x i8> %bin.rdx, <8 x i8> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef>
%bin.rdx11 = add <8 x i8> %bin.rdx, %rdx.shuf
%rdx.shuf12 = shufflevector <8 x i8> %bin.rdx11, <8 x i8> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx13 = add <8 x i8> %bin.rdx11, %rdx.shuf12
%rdx.shuf13 = shufflevector <8 x i8> %bin.rdx13, <8 x i8> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx14 = add <8 x i8> %bin.rdx13, %rdx.shuf13
%r = extractelement <8 x i8> %bin.rdx14, i32 0
ret i8 %r
}
define i8 @add_16B(<16 x i8>* %arr) {
; CHECK-LABEL: add_16B
; CHECK: addv {{b[0-9]+}}, {{v[0-9]+}}.16b ; CHECK: addv {{b[0-9]+}}, {{v[0-9]+}}.16b
%bin.rdx = load <16 x i8>, <16 x i8>* %arr %bin.rdx = load <16 x i8>, <16 x i8>* %arr
%rdx.shuf0 = shufflevector <16 x i8> %bin.rdx, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf0 = shufflevector <16 x i8> %bin.rdx, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx0 = add <16 x i8> %bin.rdx, %rdx.shuf0 %bin.rdx0 = add <16 x i8> %bin.rdx, %rdx.shuf0
%rdx.shuf = shufflevector <16 x i8> %bin.rdx0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef > %rdx.shuf = shufflevector <16 x i8> %bin.rdx0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef >
%bin.rdx11 = add <16 x i8> %bin.rdx0, %rdx.shuf %bin.rdx11 = add <16 x i8> %bin.rdx0, %rdx.shuf
%rdx.shuf12 = shufflevector <16 x i8> %bin.rdx11, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef> %rdx.shuf12 = shufflevector <16 x i8> %bin.rdx11, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef>
%bin.rdx13 = add <16 x i8> %bin.rdx11, %rdx.shuf12 %bin.rdx13 = add <16 x i8> %bin.rdx11, %rdx.shuf12
%rdx.shuf13 = shufflevector <16 x i8> %bin.rdx13, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef> %rdx.shuf13 = shufflevector <16 x i8> %bin.rdx13, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef>
%bin.rdx14 = add <16 x i8> %bin.rdx13, %rdx.shuf13 %bin.rdx14 = add <16 x i8> %bin.rdx13, %rdx.shuf13
%r = extractelement <16 x i8> %bin.rdx14, i32 0 %r = extractelement <16 x i8> %bin.rdx14, i32 0
ret i8 %r ret i8 %r
} }
define i16 @add_H(<8 x i16>* %arr) { define i8 @add_32B(<32 x i8>* %arr) {
; CHECK-LABEL: add_H ; CHECK-LABEL: add_32B
; CHECK: addv {{b[0-9]+}}, {{v[0-9]+}}.16b
%bin.rdx = load <32 x i8>, <32 x i8>* %arr
%rdx.shuf00 = shufflevector <32 x i8> %bin.rdx, <32 x i8> undef, <32 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx00 = add <32 x i8> %bin.rdx, %rdx.shuf00
%rdx.shuf0 = shufflevector <32 x i8> %bin.rdx00, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx0 = add <32 x i8> %bin.rdx00, %rdx.shuf0
%rdx.shuf = shufflevector <32 x i8> %bin.rdx0, <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx11 = add <32 x i8> %bin.rdx0, %rdx.shuf
%rdx.shuf12 = shufflevector <32 x i8> %bin.rdx11, <32 x i8> undef, <32 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx13 = add <32 x i8> %bin.rdx11, %rdx.shuf12
%rdx.shuf13 = shufflevector <32 x i8> %bin.rdx13, <32 x i8> undef, <32 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx14 = add <32 x i8> %bin.rdx13, %rdx.shuf13
%r = extractelement <32 x i8> %bin.rdx14, i32 0
ret i8 %r
}
define i16 @add_4H( <4 x i16>* %arr) {
; CHECK-LABEL: add_4H
; CHECK: addv {{h[0-9]+}}, {{v[0-9]+}}.4h
entry:
%bin.rdx = load <4 x i16>, <4 x i16>* %arr
%rdx.shuf = shufflevector <4 x i16> %bin.rdx, <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%bin.rdx11 = add <4 x i16> %bin.rdx, %rdx.shuf
%rdx.shuf12 = shufflevector <4 x i16> %bin.rdx11, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%bin.rdx13 = add <4 x i16> %bin.rdx11, %rdx.shuf12
%r = extractelement <4 x i16> %bin.rdx13, i32 0
ret i16 %r
}
define i16 @add_8H(<8 x i16>* %arr) {
; CHECK-LABEL: add_8H
; CHECK: addv {{h[0-9]+}}, {{v[0-9]+}}.8h ; CHECK: addv {{h[0-9]+}}, {{v[0-9]+}}.8h
%bin.rdx = load <8 x i16>, <8 x i16>* %arr %bin.rdx = load <8 x i16>, <8 x i16>* %arr
%rdx.shuf = shufflevector <8 x i16> %bin.rdx, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef> %rdx.shuf = shufflevector <8 x i16> %bin.rdx, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef>
%bin.rdx11 = add <8 x i16> %bin.rdx, %rdx.shuf %bin.rdx11 = add <8 x i16> %bin.rdx, %rdx.shuf
%rdx.shuf12 = shufflevector <8 x i16> %bin.rdx11, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf12 = shufflevector <8 x i16> %bin.rdx11, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx13 = add <8 x i16> %bin.rdx11, %rdx.shuf12 %bin.rdx13 = add <8 x i16> %bin.rdx11, %rdx.shuf12
%rdx.shuf13 = shufflevector <8 x i16> %bin.rdx13, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf13 = shufflevector <8 x i16> %bin.rdx13, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx14 = add <8 x i16> %bin.rdx13, %rdx.shuf13 %bin.rdx14 = add <8 x i16> %bin.rdx13, %rdx.shuf13
%r = extractelement <8 x i16> %bin.rdx14, i32 0 %r = extractelement <8 x i16> %bin.rdx14, i32 0
ret i16 %r ret i16 %r
} }
define i32 @add_S( <4 x i32>* %arr) { define i16 @add_16H(<16 x i16>* %arr) {
; CHECK-LABEL: add_S ; CHECK-LABEL: add_16H
; CHECK: addv {{h[0-9]+}}, {{v[0-9]+}}.8h
%bin.rdx = load <16 x i16>, <16 x i16>* %arr
%rdx.shuf0 = shufflevector <16 x i16> %bin.rdx, <16 x i16> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx0 = add <16 x i16> %bin.rdx, %rdx.shuf0
%rdx.shuf = shufflevector <16 x i16> %bin.rdx0, <16 x i16> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef >
%bin.rdx11 = add <16 x i16> %bin.rdx0, %rdx.shuf
%rdx.shuf12 = shufflevector <16 x i16> %bin.rdx11, <16 x i16> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef>
%bin.rdx13 = add <16 x i16> %bin.rdx11, %rdx.shuf12
%rdx.shuf13 = shufflevector <16 x i16> %bin.rdx13, <16 x i16> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef, i32 undef, i32 undef,i32 undef, i32 undef>
%bin.rdx14 = add <16 x i16> %bin.rdx13, %rdx.shuf13
%r = extractelement <16 x i16> %bin.rdx14, i32 0
ret i16 %r
}
; CHECK-LABEL: add_2S
; CHECK-NOT: addv
define i32 @add_2S(<2 x i32>* %arr) {
%bin.rdx = load <2 x i32>, <2 x i32>* %arr
%rdx.shuf0 = shufflevector <2 x i32> %bin.rdx, <2 x i32> undef, <2 x i32> <i32 1, i32 undef>
%bin.rdx0 = add <2 x i32> %bin.rdx, %rdx.shuf0
%r = extractelement <2 x i32> %bin.rdx0, i32 0
ret i32 %r
}
define i32 @add_4S( <4 x i32>* %arr) {
; CHECK-LABEL: add_4S
; CHECK: addv {{s[0-9]+}}, {{v[0-9]+}}.4s ; CHECK: addv {{s[0-9]+}}, {{v[0-9]+}}.4s
%bin.rdx = load <4 x i32>, <4 x i32>* %arr %bin.rdx = load <4 x i32>, <4 x i32>* %arr
%rdx.shuf = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %rdx.shuf = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%bin.rdx11 = add <4 x i32> %bin.rdx, %rdx.shuf %bin.rdx11 = add <4 x i32> %bin.rdx, %rdx.shuf
%rdx.shuf12 = shufflevector <4 x i32> %bin.rdx11, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %rdx.shuf12 = shufflevector <4 x i32> %bin.rdx11, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%bin.rdx13 = add <4 x i32> %bin.rdx11, %rdx.shuf12 %bin.rdx13 = add <4 x i32> %bin.rdx11, %rdx.shuf12
%r = extractelement <4 x i32> %bin.rdx13, i32 0 %r = extractelement <4 x i32> %bin.rdx13, i32 0
ret i32 %r ret i32 %r
} }
define i64 @add_D(<2 x i64>* %arr) { define i32 @add_8S(<8 x i32>* %arr) {
; CHECK-LABEL: add_D ; CHECK-LABEL: add_8S
; CHECK: addv {{s[0-9]+}}, {{v[0-9]+}}.4s
%bin.rdx = load <8 x i32>, <8 x i32>* %arr
%rdx.shuf = shufflevector <8 x i32> %bin.rdx, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef,i32 undef, i32 undef>
%bin.rdx11 = add <8 x i32> %bin.rdx, %rdx.shuf
%rdx.shuf12 = shufflevector <8 x i32> %bin.rdx11, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx13 = add <8 x i32> %bin.rdx11, %rdx.shuf12
%rdx.shuf13 = shufflevector <8 x i32> %bin.rdx13, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%bin.rdx14 = add <8 x i32> %bin.rdx13, %rdx.shuf13
%r = extractelement <8 x i32> %bin.rdx14, i32 0
ret i32 %r
}
define i64 @add_2D(<2 x i64>* %arr) {
; CHECK-LABEL: add_2D
; CHECK-NOT: addv ; CHECK-NOT: addv
%bin.rdx = load <2 x i64>, <2 x i64>* %arr %bin.rdx = load <2 x i64>, <2 x i64>* %arr
%rdx.shuf0 = shufflevector <2 x i64> %bin.rdx, <2 x i64> undef, <2 x i32> <i32 1, i32 undef> %rdx.shuf0 = shufflevector <2 x i64> %bin.rdx, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
%bin.rdx0 = add <2 x i64> %bin.rdx, %rdx.shuf0 %bin.rdx0 = add <2 x i64> %bin.rdx, %rdx.shuf0
%r = extractelement <2 x i64> %bin.rdx0, i32 0 %r = extractelement <2 x i64> %bin.rdx0, i32 0
ret i64 %r ret i64 %r
} }

test/CodeGen/AArch64/aarch64-minmaxv.ll

; RUN: llc -march=aarch64 -aarch64-neon-syntax=generic < %s | FileCheck %s ; RUN: llc -march=aarch64 -aarch64-neon-syntax=generic < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-linu--gnu" target triple = "aarch64-linu--gnu"
; CHECK-LABEL: smax_B
; CHECK-LABEL: smax_8B
; CHECK: smaxv {{b[0-9]+}}, {{v[0-9]+}}.8b
define i8 @smax_8B(<8 x i8>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i8>, <8 x i8>* %arr
%rdx.shuf = shufflevector <8 x i8> %rdx.minmax.select, <8 x i8> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp sgt <8 x i8> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i8> %rdx.minmax.select, <8 x i8> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i8> %rdx.minmax.select24, <8 x i8> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp sgt <8 x i8> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i8> %rdx.minmax.select24, <8 x i8> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i8> %rdx.minmax.select27, <8 x i8> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp sgt <8 x i8> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i8> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i8> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i8 %rdx.minmax.select27.elt, i8 %rdx.shuf28.elt
ret i8 %r
}
; CHECK-LABEL: smax_16B
; CHECK: smaxv {{b[0-9]+}}, {{v[0-9]+}}.16b ; CHECK: smaxv {{b[0-9]+}}, {{v[0-9]+}}.16b
define i8 @smax_B(<16 x i8>* nocapture readonly %arr) { define i8 @smax_16B(<16 x i8>* nocapture readonly %arr) {
%arr.load = load <16 x i8>, <16 x i8>* %arr %arr.load = load <16 x i8>, <16 x i8>* %arr
%rdx.shuf = shufflevector <16 x i8> %arr.load, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf = shufflevector <16 x i8> %arr.load, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp22 = icmp sgt <16 x i8> %arr.load, %rdx.shuf %rdx.minmax.cmp22 = icmp sgt <16 x i8> %arr.load, %rdx.shuf
%rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %arr.load, <16 x i8> %rdx.shuf %rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %arr.load, <16 x i8> %rdx.shuf
%rdx.shuf24 = shufflevector <16 x i8> %rdx.minmax.select23, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf24 = shufflevector <16 x i8> %rdx.minmax.select23, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp25 = icmp sgt <16 x i8> %rdx.minmax.select23, %rdx.shuf24 %rdx.minmax.cmp25 = icmp sgt <16 x i8> %rdx.minmax.select23, %rdx.shuf24
%rdx.minmax.select26 = select <16 x i1> %rdx.minmax.cmp25, <16 x i8> %rdx.minmax.select23, <16 x i8> %rdx.shuf24 %rdx.minmax.select26 = select <16 x i1> %rdx.minmax.cmp25, <16 x i8> %rdx.minmax.select23, <16 x i8> %rdx.shuf24
%rdx.shuf27 = shufflevector <16 x i8> %rdx.minmax.select26, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf27 = shufflevector <16 x i8> %rdx.minmax.select26, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp28 = icmp sgt <16 x i8> %rdx.minmax.select26, %rdx.shuf27 %rdx.minmax.cmp28 = icmp sgt <16 x i8> %rdx.minmax.select26, %rdx.shuf27
%rdx.minmax.select29 = select <16 x i1> %rdx.minmax.cmp28, <16 x i8> %rdx.minmax.select26, <16 x i8> %rdx.shuf27 %rdx.minmax.select29 = select <16 x i1> %rdx.minmax.cmp28, <16 x i8> %rdx.minmax.select26, <16 x i8> %rdx.shuf27
%rdx.shuf30 = shufflevector <16 x i8> %rdx.minmax.select29, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf30 = shufflevector <16 x i8> %rdx.minmax.select29, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp31 = icmp sgt <16 x i8> %rdx.minmax.select29, %rdx.shuf30 %rdx.minmax.cmp31 = icmp sgt <16 x i8> %rdx.minmax.select29, %rdx.shuf30
%rdx.minmax.cmp31.elt = extractelement <16 x i1> %rdx.minmax.cmp31, i32 0 %rdx.minmax.cmp31.elt = extractelement <16 x i1> %rdx.minmax.cmp31, i32 0
%rdx.minmax.select29.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 0 %rdx.minmax.select29.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 0
%rdx.shuf30.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 1 %rdx.shuf30.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 1
%r = select i1 %rdx.minmax.cmp31.elt, i8 %rdx.minmax.select29.elt, i8 %rdx.shuf30.elt %r = select i1 %rdx.minmax.cmp31.elt, i8 %rdx.minmax.select29.elt, i8 %rdx.shuf30.elt
ret i8 %r ret i8 %r
} }
; CHECK-LABEL: smax_H ; CHECK-LABEL: smax_4H
; CHECK: smaxv {{h[0-9]+}}, {{v[0-9]+}}.4h
define i16 @smax_4H(<4 x i16> * nocapture readonly %arr) {
%rdx.minmax.select = load <4 x i16>, <4 x i16>* %arr
%rdx.shuf = shufflevector <4 x i16> %rdx.minmax.select, <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%rdx.minmax.cmp18 = icmp sgt <4 x i16> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i16> %rdx.minmax.select, <4 x i16> %rdx.shuf
%rdx.shuf20 = shufflevector <4 x i16> %rdx.minmax.select19, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp21 = icmp sgt <4 x i16> %rdx.minmax.select19, %rdx.shuf20
%rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0
%rdx.minmax.select19.elt = extractelement <4 x i16> %rdx.minmax.select19, i32 0
%rdx.shuf20.elt = extractelement <4 x i16> %rdx.minmax.select19, i32 1
%r = select i1 %rdx.minmax.cmp21.elt, i16 %rdx.minmax.select19.elt, i16 %rdx.shuf20.elt
ret i16 %r
}
; CHECK-LABEL: smax_8H
; CHECK: smaxv {{h[0-9]+}}, {{v[0-9]+}}.8h ; CHECK: smaxv {{h[0-9]+}}, {{v[0-9]+}}.8h
define i16 @smax_H(<8 x i16>* nocapture readonly %arr) { define i16 @smax_8H(<8 x i16>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i16>, <8 x i16>* %arr %rdx.minmax.select = load <8 x i16>, <8 x i16>* %arr
%rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp sgt <8 x i16> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp23 = icmp sgt <8 x i16> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf %rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i16> %rdx.minmax.select24, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf25 = shufflevector <8 x i16> %rdx.minmax.select24, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp sgt <8 x i16> %rdx.minmax.select24, %rdx.shuf25 %rdx.minmax.cmp26 = icmp sgt <8 x i16> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i16> %rdx.minmax.select24, <8 x i16> %rdx.shuf25 %rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i16> %rdx.minmax.select24, <8 x i16> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i16> %rdx.minmax.select27, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf28 = shufflevector <8 x i16> %rdx.minmax.select27, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp sgt <8 x i16> %rdx.minmax.select27, %rdx.shuf28 %rdx.minmax.cmp29 = icmp sgt <8 x i16> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0 %rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 0 %rdx.minmax.select27.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 1 %rdx.shuf28.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i16 %rdx.minmax.select27.elt, i16 %rdx.shuf28.elt %r = select i1 %rdx.minmax.cmp29.elt, i16 %rdx.minmax.select27.elt, i16 %rdx.shuf28.elt
ret i16 %r ret i16 %r
} }
; CHECK-LABEL: smax_S ; CHECK-LABEL: smax_2S
; CHECK-NOT: smaxv
define i32 @smax_2S(<2 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <2 x i32>, <2 x i32>* %arr
%rdx.shuf = shufflevector <2 x i32> %rdx.minmax.select, <2 x i32> undef, <2 x i32> <i32 1, i32 undef>
%rdx.minmax.cmp18 = icmp sgt <2 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0
%rdx.minmax.select.elt = extractelement <2 x i32> %rdx.minmax.select, i32 0
%rdx.shuf.elt = extractelement <2 x i32> %rdx.minmax.select, i32 1
%r = select i1 %rdx.minmax.cmp18.elt, i32 %rdx.minmax.select.elt, i32 %rdx.shuf.elt
ret i32 %r
}
; CHECK-LABEL: smax_4S
; CHECK: smaxv {{s[0-9]+}}, {{v[0-9]+}}.4s ; CHECK: smaxv {{s[0-9]+}}, {{v[0-9]+}}.4s
define i32 @smax_S(<4 x i32> * nocapture readonly %arr) { define i32 @smax_4S(<4 x i32> * nocapture readonly %arr) {
%rdx.minmax.select = load <4 x i32>, <4 x i32>* %arr %rdx.minmax.select = load <4 x i32>, <4 x i32>* %arr
%rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%rdx.minmax.cmp18 = icmp sgt <4 x i32> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp18 = icmp sgt <4 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf %rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf
%rdx.shuf20 = shufflevector <4 x i32> %rdx.minmax.select19, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %rdx.shuf20 = shufflevector <4 x i32> %rdx.minmax.select19, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp21 = icmp sgt <4 x i32> %rdx.minmax.select19, %rdx.shuf20 %rdx.minmax.cmp21 = icmp sgt <4 x i32> %rdx.minmax.select19, %rdx.shuf20
%rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0 %rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0
%rdx.minmax.select19.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 0 %rdx.minmax.select19.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 0
%rdx.shuf20.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 1 %rdx.shuf20.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 1
%r = select i1 %rdx.minmax.cmp21.elt, i32 %rdx.minmax.select19.elt, i32 %rdx.shuf20.elt %r = select i1 %rdx.minmax.cmp21.elt, i32 %rdx.minmax.select19.elt, i32 %rdx.shuf20.elt
ret i32 %r ret i32 %r
} }
; CHECK-LABEL: smax_D ; CHECK-LABEL: smax_8S
; CHECK-NOT: smaxv
define i32 @smax_8S(<8 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i32>, <8 x i32>* %arr
%rdx.shuf = shufflevector <8 x i32> %rdx.minmax.select, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp sgt <8 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i32> %rdx.minmax.select, <8 x i32> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i32> %rdx.minmax.select24, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp sgt <8 x i32> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i32> %rdx.minmax.select24, <8 x i32> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i32> %rdx.minmax.select27, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp sgt <8 x i32> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i32> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i32> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i32 %rdx.minmax.select27.elt, i32 %rdx.shuf28.elt
ret i32 %r
}
; CHECK-LABEL: smax_2D
; CHECK-NOT: smaxv ; CHECK-NOT: smaxv
define i64 @smax_D(<2 x i64>* nocapture readonly %arr) { define i64 @smax_2D(<2 x i64>* nocapture readonly %arr) {
%rdx.minmax.select = load <2 x i64>, <2 x i64>* %arr %rdx.minmax.select = load <2 x i64>, <2 x i64>* %arr
%rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 undef> %rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
%rdx.minmax.cmp18 = icmp sgt <2 x i64> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp18 = icmp sgt <2 x i64> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0 %rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0
%rdx.minmax.select.elt = extractelement <2 x i64> %rdx.minmax.select, i32 0 %rdx.minmax.select.elt = extractelement <2 x i64> %rdx.minmax.select, i32 0
%rdx.shuf.elt = extractelement <2 x i64> %rdx.minmax.select, i32 1 %rdx.shuf.elt = extractelement <2 x i64> %rdx.minmax.select, i32 1
%r = select i1 %rdx.minmax.cmp18.elt, i64 %rdx.minmax.select.elt, i64 %rdx.shuf.elt %r = select i1 %rdx.minmax.cmp18.elt, i64 %rdx.minmax.select.elt, i64 %rdx.shuf.elt
ret i64 %r ret i64 %r
} }
; CHECK-LABEL: umax_8B
; CHECK: umaxv {{b[0-9]+}}, {{v[0-9]+}}.8b
define i8 @umax_8B(<8 x i8>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i8>, <8 x i8>* %arr
%rdx.shuf = shufflevector <8 x i8> %rdx.minmax.select, <8 x i8> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp ugt <8 x i8> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i8> %rdx.minmax.select, <8 x i8> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i8> %rdx.minmax.select24, <8 x i8> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp ugt <8 x i8> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i8> %rdx.minmax.select24, <8 x i8> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i8> %rdx.minmax.select27, <8 x i8> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp ugt <8 x i8> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i8> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i8> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i8 %rdx.minmax.select27.elt, i8 %rdx.shuf28.elt
ret i8 %r
}
; CHECK-LABEL: umax_B ; CHECK-LABEL: umax_16B
; CHECK: umaxv {{b[0-9]+}}, {{v[0-9]+}}.16b ; CHECK: umaxv {{b[0-9]+}}, {{v[0-9]+}}.16b
define i8 @umax_B(<16 x i8>* nocapture readonly %arr) { define i8 @umax_16B(<16 x i8>* nocapture readonly %arr) {
%rdx.minmax.select = load <16 x i8>, <16 x i8>* %arr %rdx.minmax.select = load <16 x i8>, <16 x i8>* %arr
%rdx.shuf = shufflevector <16 x i8> %rdx.minmax.select, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf = shufflevector <16 x i8> %rdx.minmax.select, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp22 = icmp ugt <16 x i8> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp22 = icmp ugt <16 x i8> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %rdx.minmax.select, <16 x i8> %rdx.shuf %rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %rdx.minmax.select, <16 x i8> %rdx.shuf
%rdx.shuf24 = shufflevector <16 x i8> %rdx.minmax.select23, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf24 = shufflevector <16 x i8> %rdx.minmax.select23, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp25 = icmp ugt <16 x i8> %rdx.minmax.select23, %rdx.shuf24 %rdx.minmax.cmp25 = icmp ugt <16 x i8> %rdx.minmax.select23, %rdx.shuf24
%rdx.minmax.select26 = select <16 x i1> %rdx.minmax.cmp25, <16 x i8> %rdx.minmax.select23, <16 x i8> %rdx.shuf24 %rdx.minmax.select26 = select <16 x i1> %rdx.minmax.cmp25, <16 x i8> %rdx.minmax.select23, <16 x i8> %rdx.shuf24
%rdx.shuf27 = shufflevector <16 x i8> %rdx.minmax.select26, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf27 = shufflevector <16 x i8> %rdx.minmax.select26, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp28 = icmp ugt <16 x i8> %rdx.minmax.select26, %rdx.shuf27 %rdx.minmax.cmp28 = icmp ugt <16 x i8> %rdx.minmax.select26, %rdx.shuf27
%rdx.minmax.select29 = select <16 x i1> %rdx.minmax.cmp28, <16 x i8> %rdx.minmax.select26, <16 x i8> %rdx.shuf27 %rdx.minmax.select29 = select <16 x i1> %rdx.minmax.cmp28, <16 x i8> %rdx.minmax.select26, <16 x i8> %rdx.shuf27
%rdx.shuf30 = shufflevector <16 x i8> %rdx.minmax.select29, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf30 = shufflevector <16 x i8> %rdx.minmax.select29, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp31 = icmp ugt <16 x i8> %rdx.minmax.select29, %rdx.shuf30 %rdx.minmax.cmp31 = icmp ugt <16 x i8> %rdx.minmax.select29, %rdx.shuf30
%rdx.minmax.cmp31.elt = extractelement <16 x i1> %rdx.minmax.cmp31, i32 0 %rdx.minmax.cmp31.elt = extractelement <16 x i1> %rdx.minmax.cmp31, i32 0
%rdx.minmax.select29.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 0 %rdx.minmax.select29.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 0
%rdx.shuf30.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 1 %rdx.shuf30.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 1
%r = select i1 %rdx.minmax.cmp31.elt, i8 %rdx.minmax.select29.elt, i8 %rdx.shuf30.elt %r = select i1 %rdx.minmax.cmp31.elt, i8 %rdx.minmax.select29.elt, i8 %rdx.shuf30.elt
ret i8 %r ret i8 %r
} }
; CHECK-LABEL: umax_H
; CHECK-LABEL: umax_4H
; CHECK: umaxv {{h[0-9]+}}, {{v[0-9]+}}.4h
define i16 @umax_4H(<4 x i16> * nocapture readonly %arr) {
%rdx.minmax.select = load <4 x i16>, <4 x i16>* %arr
%rdx.shuf = shufflevector <4 x i16> %rdx.minmax.select, <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%rdx.minmax.cmp18 = icmp ugt <4 x i16> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i16> %rdx.minmax.select, <4 x i16> %rdx.shuf
%rdx.shuf20 = shufflevector <4 x i16> %rdx.minmax.select19, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp21 = icmp ugt <4 x i16> %rdx.minmax.select19, %rdx.shuf20
%rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0
%rdx.minmax.select19.elt = extractelement <4 x i16> %rdx.minmax.select19, i32 0
%rdx.shuf20.elt = extractelement <4 x i16> %rdx.minmax.select19, i32 1
%r = select i1 %rdx.minmax.cmp21.elt, i16 %rdx.minmax.select19.elt, i16 %rdx.shuf20.elt
ret i16 %r
}
; CHECK-LABEL: umax_8H
; CHECK: umaxv {{h[0-9]+}}, {{v[0-9]+}}.8h ; CHECK: umaxv {{h[0-9]+}}, {{v[0-9]+}}.8h
define i16 @umax_H(<8 x i16>* nocapture readonly %arr) { define i16 @umax_8H(<8 x i16>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i16>, <8 x i16>* %arr %rdx.minmax.select = load <8 x i16>, <8 x i16>* %arr
%rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp ugt <8 x i16> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp23 = icmp ugt <8 x i16> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf %rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i16> %rdx.minmax.select24, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf25 = shufflevector <8 x i16> %rdx.minmax.select24, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp ugt <8 x i16> %rdx.minmax.select24, %rdx.shuf25 %rdx.minmax.cmp26 = icmp ugt <8 x i16> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i16> %rdx.minmax.select24, <8 x i16> %rdx.shuf25 %rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i16> %rdx.minmax.select24, <8 x i16> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i16> %rdx.minmax.select27, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf28 = shufflevector <8 x i16> %rdx.minmax.select27, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp ugt <8 x i16> %rdx.minmax.select27, %rdx.shuf28 %rdx.minmax.cmp29 = icmp ugt <8 x i16> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0 %rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 0 %rdx.minmax.select27.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 1 %rdx.shuf28.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i16 %rdx.minmax.select27.elt, i16 %rdx.shuf28.elt %r = select i1 %rdx.minmax.cmp29.elt, i16 %rdx.minmax.select27.elt, i16 %rdx.shuf28.elt
ret i16 %r ret i16 %r
} }
; CHECK-LABEL: umax_S ; CHECK-LABEL: umax_2S
; CHECK-NOT: umaxv
define i32 @umax_2S(<2 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <2 x i32>, <2 x i32>* %arr
%rdx.shuf = shufflevector <2 x i32> %rdx.minmax.select, <2 x i32> undef, <2 x i32> <i32 1, i32 undef>
%rdx.minmax.cmp18 = icmp ugt <2 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0
%rdx.minmax.select.elt = extractelement <2 x i32> %rdx.minmax.select, i32 0
%rdx.shuf.elt = extractelement <2 x i32> %rdx.minmax.select, i32 1
%r = select i1 %rdx.minmax.cmp18.elt, i32 %rdx.minmax.select.elt, i32 %rdx.shuf.elt
ret i32 %r
}
; CHECK-LABEL: umax_4S
; CHECK: umaxv {{s[0-9]+}}, {{v[0-9]+}}.4s ; CHECK: umaxv {{s[0-9]+}}, {{v[0-9]+}}.4s
define i32 @umax_S(<4 x i32>* nocapture readonly %arr) { define i32 @umax_4S(<4 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <4 x i32>, <4 x i32>* %arr %rdx.minmax.select = load <4 x i32>, <4 x i32>* %arr
%rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%rdx.minmax.cmp18 = icmp ugt <4 x i32> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp18 = icmp ugt <4 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf %rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf
%rdx.shuf20 = shufflevector <4 x i32> %rdx.minmax.select19, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %rdx.shuf20 = shufflevector <4 x i32> %rdx.minmax.select19, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp21 = icmp ugt <4 x i32> %rdx.minmax.select19, %rdx.shuf20 %rdx.minmax.cmp21 = icmp ugt <4 x i32> %rdx.minmax.select19, %rdx.shuf20
%rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0 %rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0
%rdx.minmax.select19.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 0 %rdx.minmax.select19.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 0
%rdx.shuf20.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 1 %rdx.shuf20.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 1
%r = select i1 %rdx.minmax.cmp21.elt, i32 %rdx.minmax.select19.elt, i32 %rdx.shuf20.elt %r = select i1 %rdx.minmax.cmp21.elt, i32 %rdx.minmax.select19.elt, i32 %rdx.shuf20.elt
ret i32 %r ret i32 %r
} }
; CHECK-LABEL: umax_D ; CHECK-LABEL: umax_8S
; CHECK-NOT: umaxv
define i32 @umax_8S(<8 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i32>, <8 x i32>* %arr
%rdx.shuf = shufflevector <8 x i32> %rdx.minmax.select, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp ugt <8 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i32> %rdx.minmax.select, <8 x i32> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i32> %rdx.minmax.select24, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp ugt <8 x i32> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i32> %rdx.minmax.select24, <8 x i32> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i32> %rdx.minmax.select27, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp ugt <8 x i32> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i32> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i32> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i32 %rdx.minmax.select27.elt, i32 %rdx.shuf28.elt
ret i32 %r
}
; CHECK-LABEL: umax_2D
; CHECK-NOT: umaxv ; CHECK-NOT: umaxv
define i64 @umax_D(<2 x i64>* nocapture readonly %arr) { define i64 @umax_2D(<2 x i64>* nocapture readonly %arr) {
%rdx.minmax.select = load <2 x i64>, <2 x i64>* %arr %rdx.minmax.select = load <2 x i64>, <2 x i64>* %arr
%rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 undef> %rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
%rdx.minmax.cmp18 = icmp ugt <2 x i64> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp18 = icmp ugt <2 x i64> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0 %rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0
%rdx.minmax.select.elt = extractelement <2 x i64> %rdx.minmax.select, i32 0 %rdx.minmax.select.elt = extractelement <2 x i64> %rdx.minmax.select, i32 0
%rdx.shuf.elt = extractelement <2 x i64> %rdx.minmax.select, i32 1 %rdx.shuf.elt = extractelement <2 x i64> %rdx.minmax.select, i32 1
%r = select i1 %rdx.minmax.cmp18.elt, i64 %rdx.minmax.select.elt, i64 %rdx.shuf.elt %r = select i1 %rdx.minmax.cmp18.elt, i64 %rdx.minmax.select.elt, i64 %rdx.shuf.elt
ret i64 %r ret i64 %r
} }
; CHECK-LABEL: smin_8B
; CHECK: sminv {{b[0-9]+}}, {{v[0-9]+}}.8b
define i8 @smin_8B(<8 x i8>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i8>, <8 x i8>* %arr
%rdx.shuf = shufflevector <8 x i8> %rdx.minmax.select, <8 x i8> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp slt <8 x i8> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i8> %rdx.minmax.select, <8 x i8> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i8> %rdx.minmax.select24, <8 x i8> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp slt <8 x i8> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i8> %rdx.minmax.select24, <8 x i8> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i8> %rdx.minmax.select27, <8 x i8> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp slt <8 x i8> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i8> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i8> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i8 %rdx.minmax.select27.elt, i8 %rdx.shuf28.elt
ret i8 %r
}
; CHECK-LABEL: smin_B ; CHECK-LABEL: smin_16B
; CHECK: sminv {{b[0-9]+}}, {{v[0-9]+}}.16b ; CHECK: sminv {{b[0-9]+}}, {{v[0-9]+}}.16b
define i8 @smin_B(<16 x i8>* nocapture readonly %arr) { define i8 @smin_16B(<16 x i8>* nocapture readonly %arr) {
%rdx.minmax.select = load <16 x i8>, <16 x i8>* %arr %rdx.minmax.select = load <16 x i8>, <16 x i8>* %arr
%rdx.shuf = shufflevector <16 x i8> %rdx.minmax.select, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf = shufflevector <16 x i8> %rdx.minmax.select, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp22 = icmp slt <16 x i8> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp22 = icmp slt <16 x i8> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %rdx.minmax.select, <16 x i8> %rdx.shuf %rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %rdx.minmax.select, <16 x i8> %rdx.shuf
%rdx.shuf24 = shufflevector <16 x i8> %rdx.minmax.select23, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf24 = shufflevector <16 x i8> %rdx.minmax.select23, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp25 = icmp slt <16 x i8> %rdx.minmax.select23, %rdx.shuf24 %rdx.minmax.cmp25 = icmp slt <16 x i8> %rdx.minmax.select23, %rdx.shuf24
%rdx.minmax.select26 = select <16 x i1> %rdx.minmax.cmp25, <16 x i8> %rdx.minmax.select23, <16 x i8> %rdx.shuf24 %rdx.minmax.select26 = select <16 x i1> %rdx.minmax.cmp25, <16 x i8> %rdx.minmax.select23, <16 x i8> %rdx.shuf24
%rdx.shuf27 = shufflevector <16 x i8> %rdx.minmax.select26, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf27 = shufflevector <16 x i8> %rdx.minmax.select26, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp28 = icmp slt <16 x i8> %rdx.minmax.select26, %rdx.shuf27 %rdx.minmax.cmp28 = icmp slt <16 x i8> %rdx.minmax.select26, %rdx.shuf27
%rdx.minmax.select29 = select <16 x i1> %rdx.minmax.cmp28, <16 x i8> %rdx.minmax.select26, <16 x i8> %rdx.shuf27 %rdx.minmax.select29 = select <16 x i1> %rdx.minmax.cmp28, <16 x i8> %rdx.minmax.select26, <16 x i8> %rdx.shuf27
%rdx.shuf30 = shufflevector <16 x i8> %rdx.minmax.select29, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf30 = shufflevector <16 x i8> %rdx.minmax.select29, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp31 = icmp slt <16 x i8> %rdx.minmax.select29, %rdx.shuf30 %rdx.minmax.cmp31 = icmp slt <16 x i8> %rdx.minmax.select29, %rdx.shuf30
%rdx.minmax.cmp31.elt = extractelement <16 x i1> %rdx.minmax.cmp31, i32 0 %rdx.minmax.cmp31.elt = extractelement <16 x i1> %rdx.minmax.cmp31, i32 0
%rdx.minmax.select29.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 0 %rdx.minmax.select29.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 0
%rdx.shuf30.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 1 %rdx.shuf30.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 1
%r = select i1 %rdx.minmax.cmp31.elt, i8 %rdx.minmax.select29.elt, i8 %rdx.shuf30.elt %r = select i1 %rdx.minmax.cmp31.elt, i8 %rdx.minmax.select29.elt, i8 %rdx.shuf30.elt
ret i8 %r ret i8 %r
} }
; CHECK-LABEL: smin_H ; CHECK-LABEL: smin_4H
; CHECK: sminv {{h[0-9]+}}, {{v[0-9]+}}.4h
define i16 @smin_4H(<4 x i16> * nocapture readonly %arr) {
%rdx.minmax.select = load <4 x i16>, <4 x i16>* %arr
%rdx.shuf = shufflevector <4 x i16> %rdx.minmax.select, <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%rdx.minmax.cmp18 = icmp slt <4 x i16> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i16> %rdx.minmax.select, <4 x i16> %rdx.shuf
%rdx.shuf20 = shufflevector <4 x i16> %rdx.minmax.select19, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp21 = icmp slt <4 x i16> %rdx.minmax.select19, %rdx.shuf20
%rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0
%rdx.minmax.select19.elt = extractelement <4 x i16> %rdx.minmax.select19, i32 0
%rdx.shuf20.elt = extractelement <4 x i16> %rdx.minmax.select19, i32 1
%r = select i1 %rdx.minmax.cmp21.elt, i16 %rdx.minmax.select19.elt, i16 %rdx.shuf20.elt
ret i16 %r
}
; CHECK-LABEL: smin_8H
; CHECK: sminv {{h[0-9]+}}, {{v[0-9]+}}.8h ; CHECK: sminv {{h[0-9]+}}, {{v[0-9]+}}.8h
define i16 @smin_H(<8 x i16>* nocapture readonly %arr) { define i16 @smin_8H(<8 x i16>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i16>, <8 x i16>* %arr %rdx.minmax.select = load <8 x i16>, <8 x i16>* %arr
%rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp slt <8 x i16> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp23 = icmp slt <8 x i16> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf %rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i16> %rdx.minmax.select24, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf25 = shufflevector <8 x i16> %rdx.minmax.select24, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp slt <8 x i16> %rdx.minmax.select24, %rdx.shuf25 %rdx.minmax.cmp26 = icmp slt <8 x i16> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i16> %rdx.minmax.select24, <8 x i16> %rdx.shuf25 %rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i16> %rdx.minmax.select24, <8 x i16> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i16> %rdx.minmax.select27, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf28 = shufflevector <8 x i16> %rdx.minmax.select27, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp slt <8 x i16> %rdx.minmax.select27, %rdx.shuf28 %rdx.minmax.cmp29 = icmp slt <8 x i16> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0 %rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 0 %rdx.minmax.select27.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 1 %rdx.shuf28.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i16 %rdx.minmax.select27.elt, i16 %rdx.shuf28.elt %r = select i1 %rdx.minmax.cmp29.elt, i16 %rdx.minmax.select27.elt, i16 %rdx.shuf28.elt
ret i16 %r ret i16 %r
} }
; CHECK-LABEL: smin_S ; CHECK-LABEL: smin_2S
; CHECK-NOT: sminv
define i32 @smin_2S(<2 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <2 x i32>, <2 x i32>* %arr
%rdx.shuf = shufflevector <2 x i32> %rdx.minmax.select, <2 x i32> undef, <2 x i32> <i32 1, i32 undef>
%rdx.minmax.cmp18 = icmp slt <2 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0
%rdx.minmax.select.elt = extractelement <2 x i32> %rdx.minmax.select, i32 0
%rdx.shuf.elt = extractelement <2 x i32> %rdx.minmax.select, i32 1
%r = select i1 %rdx.minmax.cmp18.elt, i32 %rdx.minmax.select.elt, i32 %rdx.shuf.elt
ret i32 %r
}
; CHECK-LABEL: smin_4S
; CHECK: sminv {{s[0-9]+}}, {{v[0-9]+}}.4s ; CHECK: sminv {{s[0-9]+}}, {{v[0-9]+}}.4s
define i32 @smin_S(<4 x i32>* nocapture readonly %arr) { define i32 @smin_4S(<4 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <4 x i32>, <4 x i32>* %arr %rdx.minmax.select = load <4 x i32>, <4 x i32>* %arr
%rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%rdx.minmax.cmp18 = icmp slt <4 x i32> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp18 = icmp slt <4 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf %rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf
%rdx.shuf20 = shufflevector <4 x i32> %rdx.minmax.select19, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %rdx.shuf20 = shufflevector <4 x i32> %rdx.minmax.select19, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp21 = icmp slt <4 x i32> %rdx.minmax.select19, %rdx.shuf20 %rdx.minmax.cmp21 = icmp slt <4 x i32> %rdx.minmax.select19, %rdx.shuf20
%rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0 %rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0
%rdx.minmax.select19.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 0 %rdx.minmax.select19.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 0
%rdx.shuf20.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 1 %rdx.shuf20.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 1
%r = select i1 %rdx.minmax.cmp21.elt, i32 %rdx.minmax.select19.elt, i32 %rdx.shuf20.elt %r = select i1 %rdx.minmax.cmp21.elt, i32 %rdx.minmax.select19.elt, i32 %rdx.shuf20.elt
ret i32 %r ret i32 %r
} }
; CHECK-LABEL: smin_D ; CHECK-LABEL: smin_8S
; CHECK-NOT: sminv
define i32 @smin_8S(<8 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i32>, <8 x i32>* %arr
%rdx.shuf = shufflevector <8 x i32> %rdx.minmax.select, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp slt <8 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i32> %rdx.minmax.select, <8 x i32> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i32> %rdx.minmax.select24, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp slt <8 x i32> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i32> %rdx.minmax.select24, <8 x i32> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i32> %rdx.minmax.select27, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp slt <8 x i32> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i32> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i32> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i32 %rdx.minmax.select27.elt, i32 %rdx.shuf28.elt
ret i32 %r
}
; CHECK-LABEL: smin_2D
; CHECK-NOT: sminv ; CHECK-NOT: sminv
define i64 @smin_D(<2 x i64>* nocapture readonly %arr) { define i64 @smin_2D(<2 x i64>* nocapture readonly %arr) {
%rdx.minmax.select = load <2 x i64>, <2 x i64>* %arr %rdx.minmax.select = load <2 x i64>, <2 x i64>* %arr
%rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 undef> %rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
%rdx.minmax.cmp18 = icmp slt <2 x i64> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp18 = icmp slt <2 x i64> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0 %rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0
%rdx.minmax.select.elt = extractelement <2 x i64> %rdx.minmax.select, i32 0 %rdx.minmax.select.elt = extractelement <2 x i64> %rdx.minmax.select, i32 0
%rdx.shuf.elt = extractelement <2 x i64> %rdx.minmax.select, i32 1 %rdx.shuf.elt = extractelement <2 x i64> %rdx.minmax.select, i32 1
%r = select i1 %rdx.minmax.cmp18.elt, i64 %rdx.minmax.select.elt, i64 %rdx.shuf.elt %r = select i1 %rdx.minmax.cmp18.elt, i64 %rdx.minmax.select.elt, i64 %rdx.shuf.elt
ret i64 %r ret i64 %r
} }
; CHECK-LABEL: umin_B ; CHECK-LABEL: umin_8B
; CHECK: uminv {{b[0-9]+}}, {{v[0-9]+}}.8b
define i8 @umin_8B(<8 x i8>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i8>, <8 x i8>* %arr
%rdx.shuf = shufflevector <8 x i8> %rdx.minmax.select, <8 x i8> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp ult <8 x i8> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i8> %rdx.minmax.select, <8 x i8> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i8> %rdx.minmax.select24, <8 x i8> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp ult <8 x i8> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i8> %rdx.minmax.select24, <8 x i8> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i8> %rdx.minmax.select27, <8 x i8> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp ult <8 x i8> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i8> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i8> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i8 %rdx.minmax.select27.elt, i8 %rdx.shuf28.elt
ret i8 %r
}
; CHECK-LABEL: umin_16B
; CHECK: uminv {{b[0-9]+}}, {{v[0-9]+}}.16b ; CHECK: uminv {{b[0-9]+}}, {{v[0-9]+}}.16b
define i8 @umin_B(<16 x i8>* nocapture readonly %arr) { define i8 @umin_16B(<16 x i8>* nocapture readonly %arr) {
%rdx.minmax.select = load <16 x i8>, <16 x i8>* %arr %rdx.minmax.select = load <16 x i8>, <16 x i8>* %arr
%rdx.shuf = shufflevector <16 x i8> %rdx.minmax.select, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf = shufflevector <16 x i8> %rdx.minmax.select, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp22 = icmp ult <16 x i8> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp22 = icmp ult <16 x i8> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %rdx.minmax.select, <16 x i8> %rdx.shuf %rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %rdx.minmax.select, <16 x i8> %rdx.shuf
%rdx.shuf24 = shufflevector <16 x i8> %rdx.minmax.select23, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf24 = shufflevector <16 x i8> %rdx.minmax.select23, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp25 = icmp ult <16 x i8> %rdx.minmax.select23, %rdx.shuf24 %rdx.minmax.cmp25 = icmp ult <16 x i8> %rdx.minmax.select23, %rdx.shuf24
%rdx.minmax.select26 = select <16 x i1> %rdx.minmax.cmp25, <16 x i8> %rdx.minmax.select23, <16 x i8> %rdx.shuf24 %rdx.minmax.select26 = select <16 x i1> %rdx.minmax.cmp25, <16 x i8> %rdx.minmax.select23, <16 x i8> %rdx.shuf24
%rdx.shuf27 = shufflevector <16 x i8> %rdx.minmax.select26, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf27 = shufflevector <16 x i8> %rdx.minmax.select26, <16 x i8> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp28 = icmp ult <16 x i8> %rdx.minmax.select26, %rdx.shuf27 %rdx.minmax.cmp28 = icmp ult <16 x i8> %rdx.minmax.select26, %rdx.shuf27
%rdx.minmax.select29 = select <16 x i1> %rdx.minmax.cmp28, <16 x i8> %rdx.minmax.select26, <16 x i8> %rdx.shuf27 %rdx.minmax.select29 = select <16 x i1> %rdx.minmax.cmp28, <16 x i8> %rdx.minmax.select26, <16 x i8> %rdx.shuf27
%rdx.shuf30 = shufflevector <16 x i8> %rdx.minmax.select29, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf30 = shufflevector <16 x i8> %rdx.minmax.select29, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp31 = icmp ult <16 x i8> %rdx.minmax.select29, %rdx.shuf30 %rdx.minmax.cmp31 = icmp ult <16 x i8> %rdx.minmax.select29, %rdx.shuf30
%rdx.minmax.cmp31.elt = extractelement <16 x i1> %rdx.minmax.cmp31, i32 0 %rdx.minmax.cmp31.elt = extractelement <16 x i1> %rdx.minmax.cmp31, i32 0
%rdx.minmax.select29.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 0 %rdx.minmax.select29.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 0
%rdx.shuf30.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 1 %rdx.shuf30.elt = extractelement <16 x i8> %rdx.minmax.select29, i32 1
%r = select i1 %rdx.minmax.cmp31.elt, i8 %rdx.minmax.select29.elt, i8 %rdx.shuf30.elt %r = select i1 %rdx.minmax.cmp31.elt, i8 %rdx.minmax.select29.elt, i8 %rdx.shuf30.elt
ret i8 %r ret i8 %r
} }
; CHECK-LABEL: umin_H ; CHECK-LABEL: umin_4H
; CHECK: uminv {{h[0-9]+}}, {{v[0-9]+}}.4h
define i16 @umin_4H(<4 x i16> * nocapture readonly %arr) {
%rdx.minmax.select = load <4 x i16>, <4 x i16>* %arr
%rdx.shuf = shufflevector <4 x i16> %rdx.minmax.select, <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%rdx.minmax.cmp18 = icmp ult <4 x i16> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i16> %rdx.minmax.select, <4 x i16> %rdx.shuf
%rdx.shuf20 = shufflevector <4 x i16> %rdx.minmax.select19, <4 x i16> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp21 = icmp ult <4 x i16> %rdx.minmax.select19, %rdx.shuf20
%rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0
%rdx.minmax.select19.elt = extractelement <4 x i16> %rdx.minmax.select19, i32 0
%rdx.shuf20.elt = extractelement <4 x i16> %rdx.minmax.select19, i32 1
%r = select i1 %rdx.minmax.cmp21.elt, i16 %rdx.minmax.select19.elt, i16 %rdx.shuf20.elt
ret i16 %r
}
; CHECK-LABEL: umin_8H
; CHECK: uminv {{h[0-9]+}}, {{v[0-9]+}}.8h ; CHECK: uminv {{h[0-9]+}}, {{v[0-9]+}}.8h
define i16 @umin_H(<8 x i16>* nocapture readonly %arr) { define i16 @umin_8H(<8 x i16>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i16>, <8 x i16>* %arr %rdx.minmax.select = load <8 x i16>, <8 x i16>* %arr
%rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp ult <8 x i16> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp23 = icmp ult <8 x i16> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf %rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i16> %rdx.minmax.select24, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf25 = shufflevector <8 x i16> %rdx.minmax.select24, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp ult <8 x i16> %rdx.minmax.select24, %rdx.shuf25 %rdx.minmax.cmp26 = icmp ult <8 x i16> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i16> %rdx.minmax.select24, <8 x i16> %rdx.shuf25 %rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i16> %rdx.minmax.select24, <8 x i16> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i16> %rdx.minmax.select27, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> %rdx.shuf28 = shufflevector <8 x i16> %rdx.minmax.select27, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp ult <8 x i16> %rdx.minmax.select27, %rdx.shuf28 %rdx.minmax.cmp29 = icmp ult <8 x i16> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0 %rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 0 %rdx.minmax.select27.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 1 %rdx.shuf28.elt = extractelement <8 x i16> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i16 %rdx.minmax.select27.elt, i16 %rdx.shuf28.elt %r = select i1 %rdx.minmax.cmp29.elt, i16 %rdx.minmax.select27.elt, i16 %rdx.shuf28.elt
ret i16 %r ret i16 %r
} }
; CHECK-LABEL: umin_S ; CHECK-LABEL: umin_2S
; CHECK-NOT: uminv
define i32 @umin_2S(<2 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <2 x i32>, <2 x i32>* %arr
%rdx.shuf = shufflevector <2 x i32> %rdx.minmax.select, <2 x i32> undef, <2 x i32> <i32 1, i32 undef>
%rdx.minmax.cmp18 = icmp ult <2 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0
%rdx.minmax.select.elt = extractelement <2 x i32> %rdx.minmax.select, i32 0
%rdx.shuf.elt = extractelement <2 x i32> %rdx.minmax.select, i32 1
%r = select i1 %rdx.minmax.cmp18.elt, i32 %rdx.minmax.select.elt, i32 %rdx.shuf.elt
ret i32 %r
}
; CHECK-LABEL: umin_4S
; CHECK: uminv {{s[0-9]+}}, {{v[0-9]+}}.4s ; CHECK: uminv {{s[0-9]+}}, {{v[0-9]+}}.4s
define i32 @umin_S(<4 x i32>* nocapture readonly %arr) { define i32 @umin_4S(<4 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <4 x i32>, <4 x i32>* %arr %rdx.minmax.select = load <4 x i32>, <4 x i32>* %arr
%rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%rdx.minmax.cmp18 = icmp ult <4 x i32> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp18 = icmp ult <4 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf %rdx.minmax.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf
%rdx.shuf20 = shufflevector <4 x i32> %rdx.minmax.select19, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %rdx.shuf20 = shufflevector <4 x i32> %rdx.minmax.select19, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp21 = icmp ult <4 x i32> %rdx.minmax.select19, %rdx.shuf20 %rdx.minmax.cmp21 = icmp ult <4 x i32> %rdx.minmax.select19, %rdx.shuf20
%rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0 %rdx.minmax.cmp21.elt = extractelement <4 x i1> %rdx.minmax.cmp21, i32 0
%rdx.minmax.select19.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 0 %rdx.minmax.select19.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 0
%rdx.shuf20.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 1 %rdx.shuf20.elt = extractelement <4 x i32> %rdx.minmax.select19, i32 1
%r = select i1 %rdx.minmax.cmp21.elt, i32 %rdx.minmax.select19.elt, i32 %rdx.shuf20.elt %r = select i1 %rdx.minmax.cmp21.elt, i32 %rdx.minmax.select19.elt, i32 %rdx.shuf20.elt
ret i32 %r ret i32 %r
} }
; CHECK-LABEL: umin_D ; CHECK-LABEL: umin_8S
; CHECK-NOT: uminv
define i32 @umin_8S(<8 x i32>* nocapture readonly %arr) {
%rdx.minmax.select = load <8 x i32>, <8 x i32>* %arr
%rdx.shuf = shufflevector <8 x i32> %rdx.minmax.select, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp23 = icmp ult <8 x i32> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i32> %rdx.minmax.select, <8 x i32> %rdx.shuf
%rdx.shuf25 = shufflevector <8 x i32> %rdx.minmax.select24, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp26 = icmp ult <8 x i32> %rdx.minmax.select24, %rdx.shuf25
%rdx.minmax.select27 = select <8 x i1> %rdx.minmax.cmp26, <8 x i32> %rdx.minmax.select24, <8 x i32> %rdx.shuf25
%rdx.shuf28 = shufflevector <8 x i32> %rdx.minmax.select27, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%rdx.minmax.cmp29 = icmp ult <8 x i32> %rdx.minmax.select27, %rdx.shuf28
%rdx.minmax.cmp29.elt = extractelement <8 x i1> %rdx.minmax.cmp29, i32 0
%rdx.minmax.select27.elt = extractelement <8 x i32> %rdx.minmax.select27, i32 0
%rdx.shuf28.elt = extractelement <8 x i32> %rdx.minmax.select27, i32 1
%r = select i1 %rdx.minmax.cmp29.elt, i32 %rdx.minmax.select27.elt, i32 %rdx.shuf28.elt
ret i32 %r
}
; CHECK-LABEL: umin_2D
; CHECK-NOT: uminv ; CHECK-NOT: uminv
define i64 @umin_D(<2 x i64>* nocapture readonly %arr) { define i64 @umin_2D(<2 x i64>* nocapture readonly %arr) {
%rdx.minmax.select = load <2 x i64>, <2 x i64>* %arr %rdx.minmax.select = load <2 x i64>, <2 x i64>* %arr
%rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 undef> %rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
%rdx.minmax.cmp18 = icmp ult <2 x i64> %rdx.minmax.select, %rdx.shuf %rdx.minmax.cmp18 = icmp ult <2 x i64> %rdx.minmax.select, %rdx.shuf
%rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0 %rdx.minmax.cmp18.elt = extractelement <2 x i1> %rdx.minmax.cmp18, i32 0
%rdx.minmax.select.elt = extractelement <2 x i64> %rdx.minmax.select, i32 0 %rdx.minmax.select.elt = extractelement <2 x i64> %rdx.minmax.select, i32 0
%rdx.shuf.elt = extractelement <2 x i64> %rdx.minmax.select, i32 1 %rdx.shuf.elt = extractelement <2 x i64> %rdx.minmax.select, i32 1
%r = select i1 %rdx.minmax.cmp18.elt, i64 %rdx.minmax.select.elt, i64 %rdx.shuf.elt %r = select i1 %rdx.minmax.cmp18.elt, i64 %rdx.minmax.select.elt, i64 %rdx.shuf.elt
ret i64 %r ret i64 %r
} }